ANALOG DEVICES 4.5 Ω RON 4-/8-Channel ±5 V +12 V +5 V +3.3 V Multiplexers ADG1608/ADG1609 handbook
Contents
1. P E 3 Ww a E z e 8 2 7 F Z Vpp 5V Vss 5V 40 60 80 amp TEMPERATURE C 3 FREGUENCY Hz 3 Figure 19 Transition Time vs Temperature Figure 22 On Response vs Frequency Ta 25 C 10 Voo 5V Vss 5V 20 20 z 30 5 a 40 40 S z mu E lt 50 60 2 5 2 60 lt i 6 70 80 80 100 90 100 120 8 10k 100k 1M 10M 100M 16 8 10k 100k 1M 2 FREQUENCY Hz 8 FREQUENCY Hz 8 Figure 20 Off Isolation vs Frequency Figure 23 ACPSRR vs Frequency Ta 25 C Loap 1100 10 Vpp 5V Vss 5V 20 Vpp 3 3V 30 a 40 x 3s x z amp 50 pi YA a Vpp 5V Vs 3 5V O 60 E m o 70 80 Vpp 5V Vss 5 Vs 5V p p 90 12V Vs 5V p p 100 3 10k 100k 1M 10M 100M 16 0 5k 10k 15k 20k FREQUENCY Hz 3 FREQUENCY Hz 8 Figure 21 Crosstalk vs Frequency Figure 24 THD N vs Frequency Rev 0 Page 13 of 20 ADG1608 ADG1609 TEST CIRCUITS ls OFF Ip OFF 08318 007 A n 08318 008 Figure 25 On Resistance Figure 262. Off Leakage NC NO CONNECT lt H 083 18 009 Figure 27 On Leakage ey t lt 20ns t lt 20ns ADDRESS DRIVE Vin ov S2 TO S7 TRANSITION TRANSITION S8 ADG1608 OUTPUT 35pF SIMILAR CONNECTION FOR ADG1609 8 Figure 28 Address to Output Switching Times trrans ron Vpp Vss 3V ADDRESS DRIVE Vin y s ov S2 TO S7 S8 ADG1608 OUTPUT OUTPUT 35pF 08318 011 SIMILAR CONNECTION FOR ADG1609 Figure 29 Break Before Make Delay teem Rev 0 Page 14 of 20 ADG1608 ADG1609 ENABLE DRIVE Vin ov ton EN gt ON OUTPUT OUTPUT 35pF SIMILAR CONNECTION FOR 4061609 Figure 30 Enable Delay ton EN torr EN 08318 012 Vpp Vss 3v Qing CL AVour 08318 013 SIMILAR CONNECTION FOR ADG1609 Figure 31 Charge Injection Rev 0 Page 15 of 20 ADG1608 ADG1609 NETWORK NETWORK ANALYZER ANALYZER z o Vout 3 Vout 2 OFF ISOLATION 20 log amp CHANNEL TO CHANNEL CROSSTALK 20 log y 3 Figure 32 Off Isolation Figure 34 Channel to Channel Crosstalk Vpp Vss NETWORK ANALYZER AUDIO PRECISION 08318 017 Vour WITH SWITCH INSERTION LOSS 20 log Vour WITHOUT SWITCH 08318 016 Figure 33 Bandwidth Figure 35 THD Noise Rev 0 Page 16 of 20 ADG1608 ADG1609 TERMINOLOGY Ibp The positive supply current Iss The negative supply curre
3. x x 0 None 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 1X don t care Rev 0 Page 10 of 20 ADG1608 ADG1609 TYPICAL PERFORMANCE CHARACTERISTICS e a Lu 2 S TA 85 C Q Q 0 a E E z z o o 6 E 2 0 2 4 6 88 0 2 4 6 8 10 12 8 SOURCE OR DRAIN VOLTAGE V 8 SOURCE OR DRAIN VOLTAGE V 3 Figure 7 On Resistance vs Vp Vs for Dual Supply Figure 10 On Resistance vs Vp Vs for Different Temperatures 12 V Single Supply a a 5 5 lt lt i 2 o 7 z 0 2 4 6 8 10 12 14 16 8 0 05 10 15 20 25 30 35 40 45 50 8 SOURCE OR DRAIN VOLTAGE V 3 SOURCE OR DRAIN VOLTAGE V 3 Figure 8 On Resistance vs Vp Vs for Single Supply Figure 11 On Resistance vs Vp Vs for Different Temperatures 5 V Single Supply 18 Vpp 7 3 3V Vss 0V 16 14 a m 12 TA 125 C ur O TA 85 C 9 10 Ta 25 C Z b TA 7 40 C b o 8 7 N a z 6 z o o 4 2 0 o ii 0 0 5 1 0 1 5 2 0 2 5 30 amp 5 4 3 2 0 1 2 3 4 58 E SOURCE OR DRAIN VOLTAGE V 8 SOURCE OR DRAIN VOLTAGE V 3 Figure 9 On Resistance vs Vp Vs for Different Temperatures Figure 12 On Resistance vs Vp Vs for Different Temperatures 5 V Dual Supply 3 3 V Single Supply Rev 0 Page 11
4. ADG1609 Pin Configuration LFCSP 8318 005 08318 006 Table 10 ADG1609 Pin Function Descriptions Pin No TSSOP LFCSP Mnemonic Description 1 15 AO Logic Control Input 2 16 EN Active High Digital Input When this pin is low the device is disabled and all switches are off When this pin is high Ax logic inputs determine on switches 3 1 Vss Most Negative Power Supply Potential In single supply applications this pin can be connected to ground 4 2 S1A Source Terminal 1A Can be an input or an output 5 3 S2A Source Terminal 2A Can be an input or an output 6 4 S3A Source Terminal 3A Can be an input or an output 7 5 S4A Source Terminal 4A Can be an input or an output 8 6 DA Drain Terminal A Can be an input or an output 9 7 DB Drain Terminal B Can be an input or an output 10 8 S4B Source Terminal 4B Can be an input or an output 11 9 S3B Source Terminal 3B Can be an input or an output 12 10 S2B Source Terminal 2B Can be an input or an output 13 11 518 Source Terminal 1B Can be an input or an output 14 12 Vop Most Positive Power Supply Potential 15 13 GND Ground 0 V Reference 16 14 A1 Logic Control Input N A EP EP Exposed Pad The exposed pad is connected internally For increased reliability of the solder joints and maximum thermal capability it is recommended that the pad be soldered to the substrate Vss Table 11 ADG1609 Truth Table Al AO EN On Switch Pair
5. LFCSP 9v QD ee One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2009 Analog Devices Inc All rights reserved ADG1608 ADG1609 TABLE OF CONTENTS Features oco eR Applications Functional Block Diagrams General Description Product Highlights Revision History Specificato NSi iiredas ite eo Ner a a ssl 45 DualSupply i te db eed te ie tet de s 12 V Single oreet ettet i eee 5 Single Supply eR RR NRI REVISION HISTORY 7 09 Revision 0 Initial Version ContinuousCurrentperChannel SorbD 7 Absolute Maximum Ratings ecu 8 ESD Caution aaa akazaa 8 Pin Configurations and Function Descriptions 9 Typical Performance Characteristics mat Test Circuits 14 Terminology zeiten tei e aeree tbe 17 Outline Dimensions susarsan as 18 Ordering Guilde oerte e ee 18 Rev 0 Page 2 of 20 ADG1608 ADG1609 SPECIFICATIONS 5 V DUAL SUPPLY Vpp 5 V 10 Vss 5 V 10 GND 0 V unless otherwise noted Table 1 40 Cto 40 Cto Parameter 25 C 85 C 125 C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range Vop to Vss V On Resistance Ron 45 Q typ Vs 4 5 V ls 10 mA see Figure 25 5 7 8 O max Voo 24 5 V Vss 4 5 V On Resistan
6. S1 Source Terminal 1 Can be an input or an output 5 3 S2 Source Terminal 2 Can be an input or an output 6 4 S3 Source Terminal 3 Can be an input or an output 7 5 S4 Source Terminal 4 Can be an input or an output 8 6 D Drain Terminal Can be an input or an output 9 7 S8 Source Terminal 8 Can be an input or an output 10 8 S7 Source Terminal 7 Can be an input or an output 11 9 S6 Source Terminal 6 Can be an input or an output 12 10 S5 Source Terminal 5 Can be an input or an output 13 11 Vop Most Positive Power Supply Potential 14 12 GND Ground 0 V Reference 15 13 A2 Logic Control Input 16 14 A1 Logic Control Input N A EP EP Exposed Pad The exposed pad is connected internally For increased reliability of the solder joints and maximum thermal capability it is recommended that the pad be soldered to the substrate Vss A2 A1 AO EN On Switch x x x 0 None 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 1X don t care Rev 0 Page 9 of 20 ADG1608 ADG1609 16 EN 15 A0 14 A1 13 GND PIN 1 o INDICATOR ADG1609 TOP VIEW Not to Scale ADG1609 TOP VIEW Not to Scale NOTES 1 THE EXPOSED PAD IS CONNECTED INTERNALLY FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE Vss Figure 5 ADG1609 Pin Configuration TSSOP Figure 6
7. not subject to production test Rev 0 Page 4 of 20 ADG1608 ADG1609 5 V SINGLE SUPPLY Vpp 5 V 10 Vss 0 V GND 0 V unless otherwise noted Table 3 40 Cto 40 Cto Parameter 256 85 C 125 C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range OVtoVpp V On Resistance Ron 8 5 Otyp Vs 0V to 4 5 V Is 10 mA see Figure 25 10 12 5 14 O max Voo 4 5 V Vss 0 V On Resistance Match Between Channels ARon 0 15 Q typ Vs 0 V to 4 5 V Is 10 mA 0 3 0 35 0 4 Q max On Resistance Flatness Rrtation 1 7 Q typ Vs 0 V to 4 5 V Is 10 mA 2 3 2 7 3 O max LEAKAGE CURRENTS Voo 5 5 V Vss 0 V Source Off Leakage Is Off 0 01 nA typ Vs 1 V 4 5 V Vo 4 5 V 1 V see Figure 26 0 1 0 5 43 nA max Drain Off Leakage Ip Off 0 01 nA typ Vs 1 V 4 5 V Vp 4 5 V 1 V see Figure 26 ADG1608 0 15 2 14 nA max ADG1609 0 15 1 7 nA max Channel On Leakage Ip Is On 0 01 nA typ Vs Vo 1 V or 4 5 V see Figure 27 0 15 2 14 nA max DIGITAL INPUTS Input High Voltage Vinn 2 0 V min Input Low Voltage Vint 0 8 V max Input Current lin or lin 1 nA typ Vin Vann Or Voo 0 1 HA max Digital Input Capacitance Civ 4 pF typ DYNAMIC CHARACTERISTICS Transition Time trransition 193 nstyp Ri 300 0 C 35 pF 251 301 339 ns max Vs 2 5 V see Figure 28 ton EN 115 nstyp Ri 300 0 C 35 pF 152 171 184 ns max Vs 2 5 V see Figure 30 torr EN 140 nstyp Ri 300 0 C 3
8. 5 pF 184 225 259 ns max Vs 2 5 V see Figure 30 Break Before Make Time Delay tp 66 ns typ R 300 0 C 35 pF 37 ns min Vs Vs2 2 5 V see Figure 29 Charge Injection 11 pCtyp Vs 2 5 V Rs 00 C 1 nF see Figure 31 Off Isolation 64 dB typ Ri 500 C 5 pF f 100 kHz see Figure 32 Channel to Channel Crosstalk 64 dB typ Ri 50Q C 5 pF f 100 kHz see Figure 34 Total Harmonic Distortion Noise THD N 0 3 96 typ R 21100 f 20 Hz to 20 kHz Vs 3 5 V p p see Figure 35 3 dB Bandwidth R 500 C 5 pF see Figure 33 ADG1608 37 MHz typ ADG1609 72 MHz typ Cs Off 22 pF typ Vs 2 5 V f 1 MHz Cp Off Vs22 5V f21MHz ADG1608 136 pF typ ADG1609 68 pF typ Cp Cs On Vs 2 5 V f 1 MHz ADG1608 168 pF typ ADG1609 94 pF typ POWER REQUIREMENTS Voo 5 5 V Ibo 0 001 HA typ Digital inputs 0 V or Vpp 1 0 HA max 00 3 3 16 V min max Guaranteed by design but not subject to production test Rev 0 Page 5 of 20 ADG1608 ADG1609 3 3 V SINGLE SUPPLY Vpp 3 3 V Vss 0 V GND 0 V unless otherwise noted Table 4 40 Cto 40 Cto Parameter 25 C 85 C 125 C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range OVtoVpp V On Resistance Ron 13 5 15 16 5 Otyp Vs OV to Vpp ls 10 mA see Figure 25 Voo 3 3 V Vss OV On Resistance Match Between Channels ARon 0 25 0 28 0 3 Q typ Vs 0 V to Vpp Is 10 mA On Resistance Flatness
9. 6 45 mA max LFCSP Oja 48 7 C W 154 101 63 mA max Rev 0 Page 7 of 20 ADG1608 ADG1609 ABSOLUTE MAXIMUM RATINGS Ta 25 C unless otherwise noted Table 7 Parameter Rating Vop to Vss 18V Vop to GND 0 3 V to 18 V Vss to GND 0 3 V to 18 V Analog Inputs Digital Inputs Peak Current S or D Continuous Current S or D Operating Temperature Range Industrial Y Version Storage Temperature Range Junction Temperature 16 Lead TSSOP Oja Thermal Impedance 0 Airflow 4 Layer Board 16 Lead LFCSP Oja Thermal Impedance 0 Airflow 4 Layer Board Reflow Soldering Peak Temperature Pb free Vss 0 3 V to Voo 0 3 V or 30 mA whichever occurs first GND 0 3 V to Voo 0 3 Vor 30 mA whichever occurs first 710 mA pulsed at 1 ms 10 duty cycle maximum Data 15 40 C to 125 C 65 C to 150 C 150 C 112 6 C W 48 7 C W 260 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ESD CAUTION ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge y without detection Although this product f
10. A max DIGITAL INPUTS Input High Voltage Vinn 2 0 V min Input Low Voltage Vint 0 8 V max Input Current lin or lin 1 nA typ Vin Vann Or Voo 0 1 pA max Digital Input Capacitance Cin 4 pF typ DYNAMIC CHARACTERISTICS Transition Time trransition 113 ns typ Ri 300 O C 35 pF 141 172 196 ns max Vs 8 V see Figure 28 ton EN 80 ns typ Ri 300 0 C 35 pF 94 101 110 ns max Vs 8 V see Figure 30 torr EN 77 ns typ Ri 300 0 C 35 pF 93 117 140 ns max Vs 8 V see Figure 30 Break Before Make Time Delay tp 47 ns typ Ri 300 O C 35 pF 30 ns min Vs Vs2 8 V see Figure 29 Charge Injection 29 pCtyp Vs 6V Rs 0 QO C 1 nF see Figure 31 Off Isolation 64 dB typ Ri 500 C 5 pF f 1 MHz see Figure 32 Channel to Channel Crosstalk 64 dB typ R 2500 0 25 pF f 1 MHz see Figure 34 Total Harmonic Distortion Noise THD N 0 04 typ R 21100 Vs 5 V p p f 20 Hz to 20 kHz see Figure 35 3 dB Bandwidth R 500 C 5 pF see Figure 33 ADG1608 40 MHz typ ADG1609 78 MHz typ Cs Off 19 pF typ Vs 6V f 1 MHz Co Off ADG1608 117 pF typ Vs 6V f 1 MHz ADG1609 59 pF typ Vs 6V f 1 MHz Cp Cs On ADG1608 149 pF typ Vs 6V f 1 MHz ADG1609 84 pF typ Vs 6V f 1 MHz POWER REQUIREMENTS Vop 12V Ipp 0 001 pA typ Digital inputs 0 V or Voo 1 0 HA max ADG1608 300 pA typ Digital inputs 5 V 480 HA max ADG1609 225 pA typ Digital inputs 5 V 360 pA max Vop 3 3 16 V min max 1 Guaranteed by design but
11. ANALOG 4 5 0 Ron 4 8 Channel DEVICES 5V 12V 5 V and 3 3 V Multiplexers ADG1608 ADG1609 FEATURES 4 5 O typical on resistance 1 O on resistance flatness Up to 470 mA continuous current 13 3 V to 8 V dual supply operation 3 3 V to 16 V single supply operation No V supply required 3V logic compatible inputs Rail to rail operation 16 lead TSSOP and 16 lead 3 mm x 3 mm LFCSP APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery powered systems Sample and hold systems Relay replacements GENERAL DESCRIPTION The ADG1608 ADG1609 are monolithic CMOS analog multip lexers comprising eight single channels and four differential channels respectively The ADG1608 switches one of eight inputs to a common output as determined by the 3 bit binary address lines AO Al and A2 The ADG1609 switches one of four differential inputs to a common differential output as determined by the 2 bit binary address lines AO and Al An EN input on both devices is used to enable or disable the device When disabled all channels are switched off Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies In the off condition signal levels up to the supplies are blocked All switches exhibit break before make switching action Inherent in the design is low charge injecti
12. Rrtaton 5 55 6 5 Otyp Vs 0 V to Von ls 10 mA LEAKAGE CURRENTS Voo 3 6 V Vss 0 V Source Off Leakage Is Off 0 01 nA typ Vs 0 6 V 3 V Vp 3 V 0 6 V see Figure 26 20 1 20 5 3 nA max Drain Off Leakage Ip Off 0 01 nA typ Vs 0 6 V 3 V Vp 3 V 0 6 V see Figure 26 ADG1608 0 15 2 14 nA max ADG1609 0 15 1 7 nA max Channel On Leakage Ip Is On 0 01 nA typ Vs Vo 0 6 V or 3 V see Figure 27 0 15 2 14 nA max DIGITAL INPUTS Input High Voltage Vinn 2 0 V min Input Low Voltage Vint 0 8 V max Input Current lin or lin 1 nA typ Vin Vann Or Voo 0 1 pA max Digital Input Capacitance Cin 4 pF typ DYNAMIC CHARACTERISTICS Transition Time trransition 312 ns typ Ri 300 O C 35 pF 437 498 542 ns max Vs 1 5 V see Figure 28 ton EN 216 ns typ Ri 300 0 C 35 pF 309 331 344 ns max Vs 1 5 V see Figure 30 torr EN 236 ns typ Ri 300 0 C 35 pF 316 367 411 ns max Vs 1 5 V see Figure 30 Break Before Make Time Delay tp 104 ns typ Ri 300 O C 35 pF 48 ns min Vs Vs2 1 5 V see Figure 29 Charge Injection 6 pC typ Vs 1 5 V Rs 0 0 C 1 nF see Figure 31 Off Isolation 64 dB typ R 2500 01 25 pF f 100 kHz see Figure 32 Channel to Channel Crosstalk 64 dB typ Ri 2500 C 5 pF f 100 kHz see Figure 34 Total Harmonic Distortion Noise THD N 0 5 96typ R 2 1100 f 20 Hz to 20 kHz Vs 2 V p p see Figure 35 3 dB Bandwidth R 2500 6 5 pF see Figure 33 ADG1608 34 MHz ty
13. SECTION OF THIS DATA SHEET SEATING 0 08 PLANE 0 20 REF COMPLIANT TO JEDEC STANDARDS MO 220 WEED E Figure 37 16 Lead Lead Frame Chip Scale Package LFCSP_WQ 3mm x 3 mm Body Very Very Thin Quad CP 16 22 Dimensions shown in millimeters ORDERING GUIDE Package Branding Model Temperature Range Package Description Option ADG1608BRUZ 40 C to 125 C 16 Lead Thin Shrink Small Outline Package TSSOP RU 16 ADG1608BRUZ REEL 7 40 C to 125 C 16 Lead Thin Shrink Small Outline Package TSSOP RU 16 ADG1608BCPZ REEL7 40 C to 125 C 16 Lead Lead Frame Chip Scale Package LFCSP_WQ CP 16 22 38 ADG1609BRUZ 40 C to 125 C 16 Lead Thin Shrink Small Outline Package TSSOP RU 16 ADG1609BRUZ REEL 7 40 C to 125 C 16 Lead Thin Shrink Small Outline Package TSSOP RU 16 ADG1609BCPZ REEL 7 40 C to 125 C 16 Lead Lead Frame Chip Scale Package LFCSP_WQ CP 16 22 39 1 Z RoHS Compliant Part Rev 0 Page 18 of 20 ADG1608 ADG1609 NOTES Rev 0 Page 19 of 20 ADG1608 ADG1609 NOTES 2009 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners D08318 0 7 09 0 DEVICES www analo g com Rev 0 Page 20 of 20
14. ce Match Between Channels ARon 0 12 Q typ Vs 4 5 V ls 10 mA 0 25 0 3 0 35 O max On Resistance Flatness Rrtaton 1 Otyp Vs 4 5 V Is 10 mA 1 3 1 7 2 Q max LEAKAGE CURRENTS Voo 5 5 V Vss 5 5 V Source Off Leakage Is Off 0 02 nA typ Vs 4 5 V Vo F4 5 V see Figure 26 20 1 20 5 3 nA max Drain Off Leakage lo Off 0 03 nA typ Vs 44 5 V Vo 34 5 V see Figure 26 ADG1608 0 15 2 14 nA max ADG1609 0 15 1 7 nA max Channel On Leakage Ip Is On 0 03 nA typ Vs Vp 4 5 V see Figure 27 0 15 2 14 nA max DIGITAL INPUTS Input High Voltage Vinn 2 0 V min Input Low Voltage Vint 0 8 V max Input Current lin or lin 1 nA typ Vin Vann Or Voo 0 1 HA max Digital Input Capacitance Cin 4 pF typ DYNAMIC CHARACTERISTICS Transition Time trransition 150 nstyp R 300 Q C 35 pF 182 230 258 ns max Vs 2 5 V see Figure 28 ton EN 106 nstyp Ri 300 0 C 2 35 pF 132 150 160 ns max Vs 2 5 V see Figure 30 torr EN 113 nstyp Ri 300 0 C 35 pF 144 178 202 ns max Vs 2 5 V see Figure 30 Break Before Make Time Delay tp 47 nstyp R 300 0 C 35 pF 30 ns min Vs1 Vs2 2 5 V see Figure 29 Charge Injection 24 pCtyp Vs 0V Rs 00 C 1 nF see Figure 31 Off Isolation 64 dB typ R 2500 C 25 pF f 1 MHz see Figure 32 Channel to Channel Crosstalk 64 dB typ R 2500 C 25 pF f 1 MHz see Figure 34 Total Harmonic Distortion Noise THD N 0 04 96 typ R 21100 Vs 5V p p f 20 Hz to 20 kHz see Fi
15. ch Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance Bandwidth The frequency at which the output is attenuated by 3 dB On Response The frequency response of the on switch Insertion Loss The loss due to the on resistance of the switch Total Harmonic Distortion Noise THD N The ratio of the harmonic amplitude plus noise of the signal to the fundamental AC Power Supply Rejection Ratio ACPSRR The ratio of the amplitude of signal on the output to the amplitude of the modulation This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch The dc voltage on the device is modulated by a sine wave of 0 62 V p p Rev 0 Page 17 of 20 ADG1608 ADG1609 OUTLINE DIMENSIONS Sy o 4 0 30 8 gt j 0 60 JL4 i 049 SEATING v 0 45 PLANE COPLANARITY 0 10 COMPLIANT TO JEDEC STANDARDS MO 153 AB Figure 36 16 Lead Thin Shrink Small Outline Package TSSOP RU 16 Dimensions shown in millimeters 3 10 0 30 3 00 SQ E 0 23 PIN 1 2 90 a8 INDICATOR WERE TOR 0 50 Bsc i J 1 75 1 60 SQ 1 55 Y t 050 0 20 MIN 0 40 BOTTOM VIEW 0 30 0 80 FOR PROPER CONNECTION OF 075 THE EXPOSED PAD REFER TO L ya NEN 5 SAN gt T piis iem rity
16. eatures patented or proprietary protection circuitry damage dy A may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality 1 Overvoltages at IN S or D are clamped by internal diodes Current should be limited to the maximum ratings given See Table 5 and Table 6 Rev 0 Page 8 of 20 ADG1608 ADG1609 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 16 EN 15 AO 14 A1 13 A2 PIN 1 Vss 11 INDICATOR s 2 sz 31 ADG1608 ao 1 he A1 TOP VIEW S3 41 Not to Scale EN 15 A2 Vss 3 14 GND s 4 ADG1608 Vpp TOP VIEW S2 5 Not to Scale S5 NOTES 1 THE EXPOSED PAD IS CONNECTED s3 6 S6 INTERNALLY FOR INCREASED RELIABILITY OF THE SOLDER S4 10957 JOINTS AND MAXIMUM THERMAL CAPABILITY IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE Ves Figure 3 ADG1608 Pin Configuration TSSOP Figure 4 ADG1608 Pin Configuration LFCSP o o 08318 003 08318 004 Table 8 ADG1608 Pin Function Descriptions Pin No TSSOP LFCSP Mnemonic Description 1 15 AO Logic Control Input 2 16 EN Active High Digital Input When this pin is low the device is disabled and all switches are off When this pin is high Ax logic inputs determine on switches 3 1 Vss Most Negative Power Supply Potential In single supply applications this pin can be connected to ground 4 2
17. gure 35 3 dB Bandwidth R 500 C 5 pF see Figure 33 ADG1608 40 MHz typ ADG1609 71 MHz typ Cs Off 20 pF typ Vs 0V f 1MHz Cp Off ADG1608 120 pF typ Vs 0V f 1 MHz ADG1609 61 pF typ Vs 0V f 1MHz Cp Cs On ADG1608 153 pF typ Vs 0V f 1 MHz ADG1609 85 pF typ Vs 0V f 1 MHz POWER REQUIREMENTS Vpp 5 5 V Vss 5 5 V Ipp 0 001 HA typ Digital inputs 0 V or Voo 1 0 HA max Vop Vss 3 3 8 V min max Guaranteed by design but not subject to production test Rev 0 Page 3 of 20 ADG1608 ADG1609 12 V SINGLE SUPPLY Vpp 12 V 10 Vss 0 V GND 0 V unless otherwise noted Table 2 40 Cto 40 Cto Parameter 25 C 85 C 125 C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range OVtoVpp V On Resistance Ron 4 Otyp Vs 0V to 10V Is 10 mA see Figure 25 45 6 5 7 5 O max Voo 10 8 V Vss 0 V On Resistance Match Between Channels ARon 0 12 Otyp Vs 10 V Is 2 10 mA 0 25 0 3 0 35 O max On Resistance Flatness Rrtaton 0 9 Otyp Vs 0Vto 10V Is 10 mA 1 2 1 6 1 9 O max LEAKAGE CURRENTS Voo 13 2 V Vss 0 V Source Off Leakage Is Off 0 02 nA typ Vs 1 V 10 V Vo 10 V 1 V see Figure 26 0 1 0 5 3 nA max Drain Off Leakage lo Off 0 03 nA typ Vs 1 V 10 V Vo 10 V 1 V see Figure 26 ADG1608 0 15 2 14 nA max ADG1609 0 15 1 7 nA max Channel On Leakage Ip Is On 0 03 nA typ Vs Vp 1 Vor 10 V see Figure 27 0 15 2 14 n
18. nt Vp Vs The analog voltage on Terminal D and Terminal S Ron The ohmic resistance between Terminal D and Terminal S Reaton Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range I Off The source leakage current with the switch off Ip Off The drain leakage current with the switch off Ip Is On The channel leakage current with the switch on Vint The maximum input voltage for Logic 0 Vina The minimum input voltage for Logic 1 Tint Imn The input current of the digital input Cs Off The off switch source capacitance which is measured with reference to ground C Off The off switch drain capacitance which is measured with reference to ground Cp Cs On The on switch capacitance which is measured with reference to ground Cw The digital input capacitance trnANsITION The delay time between the 5096 and 9096 points of the digital input and switch on condition when switching from one address state to another ton EN The delay between applying the digital control input and the output switching on torr EN The delay between applying the digital control input and the output switching off Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching Off Isolation A measure of unwanted signal coupling through an off swit
19. of 20 ADG1608 ADG1609 LEAKAGE CURRENT nA LEAKAGE CURRENT nA LEAKAGE CURRENT nA 12 Vpp 5V 40 Vss 5V Vpias 4 5VI 4 5V 8 Ip OFF 6 Ip ls ON 4 Is OFF 4 2 0 2 Ip ls ON 4 I OFF Ip OFF 6 8 0 20 40 60 80 100 120 TEMPERATURE C Figure 13 ADG1608 Leakage Currents vs Temperature 5 V Dual Supply ss VgiAs 1V 10V 10 a o 5 0 20 40 60 80 100 120 TEMPERATURE C Figure 14 ADG1608 Leakage Currents vs Temperature 12 V Single Supply Vpp 5V Vss 7 0V Vias 1V 4 5V Ip OF Ip Is O Is OF Is OF lp ls ON F N F F TEMPERATURE C Figure 15 ADG1608 Leakage Currents vs Temperature 5VSingle Supply 08318 035 08318 034 08318 036 Rev 0 Page 12 of 20 100 HA LEAKAGE CURRENT nA CHARGE INJECTION pC VA TEMPERATURE C Figure 16 ADG1608 Leakage Currents vs Temperature 3 3 V Single Supply Ipp PER CHANNEL 0 2 4 6 8 10 12 14 LOGIC V Figure 17 loo vs Logic Level 30 N o 10 5 vM 3 3V Vss 0V 4 Vs V Figure 18 Charge Injection vs Source Voltage 08318 018 08318 019 08318 026 ADG1608 ADG1609
20. on for minimum transients when switching the digital inputs Rev 0 Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners FUNCTIONAL BLOCK DIAGRAMS ADG1608 1 OF 8 DECODER 08318 001 AO A1 A2 EN Figure 1 ADG1609 l l 1 0 4 DECODER AO A1 EN 0831 8 002 Figure 2 The low on resistance of these switches make them ideal solu tions for data acquisition and gain switching applications where low on resistance and distortion is critical The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals CMOS construction ensures ultralow power dissipation making the parts ideally suited for portable and battery powered instruments PRODUCT HIGHLIGHTS 8 O maximum on resistance over temperature Minimum distortion THD N 0 04 3 V logic compatible digital inputs Vna 2 0 V Vmi 0 8 V No Vi logic power supply required Ultralow power dissipation 8 nW 16 lead TSSOP and 16 lead 3 mm x 3 mm
21. p ADG1609 72 MHz typ Cs Off 23 pF typ Vs 1 5 V f 1 MHz Co Off Vs 1 5 V f 1 MHz ADG1608 145 pF typ ADG1609 72 pF typ Cp Cs On Vs 1 5 V f 1 MHz ADG1608 173 pF typ ADG1609 95 pF typ POWER REQUIREMENTS Voo 3 6 V Ipp 0 001 pA typ Digital inputs 0 V or Voo 1 0 HA max Vop 3 3 16 V min max Guaranteed by design but not subject to production test Rev 0 Page 6 of 20 ADG1608 ADG1609 CONTINUOUS CURRENT PER CHANNEL S ORD Table 5 ADG1608 Parameter 25 C 85 C 125 C Unit CONTINUOUS CURRENT S OR D Voo 5 V Vas 5 V TSSOP Osa 112 6 C W 290 180 100 mA max LFCSP 0 48 7 C W 470 255 120 mA max Voo 12V Vss OV TSSOP Osa 112 6 C W 213 129 73 mA max LFCSP 0 48 7 C W 346 185 84 mA max Voo 5 V Vss 0 V TSSOP Osa 112 6 C W 157 101 63 mA max LFCSP 81a 48 7 C W 252 150 77 mA max Voo 3 3 V Vss 0 V TSSOP Osa 112 6 C W 126 87 56 mA max LFCSP 0 48 7 C W 206 129 73 5 mA max Table 6 ADG1609 Parameter 25 C 85 C 125 C Unit CONTINUOUS CURRENT S OR D Voo 5 V Vas 5 V TSSOP Osa 112 6 C W 147 98 63 mA max LFCSP 81a 48 7 C W 245 147 77 mA max Voo 12V Vss OV TSSOP Osa 112 6 C W 157 101 63 mA max LFCSP 81a 48 7 C W 255 150 77 mA max Voo 5 V Vss 0 V TSSOP Osa 112 6 C W 115 80 52 mA max LFCSP 81a 48 7 C W 189 119 70 mA max Voo 3 3 V Vss OV TSSOP Oja 112 6 C W 94 6
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