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ANALOG DEVICES AD704 handbook

1. 1 10 100 1k 10k 100k FREQUENCY Hz Figure 21 Power Supply Rejection vs Frequency 1M 00818 019 Amplifier 00818 020 00818 021 10M z gm 55 9 25 C 5 125 C 9 1M a 3 z a 100 E 10 LOAD RESISTANCE 100 00818 022 Figure 22 Open Loop Gain vs Load Resistance Over Temperature 140 0 120 30 3 gt 100 60 4 8 80 90 5 60 120 gt 150 GAIN 4 4 x 20 180 9 n 0 20 0 00 0 1 1 10 100 1k 10k 100k 1M 10M FREQUENCY Hz Figure 23 Open Loop Gain and Phase vs Frequency Vs 10kQ m 0 5 a 79 on 1 0 za 5 52 15 ES o 2 1 5 rat 2u EE 2 ui 41 0 Ru m EE 77 40 5 Vs 0 5 10 15 20 Rev E Page 8 of 16 SUPPLY VOLTAGE Figure 24 Output Voltage Swing vs Supply Voltage 00818 024 00818 023
2. 160 GAIN 10 0 2V p p COMMON MODE INPUT 140 amp CIRCUIT TRIMMED 120 USING CAPACITOR C 5 100 80 o TYPICAL MONOLITHIC IN AMP 60 z 40 2 WITHOUT CAPACITOR 20 0 1 10 100 1k 10k 008 18 035 FREQUENCY Hz Figure 35 Common Mode Rejection vs Frequency with and Without Capacitor Rev Page 11 of 16 0704 The 1 Hz four pole active filter offers dc precision with a minimum of components and cost The low current noise Ios and allow the use of 1 resistors without sacrificing the 1 drift of the AD704 This means that lower capacitor values can be used reducing cost and space Furthermore because the AD704 s Is is as low as its Ios over most of the MIL temperature range most applications do not require the use of the normal balancing resistor with its stability capacitor Adding the optional balancing resistor enhances performance at high temperatures as shown in Figure 36 Table 5 gives capacitor values for several common low pass responses OFFSET VOLTAGE OF FILTER CIRCUIT RTI uV WITHOUT OPTIONAL BALANCE RESISTOR R3 WITH OPTIONAL BALANCE RESISTOR R3 40 0 40 TEMPERATURE 80 120 00818 036 Figure 36 Vos vs Temperature Performance of the 1 Hz Filter Circuit Table 5 1 Hz Four Pole Low Pass Filter Re
3. s 1 10 100 1k 5 INPUT OFFSET VOLTAGE DRIFT pV C B FREQUENCY Hz B Figure 13 Typical Distribution of Input Offset Voltage Drift Figure 16 Input Noise Voltage Spectral Density 4 1k 3 3 9 i 5 5 100 9 a o 2 o p z A 1000 1 z T 10 ul x 20 g 1 o 4 Vout x o 0 1 7 0 1 2 3 4 55 1 10 100 1k 5 WARM UP TIME Minutes 8 FREQUENCY Hz 8 Figure 14 Change in Input Offset Voltage vs Warm Up Time Figure 17 Input Noise Current Spectral Density 120 100 z POSITIVE lg p 80 0 5uV t 5 60 A n a m E 40 2 NEGATIVE lg 20 0 1 E 15 10 5 0 5 10 15 5 0 5 03 COMMON MODE VOLTAGE V E TIME Seconds 8 Figure 15 Input Bias Current vs Common Mode Voltage Figure 18 0 1 Hz to 10 Hz Noise Voltage Rev E Page 7 of 16 0704 500 A a 400 QUIESCENT CURRENT 350 Figure 19 Quiescent Supply Current vs Supply Voltage 160 5 10 15 SUPPLY VOLTAGE tV Vs 15 20 140 120 100 80 CMR dB 60 40 20 180 160 140 1 10 100 1k 10k 100k FREQUENCY Hz Figure 20 Common Mode Rejection vs Frequency Vs 15 25 1M 120 100 PSR dB 80 60 40 20 0 1
4. TYPICAL lg nA 00818 004 TEMPERATURE Figure 4 Input Bias Current Over Temperature Table 1 Low Is 125 C Model 30V 16V 1 3to 5V Next Generation Single N A AD8663 AD8603 N A Dual AD706 AD8667 AD8607 AD8622 Quad AD704 AD8669 AD8609 AD8624 One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2001 2010 Analog Devices Inc All rights reserved 0704 TABLE OF CONTENTS Features tec e 1 Applications usi iiie ien tite eie CI e o Re RS 1 General 1 Connection Diagrams 1 REVISION eee ERR ERR E RR ER 2 Specifications oett eet eie rte 3 REVISION HISTORY 1 10 Rev D to Rev E Updated Format eerte Universal Changes to Features and General Description Section Added Table 1 Renumbered Sequentially 1 Changes to Table 2 tta oben e ede etas 3 Changes to Table375 cti e ede y ND RR 5 Updated Outline Dimensions see 13 Changes to Ordering Guide see 14 12 09 Rev C to Rev D Updated Outline Dimensions sse 10 Changes to Ordering Guide sse 10 11 01 Rev B to Rev C Edits to Feat res eorr RT 1 Edits to Product Description seen 1 Edits to Absolut
5. 1k lout imA 100 2 Ay 1000 E i 10 E 2 a 1 E 2 H e Ay 1 o 01 q a 8 0 01 l 9 8 0 001 i 8 1 10 100 1k 10k 100k FREQUENCY Hz B Figure 25 Closed Loop Output Impedance vs Frequency Figure 28 Unity Gain Follower Small Signal Pulse Response Rr 0 G 100 pF Rr Vin n 0 1pF SQUARE l WAVEINPUT Vs 00818 026 00818 029 Figure 26 Unity Gain Follower for Large Signal Applications Resistor Rr Figure 29 Unity Gain Follower Small Signal Pulse Response Rr 0 Limits the Current Through the Input Protection Diodes C 1000 pF 10kQ SQUARE WAVE INPUT lt o o 2 00818 030 00818 027 Figure 27 Unity Gain Follower Large Signal Pulse Response Rr 10 Figure 30 Unity Gain Inverter Connection C 1000 pF Rev E Page 9 of 16 00818 031 00818 033 Figure 31 Unity Gain Inverter Large Signal Pulse Response 1000 pF Figure 33 Unity Gain Inverter Small Signal Pulse Response C 1000 pF 00818 032 Figure 32 Unity Gain Inverter Small Signal Pulse Response 100 pF Rev E Page 10 of 16 THEORY OF OPERATION GAIN TRIM 500kQ POT OPTIONAL AC CMRR TRIM R5 R4 2 4kQ 47 5 DC CMRR TRIM BkQ POT VNO VNO OPTIONAL BALANCE RESISTOR NOTES R2 2R2 AD704 _ C3 E 92 R6 VC1C2 1 R6 R7 R8 V C3C4 C1 R8 R9 O OUTPUT CAN BE REPLACED W
6. 0 007 0 18 127 0 075 1 91 igo ggs 4 45 0 055 1 40 0150 331 0 045 1 14 BSC 022106 A Figure 39 20 Terminal Ceramic Leadless Chip Carrier LCC E 20 1 Dimensions shown in inches and millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option AD704AR 16 40 C to 85 C 16 Lead SOIC_W RW 16 AD704AR 16 REEL 40 C to 85 C 16 Lead SOIC_W RW 16 AD704ARZ 16 40 C to 85 C 16 Lead SOIC_W RW 16 AD704ARZ 16 REEL 40 C to 85 C 16 Lead SOIC_W RW 16 AD704JN 0 C to 70 C 14 Lead PDIP N 14 AD704JNZ 0 C to 70 C 14 Lead PDIP N 14 AD704JR 16 0 C to 70 C 16 Lead SOIC_W RW 16 AD704JR 16 REEL 0 C to 70 C 16 Lead SOIC_W RW 16 AD704JRZ 16 0 C to 70 C 16 Lead SOIC_W RW 16 AD704JRZ 16 REEL 0 C to 70 C 16 Lead SOIC_W RW 16 AD704SE 883B 55 C to 125 C 20 Terminal LCC E 20 1 17 RoHS Compliant Part Rev E Page 14 of 16 0704 NOTES Rev E Page 15 of 16 0704 2001 2010 Analog Devices Inc All rights reserved Trademarks ANALOG registered trademarks are the property of their respective owners D00818 0 1 10 E DEVICES www analo g com Rev E Page 16 of 16
7. Figure 9 Typical Distribution of Input Offset Current 00818 007 00818 008 0081 8 009 Rev E Page 6 of 16 INPUT COMMON MODE VOLTAGE LIMIT V REFERRED TO SUPPLY VOLTAGES I lt e p e a a 0 5 10 15 SUPPLY VOLTAGE V 20 00818 010 Figure 10 Input Common Mode Voltage Range vs Supply Voltage 35 30 25 20 15 10 OUTPUT VOLTAGE V p p 100 10k 100k FREQUENCY Hz Figure 11 Large Signal Frequency Response SOURCE RESISTANCE MAY BE EITHER 10 OUTPUT VOLTAGE DRIFT 0 1 1k 10k 100k 1M 10M SOURCE RESISTANCE Figure 12 Offset Voltage Drift vs Source Resistance 100M 00818 011 00818 012 0704 e UNITS 9 VOLTAGE NOISE nVAHz 40 30 20 10 0 1 0 8 0 4 0 0 4 0 8
8. ANALOG DEVICES Picoampere Input Current Quad Bipolar Op Amp AD704 FEATURES High dc precision 150 pV maximum offset voltage 1 5 pV C maximum offset voltage drift 270 pA maximum input bias current 0 3 pA C typical ls drift Low noise 0 5 pV p p Typical noise 0 1 Hz to 10 Hz Low power 600 pA maximum supply current per amplifier Dual version AD706 APPLICATIONS Industrial process controls Weigh scales ECG EKG instrumentation Low frequency active filters GENERAL DESCRIPTION The AD704 is a quad low power bipolar op amp that has the low input bias current of a BiFET amplifier and offers a signifi cantly lower Is drift over temperature It uses superbeta bipolar input transistors to achieve picoampere input bias current levels similar to FET input amplifiers at room temperature while its Is typically increases only by 5x at 125 C unlike a BiFET amp for which Is doubles every 10 C resulting in a 1000x increase at 125 C In addition the AD704 achieves 150 uV offset voltage and the low noise characteristics of a precision bipolar input op amp Because it has only 1 20 the input bias current of an 07 the AD704 does not require the commonly used balancing resistor Furthermore the current noise is 1 5 that of the OP07 which makes the AD704 usable with much higher source impedances At 1 6 the supply current per amplifier of the OP07 the AD704 is better suited for today s higher density circuit boards and b
9. D TO ONE AMPLIFIER AT A TIME THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE THEN MEASURED FOR CROSSTALK 00818 005 Figure 5 Crosstalk Test Circuit 0704 80 AMP4 AMP2 100 AMP3 T B x x 120 z o o tc 140 160 8 10 100 1k 10k 100k FREQUENCY Hz 8 Figure 6 Crosstalk vs Frequency ESD CAUTION ta ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge without detection Although this product features patented or proprietary protection circuitry damage may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Rev E Page 5 of 16 0704 TYPICAL PERFORMANCE CHARACTERISTICS Ta 25 C Vs 15 V dc unless otherwise noted UNITS 26 UNITS UNITS 50 80 40 0 40 80 INPUT OFFSET VOLTAGE uV Figure 7 Typical Distribution of Input Offset Voltage 50 40 30 160 80 0 80 160 INPUT BIAS CURRENT pA Figure 8 Typical Distribution of Input Bias Current 50 40 30 20 10 120 60 0 60 120 INPUT OFFSET CURRENT pA
10. E MAXIMUM RATINGS Table 3 Parameter Rating Supply Voltage 18 V Internal Power Dissipation 25 C Input Voltage EVs Differential Input Voltage 90 7 V Output Short Circuit Duration Single Input Indefinite Storage Temperature Range 65 to 125 Operating Temperature Range AD704J 0 C to 70 AD704A 40 C to 85 C Lead Temperature Soldering 10 sec 300 C 1 Specification is for the device in free air 14 lead plastic package 150 C W 16 lead SOIC package 100 C W 20 terminal LCC package 150 C W The input pins of this amplifier are protected by back to back diodes If the differential voltage exceeds 0 7 volts external series protection resistors should be added to limit the input current to less than 25 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability AD704 s 131 pINA4 OUTPUT 0 1 0 1uF 1 INPUT SIGNAL 2500 y P VD y aa s PIN 11 NOTES 1 ALL FOUR AMPLIFIERS ARE CONNECTED AS SHOWN 1 SIGNAL INPUT SUCH THAT THE AMPLIFIER S OUTPUT IS AT MAXIMUM AMPLITUDE WITHOUT CLIPPING OR SLEW LIMITING IS APPLIE
11. ENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS Figure 37 14 Lead Plastic Dual In Line Package PDIP Narrow Body N 14 Dimensions shown in inches and millimeters 070606 A 10 50 0 4134 10 10 0 3976 7 60 0 2992 7 40 0 2913 10 65 0 4193 10 00 0 3937 1 27 0 0500 a 0 75 0 0295 4 BSC 2 65 0 1043 0 25 0 0098 0 30 0 0118 2 35 0 0925 g 0 10 0 0039 HT or COPLANARITY 0 10 0 51 0 51 0 0201 EAE 0 33 0 0130 1 27 0 0500 0 31 0 0122 0 20 0 0079 0 40 0 0157 COMPLIANT TO JEDEC STANDARDS MS 013 AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 38 16 Lead Standard Small Outline Package SOIC W Wide Body RW 16 Dimensions shown in millimeters and inches 032707 B Rev E Page 13 of 16 0704 0 100 2 54 0 064 1 63 j Ta 0 358 9 09 0353 0 342 8 69 50 d 0 088 2 24 0 054 1 37 CONTROLLING DIMENSIONS ARE IN INCHES MILLIMETER DIMENSIONS IN PARENTHESES ARE ROUNDED OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0 200 5 08 0 075 1 91 REF REF 0 100 2 54 REF 0 095 2 41 0 015 0 38 0 075 1 90 2 AMIN 0 028 0 71 0 011 0 28 0 022 0 56
12. ITH A SHORT 1 INSTRUMENTATION AMPLIFIER GAIN 1 57 Rg FOR 1 R3 R2 R4 R5 R1 2 CAPACITORS C2 AND C4 ARE SOUTHERN ELECTRONICS MPCC POLYCARBONATE 5 50V 3 ALL RESISTORS METAL FILM 1 00818 034 Figure 34 Gain of 10 Instrumentation Amplifier with Post Filtering The instrumentation amplifier with post filtering see Figure 34 combines two applications that benefit greatly from the AD704 This circuit achieves low power and dc precision over temperature with a minimum of components The instrumentation amplifier circuit offers many performance benefits including BiFET level input bias currents low input offset voltage drift and only 1 2 mA quiescent current It operates for gains that are gt 2 and at lower gains it benefits from no output amplifier offset and no noise contribution as encountered in a 3 op amp design Good low frequency CMRR is achieved even without the optional ac CMRR trim see Figure 35 Table 4 provides resistance values for three common circuit gains For other gains use the following equations R2 R5 49 9 Rl R3 49 9 KQ 0 9 G 1 Max Value of 0 06 G 1 7 2n R3 5x10 1 Table 4 Resistance Values for Various Gains Circuit Re Max Value of Bandwidth Gain G R1 Trim Potentiometer 3 dB Hz 10 6 34 166 50k 100 5260 16 6 5k 1000 56 20 1 66 0 5k
13. TY GAIN Crossover Frequency 0 8 MHz Slew Rate Unity Gain 1 0 15 V us Slew Rate Tmn Tmax 0 1 V us INPUT IMPEDANCE Differential 40 2 MQ pF Common Mode 300 2 GO pF INPUT VOLTAGE RANGE Common Mode Voltage 13 5 14 V Common Mode Rejection Ratio 13 5 V 100 132 dB Tmn Tmax 98 128 dB INPUT CURRENT NOISE 0 1 Hz to 10 Hz 3 pA p p f 10Hz 50 fA VHz INPUT VOLTAGE NOISE 0 1 Hz to 10 Hz 0 5 HV p p f 10Hz 17 nV 4Hz f 1kHz 15 22 nV 4Hz Rev E Page 3 of 16 0704 AD704J A Parameters Conditions Min Typ Max Unit OPEN LOOP GAIN Vo 12V Rioap 10 200 2000 V mV Tmn Tmax 150 1500 V mV Vo 10V Rioap 2 200 1000 V mV Tmn Tmax 150 1000 V mV OUTPUT CHARACTERISTICS Voltage Swing Rioap 10 V Tmn Tmax 13 14 Current Short circuit 15 mA CAPACITIVE LOAD Drive Capability Gain 1 10 000 pF POWER SUPPLY Rated Performance 15 V Operating Range 2 0 18 V Quiescent Current 1 5 24 mA Tmn Tmax 1 6 2 6 mA TRANSISTOR COUNT Number of transistors 180 1 Bias current specifications are guaranteed maximum at either input Input bias current match is the maximum difference between corresponding inputs of all four amplifiers CMRR match is the difference of AVos AVcm between any two amplifiers expressed in dB PSRR match is the difference between AVos AVsurety for any two amplifiers expressed in dB 5 See Figure 5 for test circuit Rev E Page 4 of 16 ABSOLUT
14. attery powered applications The AD704 is an excellent choice for use in low frequency active filters in 12 and 14 bit data acquisition systems in precision instrumentation and as a high quality integrator The AD704 is internally compensated for unity gain stability The AD704J is rated over the commercial temperature range of 0 C to 70 The AD704A is rated over the industrial temperature of 40 C to 85 C The AD704S is rated over the military temperature range of 55 C to 125 processed to MIL STD 883B Rev E Information fumished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners CONNECTION DIAGRAMS OUTPUT 1 16 OUTPUT N IN 3 IN AD704 V Vs 2 view Vs 5 IN AD704 L5 TOP VIEW u AN s t N OUTPUT 10 OUTPUT Nc a Not to Scale 9 NC NC NO CONNECT Figure 2 16 Lead SOIC R Package 00818 001 00818 002 TOP VIEW Not to Scale o p g NC NOCONNECT 00818 003 Figure 3 20 Terminal LCC E 20 1 Package
15. commended Component Values Desired Low Pass Section 1 Section 2 Response Frequency Hz Q Frequency Hz Q 1 C2 pF C3 pF C4 pF Bessel 1 43 0 522 1 60 0 806 0 116 0 107 0 160 0 0616 Butterworth 1 00 0 541 1 00 1 31 0 172 0 147 0 416 0 0609 0 1 dB Chebychev 0 648 0 619 0 948 2 18 0 304 0 198 0 733 0 0385 0 2 dB Chebychev 0 603 0 646 0 941 2 44 0 341 0 204 0 823 0 0347 0 5 dB Chebychev 0 540 0 705 0 932 2 94 0 416 0 209 1 00 0 0290 1 0 dB Chebychev 0 492 0 785 0 925 3 56 0 508 0 206 1 23 0 0242 1 Specified values are for a 3 dB point of 1 0 Hz For other frequencies simply scale the C1 through C4 capacitors directly that is for a 3 Hz Bessel response C1 0 0387 pF C2 0 0357 pF C3 0 0533 pF and C4 0 0205 pF Rev E Page 12 of 16 0704 OUTLINE DIMENSIONS 0 775 19 69 0 750 19 05 0 735 18 67 A 14 8 0 280 7 11 0 250 6 35 1 7 0 240 6 10 0 325 8 26 b je 0 310 7 87 9 00 5 ae 0 060 1 52 0 195 4 95 0 210 533 xd 0 130 3 30 115 2 92 0 150 3 81 038 PES 0 015 0 38 200 330 da PLANE 0 014 0 36 0 110 2 79 SEATING 0 014 0 36 Gu 0 022 0 56 Jl Foaso nos 0 078 0 46 JI 0 005 0 13 0 30 1 m 0 014 0 36 0 070 178 0 050 1 27 0 045 1 14 COMPLIANT TO JEDEC STANDARDS MS 001 CONTROLLING DIMENSIONS ARE IN INCHES MILLIMETER DIMENSIONS IN PARENTHESES ARE ROUNDED OFF INCH EQUIVALENTS FOR REFER
16. e Maximum Ratings seen 3 Deleted Metalization Photograph sse 3 Edits to Ordering Guide sse 4 Absolute Maximum Ratings sese 5 ESD acea e ER RR RUBER HERE 5 Typical Performance Characteristics eee 6 Theory0f 11 Outline Dimensions essere nter 13 Ordering Guides scooter 14 Rev E Page 2 of 16 SPECIFICATIONS Ta 25 C Vom 0 V and Vs 15 V dc unless otherwise noted AD704 Table 2 AD704J A Parameters Conditions Min Typ Max Unit INPUT OFFSET VOLTAGE Initial Offset 50 150 uV Offset 100 250 uV vs Temp Average TC 0 2 1 5 uV C vs Supply PSRR Vs 2V to 18 V 100 132 dB Tmn Tmax Vs 2 5 V to 18 V 100 126 dB Long Term Stability 0 3 uV month INPUT BIAS CURRENT Vem 0V 100 270 pA Vem 13 5 V 300 pA vs Temp Average TC 0 3 pA C Tmn Vem 0V 300 pA Vem 13 5 V 400 pA INPUT OFFSET CURRENT Vem 0V 80 250 pA 13 5 V 300 pA vs Temp Average TC 0 6 Tmn 0V 100 300 Vem 13 5 V 100 400 MATCHING CHARACTERISTICS Offset Voltage 250 uV Tmn 400 uV Input Bias Current 500 pA Tmn 600 Common Mode Rejection 94 dB Tmn Tmax 94 dB Power Supply Rejection 94 dB Tmin Tmax 94 dB Crosstalk f 10Hz Rioap 2 150 dB FREQUENCY RESPONSE UNI

ANALOG DEVICES AD704 handbook

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