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FREESCALE SEMICONDUCTOR Local Area Network (LIN) Enhanced Physical Interface with Selectable Slew Rate 33661 handbook

1. ee e 25 t 4 8 p gt A 0 19 JN fig oe oe A Ut ty F i 0 50 _ 0 25 a 4 0 6 2 3 8 5 8 4 6 0 25 c 1 4 soe Hy UIS PIN1 T O TAg i INDE 7 ess o 635 a 1 27 an 0 01 75 1 25 1 35 0 40 l 8X Alo lc i Ji i Yy ae BX 0 49 c 10 0 35 SEATING PLANE 0 25 C BJA ees reins Reserves MECHANICAL OUTLINE PRINT VERSION NOT TO SCALE TITLE DOCUMENT NO 98ASB42564B REV U BLD SOIC NARROW BODY CASE NUMBER 751 07 07 APR 2005 STANDARD JEDEC MS 012AA D SUFFIX EF SUFFIX PB FREE 8 PIN SOIC NARROW BODY PLASTIC PACKAGE 98ASB42564B ISSUE U 33661 Analog Integrated Circuit Device Data 18 Freescale Semiconductor REFERENCE DOCUMENTS PACKAGE DIMENSIONS REFERENCE DOCUMENTS Table 6 Reference Documents Title Literature Number Local Interconnect Network LIN Physical Interface Difference Between MC33399 and MC33661 EB215 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 19 REVISION HISTORY REVISION HISTORY REVISION DATE DESCRIPTION OF CHANGES 5 0 10 2006 Implemented Revision History page e Updated the Freescale format and style e Added MCZ33661EF R2 to the part number Ordering Information 6 0 11 2006 e Removed Peak Package Reflow Temperature During Reflow
2. 5 0 Notes 9 See Figures 7 and 8 10 10 See Figures 9 and 10 10 11 See Figures 11 and 12 11 12 See Figure 14a 11 13 See Figures 7 through 12 pp 10 11 14 This parameter is guaranteed by design however it is not production tested 15 See Figure 13 11 16 No capacitor is connected to the INH pin Measurement is done between the EN HIGH to LOW transition at 80 of INH voltage 17 See Figure 14b 11 33661 Analog Integrated Circuit Device Data 8 Freescale Semiconductor ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS 42 2 Vsup 28 4 Vsyp Vpom 1 Dominant State trec MIN gt RXD tr TIMING DIAGRAMS TXD Recessive State j VREC trec MAX lt __ _ LIN 74 4 Vsup l tpom MIN gt i I 60 Vsup l l l l Figure 4 Normal Mode Bus Timing Characteristics TXD Recessive State l VREC LIN 77 8 Vsup tpom MIN gt 60 Vsup 38 9 Vsyp 25 1 Vsup Vpom 1 1 Dominant State trEc MIN e gt RXD i l Figure 5 Slow Mode Bus Timing Characteristics Vsup Note Rg and Cp 1 0 kQ 1 0 nF 660 Q 6 8 nF and 500 0 10 nF Figure 6 Test Circuit for Timing Measurements 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 9 ELECTRICAL CHARACTERISTICS FUNCTIONAL DIAGRAMS FUNCTIONAL DIAGRAMS t INH 1 Pat gt TXD g EN l I LIN RXD
3. 50 TXD to 28 4 Vsup tpom MAX 50 Recessive Propagation Delay Time TXD to LIN 6 us Measurement Threshold 50 TXD to 42 2 Vsup trec MIN 50 Measurement Threshold 50 TXD to 74 4 Vsup trec MAX 50 Propagation Delay Time Symmetry us tpom MIN to tRec MAX dt 10 44 8 12 tpom MAX to trec MIN dtz 10 44 8 12 LIN OUTPUT TIMING CHARACTERISTICS FOR SLOW MODE Dominant Propagation Delay Time TXD to LIN 6 us Measurement Threshold 50 TXD to 61 6 Vsup tpom MIN 100 Measurement Threshold 50 TXD to 25 1 Vsup tpom MAX 100 Recessive Propagation Delay Time TXD to LIN us Measurement Threshold 50 TXD to 38 9 Vsup trec MIN 100 Measurement Threshold 50 TXD to 77 8 Vsup trec MAX 100 Propagation Delay Time Symmetry us tpom MIN to tRec MAX dtis 21 88 17 44 tpom MAX to trec MIN dtos 21 88 17 44 LIN OUTPUT DRIVER FAST MODE LIN Fast Slew Rate Programming Mode dv dt fast Vius Fast Slew Rate 15 _ LIN PIN Overcurrent Shutdown Delay Time o tOV DELAY 10 us LIN RECEIVER CHARACTERISTICS Receiver Dominant Propagation Delay Time 8 tRL us LIN LOW to RXD LOW 3 5 6 0 Receiver Recessive Propagation Delay Time RH us LIN HIGH to RXD HIGH 3 5 6 0 Receiver Propagation Delay Time Symmetry tR SYM HS tai 7 tRH see a0 Notes 6 7 0V lt Vsup lt 18 V Bus load Ro and Cp
4. DATA OUTPUT PIN RXD The RXD output pin is the MCU interface which reports the state of the LIN bus voltage LIN HIGH recessive is reported by a high voltage on RXD LIN LOW dominant is reported by a low voltage on RXD The RXD output structure is a CMOS type push pull output stage The low level is fixed The high level is dependant on the EN voltage If EN is set at 3 3 V RXD Vo is 3 3 V If EN is set at 5 0 V RXD Vo is 5 0 V Inthe Sleep mode RXD is high impedance When a wake up event is recognized from WAKE pin or from the LIN bus pin RXD is pulled LOW to report the wake up event An external pullup resistor may be needed ENABLE INPUT PIN EN The EN input pin controls the operation mode of the interface If EN 1 the interface is in Normal mode with transmission path from TXD to LIN and from LIN to RXD both active The threshold is 3 3 V and 5 0 V compatible The high level at EN defines the Vo at RXD The Sleep mode is entered by setting EN LOW while TXD is HIGH Sleep mode is active after the tsp filter time See Figure 14 11 INHIBIT OUTPUT PIN INH The INH output pin may have two main functions It may be used to control an external switchable voltage regulator having an inhibit input The high drive capability also allows it to drive the bus external resistor in the master node application This is illustrated in Figures 18 and 19 17 In Sleep mode INH is turned OFF If a voltage regulator inhibit
5. Regulator Document Number MC33661 Rev 6 0 11 2006 33661 LIN PHYSICAL INTERFACE D SUFFIX EF SUFFIX PB FREE 98ASB42564B 8 PIN SOICN ORDERING INFORMATION z Temperature Device Range T4 Package MC33661D R2 l 40 C to 125 C 8 SOICN MCZ33661EF R2 Vpwr Figure 1 33661 Simplified Application Diagram This document contains certain information on a new product Specifications and information herein are subject to change without notice Freescale Semiconductor Inc 2006 All rights reserved Z freescale semiconductor INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM WAKE INH Control EN RXD Slope Control Figure 2 33661 Simplified Internal Block Diagram 33661 Analog Integrated Circuit Device Data 2 Freescale Semiconductor PIN CONNECTIONS RXD 1 8 C INH EN C 2 7 VSUP WAKE 6 LIN TXD 5 4 GND PIN CONNECTIONS Figure 3 33661 8 SOICN Pin Connections Table 1 33661 8 SOICN Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page page 12 Pin Pin Name Formal Name Definition 1 RXD Data Output MCU interface that reports the state of the LIN bus voltage 2 EN Enable Control Controls the operation mode of the interface 3 WAKE Wake Input High voltage input used to wake
6. 1 0 nF 1 0 kQ 6 8 nF 660 Q 10 nF 500 Q 7 This parameter is guaranteed by design however it is not production tested 8 Measured between LIN signal threshold V jj Or VijnH and 50 of RXD signal 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 7 ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4 Dynamic Electrical Characteristics continued Characteristics noted under conditions 7 0 V lt Vsyp lt 18 V 40 C lt Ta lt 125 C GND 0 V unless otherwise noted Typical values noted reflect the approximate parameter means at T 25 C under nominal conditions unless otherwise noted Characteristic Symbol Min Typ Max Unit SLEEP MODE AND WAKE UP TIMINGS EN Pin Wake Up Time tuwue 5 0 15 us WAKE Pin Filter Time twe 10 _ 70 us LIN Pin Wake Up Filter Time LIN Bus Wake Up 12 twur 40 70 120 us Sleep Mode Delay Time 12 tsp us EN HIGH to LOW 50 Delay for INH Turning off When Device Enters in Sleep Mode 7 iss NG us EN HIGH to LOW and INH HIGH to LOW 50 Delay Time Between EN and TXD for Mode Selection 3 14 DME 5 0 us Delay Time Between First TXD after Device Mode Selection 42 14 B GON 50 us FAST BAUD RATE TIMING Delay Entering Fast Baud Rate Using Toggle Function 5 ty us EN LOW to EN HIGH 35 Delay on EN Pin Resetting Fast Baud Rate to Previous Baud Rate to us EN LOW to EN HIGH
7. Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3 Static Electrical Characteristics continued Characteristics noted under conditions 7 0 V lt Vsyp lt 18 V 40 C lt T4 lt 125 C GND 0 V unless otherwise noted Typical values noted reflect the approximate parameter means at T 25 C under nominal conditions unless otherwise noted Characteristic Symbol Min Typ Max Unit LIN PIN VOLTAGE EXPRESSED VERSUS Vcyp VOLTAGE Low Level Bus Voltage Dominant State Vpom V External Bus Pullup 500 Q 1 4 High Level Bus Voltage Recessive State VREC V TXD HIGH lour 1 0 pA Vsup 1 0 Internal Pullup Resistor to VSUP Normal Mode Rpu 20 30 47 kQ Internal Pullup Current Source Sleep Mode Ipu 20 uA Overcurrent Shutdown Threshold lOV CUR 50 75 150 mA Leakage Current to GND ILEAK Recessive State 8 0 V lt Vsuyp lt 18 V 8 0 V lt Vyn lt 18 V 0 3 0 20 HA GND Disconnected Venp Vsup Vin at 18 V 1 0 1 0 mA VSUP Disconnected V jy at 18 V 1 0 10 uA LIN Receiver Low Level Input Voltage VLINL V TXD HIGH RXD LOW 0 Vsup 0 4 Vsup LIN Receiver High Level Input Voltage VLINH V TXD HIGH RXD HIGH 0 6 Vsup Vsup LIN Receiver Threshold Center VLINTH V VrinH Vunt 2 0 475 Vsup 0 5 Vsup 0 525 Vsup LIN Receiver Input Voltage Hysteresis VLINHYST V ViINH VLINL 5 0 175 Vsup LIN Wake
8. Highz 7 RXD High Z Figure 9 WAKE Pin Wake Up and Normal Baud Rate Selection 1 0 kbps to 20 kbps Figure 7 EN Pin Wake Up and Normal Baud Rate Selection 1 0 kbps to 20 kbps INH F LAU ze oie toms tp com By gt lt i i os Pi LIN LIN RXD High Z Z RXD High Z L Figure 10 WAKE Pin Wake Up and Figure 8 EN Pin Wake Up and Slow Baud Rate Selection 1 0 kbps to 10 kbps Slow Baud Rate Selection 1 0 kbps to 10 kbps Wake Up Frame LIN 0 4 Vsup twur gt INH tp ms tD_COM i RXD High Z Figure 11 LIN Bus Wake Up and Normal Baud Rate Selection 1 0 kbps to 20 kbps 33661 Analog Integrated Circuit Device Data 10 Freescale Semiconductor Wake Up Frame LIN 0 4 Vsup twur Inn ri I EN i I TXD l l D MS to com i i gt RXD HighZ E Figure 12 LIN Bus Wake Up and Slow Baud Rate Selection 1 0 kbps to 10 kbps EN EN HIGH and TXD HIGH EN LOW and TXD HIGH z TXD l ty 35 us gt L Toggle ELECTRICAL CHARACTERISTICS FUNCTIONAL DIAGRAMS EN LI t gt 5 0ps 1 Reset to Previous Baud Rate Figure 13 Fast Baud Rate Selection Toggle Function od A c micm TXD Device in Communication Mode Preparation to Sleep Mode Sleep Mode tsp Figure 14a EN Preparation to Sleep Mode INH
9. Low LIN bus dominant drive LIN bus in dominant HIGH High LIN bus recessive to drive LIN bus in recessive Wait Slow Recessive state Driver off HIGH HIGH LOW HIGH 30 KQ pullup active Slow Driver active 30 kQ pullup active HIGH HIGH LOW to enter Slow mode Once Report LIN bus level Slew rate slow 10 kbps in Slow mode LOW to drive LIN Low LIN bus dominant bus in dominant HIGH to drive e High LIN bus recessive LIN bus in recessive Fast Driver active 30 KQ pullup active HIGH HIGH LOW to drive LIN bus in Report LIN bus level e Low LIN bus dominant e High LIN bus recessive X Don t care RADIATED EMISSION IN NORMAL AND SLOW MODES ELECTROMAGNETIC COMPATIBILITY The 33661 has been tested for radiated emission performances Figures 16 and 17 show the results in the frequency range 100 kHz to 2 0 MHz Test conditions are in accordance with CISPR25 recommendations bus length of 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 15 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES 1 5 meters device loaded with 10 nF and 500 bus impedance Figure 16 displays the results when the device is set in the Normal mode optimized for baud rate up to 20 kbps dBuV m Figure 17 displays the results when the device is set in the Slow mode optimized for baud rate up to 10 kbps The level of emissions is significantly reduced compared to the already excellent level of the Normal m
10. Normal or Slow Mode tes ini It gt Figure 14b Figure 14 Sleep Mode Enter Sleep Mode 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 11 FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The 33661 is a Physical Layer component dedicated to automotive LIN sub bus applications The 33661 features include slew rate selection for optimized operation at 10 kbps and 20 kbps fast baud rate for test and programming modes excellent radiated emission performance and safe behavior in case of LIN bus short to ground or LIN bus leakage during low power mode Digital inputs are 5 0 V and 3 3 V compatible without any external component required The INH output may be used to control an external voltage regulator or to drive a LIN bus pullup resistor FUNCTIONAL PIN DESCRIPTION POWER SUPPLY PIN VSUP The VSUP supply pin is the power supply pin for the 33661 The pin is connected to a battery through a serial diode for reverse battery protection The DC operating voltage is from 7 0 V to 27 V This pin sustains standard automotive voltage conditions such as 27 V DC during jump start conditions and 40 V during load dump Supply current in the Sleep mode is typically 8 0 pA GROUND PIN GND In case of a ground disconnection at the module level the 33661 does not have significant current consumption on the LIN bus pin when in the recessive state Less than 10
11. Up Threshold Voltage VLinwu 0 5 Vsup V INH OUTPUT PIN Driver ON Resistance Normal Mode INHon 35 70 Q Leakage Current Sleep Mode ILEAK uA O V lt Vink lt Vsup 0 5 0 WAKE INPUT PIN Typical Wake Up Threshold Voltage EN 0 V 7 0 V lt Vsup lt 18 V VWUTH V HIGH to LOW Transition 0 3 Vsup 0 43 Vsup 0 55 Vsup LOW to HIGH Transition 0 4 Vsup 0 55 Vsup 0 65 Vsyp Wake Up Threshold Voltage Hysteresis VWuUHYST 0 1 Vsup 0 16 Vsyp 0 2 Vsup V WAKE Input Current lwu uA Vwake lt 27 V 1 0 5 0 Notes 4 This parameter is guaranteed by design however it is not production tested 5 When Vsup gt 18 V the wake up voltage thresholds remain identical to the wake up thresholds at 18 V 33661 Analog Integrated Circuit Device Data 6 Freescale Semiconductor ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4 Dynamic Electrical Characteristics Characteristics noted under conditions 7 0 V lt Vsyp lt 18 V 40 C lt Ta lt 125 C GND 0 V unless otherwise noted Typical values noted reflect the approximate parameter means at T 25 C under nominal conditions unless otherwise noted Characteristic Symbol Min Typ Max Unit LIN OUTPUT TIMING CHARACTERISTICS FOR NORMAL MODE Dominant Propagation Delay Time TXD to LIN us Measurement Threshold 50 TXD to 58 1 Vsup tpom MIN _ 50 Measurement Threshold
12. input is connected to INH the regulator will be disabled If the master node pullup resistor is connected to INH the pullup resistor will be disabled from the LIN bus 12 Analog Integrated Circuit Device Data Freescale Semiconductor WAKE INPUT PIN WAKE The WAKE pin is a high voltage input used to wake up the device from the Sleep mode WAKE is usually connected to an external switch in the application The typical wake thresholds are Vsyp 2 The WAKE pin has a special design structure and allows wake up from both HIGH to LOW or LOW to HIGH transitions When entering into Sleep mode the LIN monitors the state of the WAKE pin and stores it as a reference state The opposite state of this reference state will be the wake up event used by the device to enter again into Normal mode Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION An internal filter is implemented 40 us typical filtering time delay WAKE pin input structure exhibits a high impedance with extremely low input current when voltage at this pin is below 14 V When voltage at the WAKE pin exceeds 14 V input current starts to sink into the device A serial resistor should be inserted in order to limit the input current mainly during transient pulses Recommended resistor value is 33 kQ Important The WAKE pin should not be left open If the wake up function is not used WAKE should be connected to gr
13. reflect the approximate parameter means at T 25 C under nominal conditions unless otherwise noted Characteristic Symbol Min Typ Max Unit VSUP PIN DEVICE POWER SUPPLY Supply Voltage Vsup V Nominal DC 7 0 13 5 18 0 Functional DC T4 25 C 6 0 Supply Current in Sleep Mode uA Vsup lt 13 5 V Recessive State Igy 8 0 12 13 5 V lt Voyp lt 18 V Iso 200 Vsup lt 13 5 V Dominant State or Shorted to GND Is3 300 Supply Current in Normal Slow or Fast Mode mA Bus Recessive Excluding INH Output Current IS REC 4 0 6 0 Bus Dominant Total Bus Load gt 500 Q Excluding INH Output Current IS DOM 6 0 8 0 RXD OUTPUT PIN LOGIC Low Level Output Voltage VoL V lin lt 1 5 MA 0 0 9 High Level Output Voltage VoH V Ven 5 0 V lout lt 250 uA 4 25 5 25 Ven 3 3 V lour lt 250 pA 3 0 3 5 TXD INPUT PIN LOGIC Low Level Input Voltage Vit 1 2 High Level Input Voltage Vin 2 5 Input Threshold Voltage Hysteresis VINHYST 100 300 800 mV Pullup Current Source Ipy uA Ven 5 0 V 1 0 V lt V xp lt 3 5 V 60 35 20 EN INPUT PIN LOGIC Low Level Input Voltage VIL 1 2 High Level Input Voltage Vin 2 5 Input Voltage Threshold Hysteresis VINHYST 100 300 800 mV Low Level Input Current liL uA Vin 1 0 V 5 0 20 30 High Level Input Current lH uA Vin 4 0 V 20 40 33661 Analog Integrated Circuit
14. solder reflow parameter from MAXIMUM RATINGS on page 4 Added note with instructions from www freescale com 33661 20 Analog Integrated Circuit Device Data Freescale Semiconductor How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com AsialPacific Freescale Semiconductor Hong Kong Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 2666 8080 support asia freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com MC33661 Rev 6 0 11 2006 RoHS compliant and or Pb free versions of Freescale produ
15. up the device from Sleep mode 4 TXD Data Input MCU interface to control the state of the LIN output 5 GND Ground Device ground pin 6 LIN LIN Bus Bidirectional pin that represents the single wire bus transmitter and receiver 7 VSUP Power Supply Device power supply pin 8 INH Inhibit Output This pin can have two main functions controlling an external switchable voltage regulator having an inhibit input or driving a bus external resistor in the master node application 33661 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2 Maximum Ratings All voltages are with respect to ground unless otherwise noted Exceeding these ratings may cause a malfunction or permanent damage to the device Ratings Symbol Value Unit ELECTRICAL RATINGS Power Supply Voltage Vsup V Continuous Supply Voltage 27 Transient Voltage Load Dump 40 WAKE DC and Transient Voltage Through a 33 kQ Serial Resistor VWAKE 18 to 40 Logic Voltage RXD TXD EN Pins VLoG 0 3 to 5 5 LIN Bus Voltage VBus DC Voltage 18 to 40 Transient Coupled Through 1 0 nF Capacitor 150 to 100 INH Voltage Current DC Voltage VINH 0 3 to Vsyp 0 3 v DC Current liNH 40 mA ESD Voltage Vesp1 v Human Body Model All Pins 2000 LIN Pin with Respect to Ground 5000 Machine Model Vespa 200 THERMAL RATINGS Operati
16. 0 pA is sourced from LIN bus pin which creates 100 mV drop voltage from the 1 0 kQ LIN bus pullup resistor LIN BUS PIN LIN This I O pin represents the single wire bus transmitter and receiver Transmitter Characteristics The LIN driver is a low side MOSFET with internal overcurrent thermal shutdown An internal pullup resistor with a serial diode structure is integrated so no external pullup components are required for the application in a slave node An additional pullup resistor of 1 0 KQ must be added when the device is used in the master node Voltage can go from 18 V to 40 V without current other than the pullup resistance The LIN pin exhibits no reverse current from the LIN bus line to VSUP even in the event of GND shift or Vpwr disconnection The transmitter has two slew rate selections 20 kbps normal slew rate and 10 kbps slow slew rate The slow slew rate can be used to improve radiated emissions Receiver Characteristics The receiver thresholds are ratiometric with the device supply pin 33661 DATA INPUT PIN TXD The TXD input pin is the MCU interface to control the state of the LIN output When TXD is LOW LIN output is LOW when TXD is HIGH the LIN output transistor is turned OFF The threshold is 3 3 V and 5 0 V compatible The baud rate selection normal or Slow mode is done at device wake up by the state of the TXD pin prior to a HIGH level at the EN pin see Figures 7 through 12 pp 10 11
17. 61 enters the Awake transitional mode with INH HIGH and RXD pulled LOW 14 Analog Integrated Circuit Device Data Freescale Semiconductor TXD HIGH and EN LOW to HIGH LIN Bus or WAKE Pin Power Up FUNCTIONAL DEVICE OPERATION TXD HIGH and EN LOW gt t 35 us Wake Up TXD LOW and EN LOW to HIGH TXD LOW and EN LOW to HIGH TXD HIGH and EN LOW to HIGH Toggle Function OPERATIONAL MODES Fast 10 x EN LOW for ty lt 5 0 us then HIGH EN LOW for t lt 5 0 us then HIGH EN LOW for tz lt 5 0 us then HIGH Toggle Function TXD HIGH and EN LOW gt ty 35 us Note Refer to Table 5 for explanation Figure 15 Operational and Transitional Modes State Diagram EN LOW for ty lt 5 0 us then HIGH Table 5 Explanation of Operational and Transitional Modes State Diagram Fast 10 x Operational Slew rate fast gt 100 kbps dominant HIGH to drive LIN bus in recessive ene LIN INH EN TXD RXD Transitional Sleep Mode Recessive state driver off LOW LOW xX High impedance HIGH if external 20 pA pullup current source pullup to Vpp Awake Recessive state driver off HIGH LOW xX LOW If external pullup HIGH to 30 KQ pullup active LOW transition reports wake up Normal Mode Driver active 30 KQ pullup active HIGH HIGH HIGH to enter Normal mode Report LIN bus level Slew rate normal 20 kbps Once in Normal mode LOW to e
18. Freescale Semiconductor Advance Information Local Area Network LIN Enhanced Physical Interface with Selectable Slew Rate Local Interconnect Network LIN is a serial communication protocol designed to support automotive networks in conjunction with Controller Area Network CAN As the lowest level of a hierarchical network LIN enables cost effective communication with sensors and actuators when all the features of CAN are not required The 33661 is a Physical Layer component dedicated to automotive LIN sub bus applications It offers slew rate selection for optimized operation at 10 kbps and 20 kbps fast baud rate above 100 kbps for test and programming modes excellent radiated emission performance and safe behavior in the event of LIN bus short to ground or LIN bus leakage during low power mode The 33661 is compatible with LIN Protocol Specification 2 0 Features Operational from Vsyp 6 0 V to 18 V DC Functional up to 27 V DC and Handles 40 V During Load Dump e Active Bus Waveshaping Offering Excellent Radiated Emission Performance e 5 0 kV ESD on LIN Bus Pin e 30 kQ Internal Pullup Resistor LIN Bus Short to Ground or High Leakage in Sleep Mode e 18 V to 40 V DC Voltage at LIN Pin e 8 0 pA in Sleep Mode e Local and Remote Wake Up Capability Reported by INH and RXD Pins e 5 0 V and 3 3 V Compatible Digital Inputs Without Any External Components Required e Pb Free Packaging Designated by Suffix Code EF
19. cts have the functionality and electrical characteristics of their non RoHS compliant and or non Pb free counterparts For further information see http www freescale com or contact your Freescale sales representative For information on Freescale s Environmental Products program go to http www freescale com epp Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does no
20. de the slew rate is around 10 times faster than the Normal mode This allows very fast data transmission gt 100 kbps for instance for electronic control unit ECU tests and microcontroller program download The bus pullup resistor might be reduced to ensure a correct RC time constant in line with the high baud rate used Fast mode can be selected from either Normal or Slow mode Fast mode is entered via a special sequence called toggle function as follows TXD and EN pins set LOW then TXD pulled HIGH and at the EN pin LOW to HIGH transition the device enters into the Fast Baud Rate The duration of this sequence must be less than 35 us The toggle function is described in Figure 13 11 Once in the Fast mode two different procedures will bring the device back to the previously selected mode Normal or Slow e The toggle function already described e Aglitch on EN where tz lt 5 0 us also resets the device to the previously selected mode Normal or Slow Figure 13 33661 SLEEP MODE In the Sleep mode the transmission path is disabled and the 33661 is in low power mode Supply current from Vsyp is very low Wake up can occur from LIN bus activity from node internal wake up through the EN pin and from the WAKE input pin Inthe Sleep mode the 33661 has an internal 20 uA pullup source to VSUP This avoids the high current path from the battery to ground in the event the bus is shorted to ground Refer to succeeding pa
21. ng Temperature C Ambient Ta 40 to 125 Junction Ty 40 to 150 Storage Temperature TsTG 40 to 150 C Thermal Resistance Junction to Ambient Roja 150 C W Peak Package Reflow Temperature During Reflow Tpprt Note 3 C Thermal Shutdown Temperature TsHuT 150 to 200 C Thermal Shutdown Hysteresis Temperature Tuyst 8 0 to 20 C Notes 1 ESD1 testing is performed in accordance with the Human Body Model Czap 100 pF Rzap 1500 Q ESD2 testing is performed in accordance with the Machine Model Cz p 220 pF Rzap 0 9 2 Pin soldering temperature limit is for 10 seconds maximum duration Not designed for immersion soldering Exceeding these limits may cause malfunction or permanent damage to the device 3 Freescale s Package Reflow capability meets Pb free requirements for JEDEC standard J STD 020C For Peak Package Reflow Temperature and Moisture Sensitivity Levels MSL Go to www freescale com search by part number e g remove prefixes suffixes and enter the core ID to view all orderable parts i e MC33xxxD enter 33xxx and review parametrics 33661 Analog Integrated Circuit Device Data 4 Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3 Static Electrical Characteristics Characteristics noted under conditions 7 0 V lt Vsup lt 18 V 40 C lt T4 lt 125 C GND 0 V unless otherwise noted Typical values noted
22. ode ee a Te TM ec E MU a YAA AT Fa as WU vA Pey DA allaa fli i a attest 100k 200k 300k 400k ee 700k 1M 2M Hz MES MOTO lin MaxPk03 Figure 16 Radiated Emis dBuV m sion in Normal Mode PaO ONE PATTE ETTA P e E 100k 200k 300k 400k 500k 700k 1M Hz MES MOTO lin MaxPk04 Figure 17 Radiated Emission in Slow Mode 33661 16 Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS TYPICAL APPLICATIONS The 33661 can be configured in several applications An additional pullup resistor of 1 0 kQ in series with a diode Figures 18 and 19 show master and slave node applications must be added when the device is used in the master node External Switch Master Node Pullup Receiver Slope Control Optional Figure 18 Master Node Typical Application External Switch Slope Control Optional fe Figure 19 Slave Node Typical Application 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 17 PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS Important For the most current revision of the package visit www freescale com and do a keyword search on the 98A drawing number below
23. ound to avoid false wake up 33661 13 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES As described below and depicted in Figure 15 and Table 5 on 15 the 33661 has two operational modes Normal and Sleep Normal mode may be adjusted to improve radiated emissions by changing the slew rate of the LIN bus output to Fast or Slow mode In addition there are two transitional modes Awake Mode which allows the device to go in Normal or Slow mode and Wait Slow mode which is a temporary state before the device enters the Slow mode NORMAL MODE In the Normal mode the 33661 has slew rate and timing compatible with the LIN protocol specification and operates from 1 0 kbps to 20 kbps This mode is selected after Sleep mode by setting the TXD pin HIGH prior to setting EN from LOW to HIGH Once Normal mode is selected it is impossible to select the Slow mode unless the 33661 is set to Sleep mode Slow Mode In the Slow mode the slew rate is around half the normal slew rate and bus speed operation ranges from 1 0 kbps to 10 kbps The radiated emission is significantly reduced compared to the already excellent emission level of the Normal mode Slow mode is entered after Sleep mode by setting the TXD pin LOW prior to setting EN from LOW to HIGH Once the Slow mode is selected it is impossible to select the Normal mode unless the device is set to Sleep mode Fast Mode In the Fast mo
24. ragraphs describing wake up behavior DEVICE POWER UP AWAKE TRANSITIONAL MODE At power up Vsup rises from zero the 33661 automatically switches to the Awake transitional mode It switches the INH pin to HIGH state and RXD to LOW state The MCU of the application will then confirm Normal or Slow mode by setting the TXD and EN pins appropriately DEVICE WAKE UP EVENTS The 33661 can be awakened from Sleep mode by three wake up events Remote wake up via LIN bus activity Internal node wake up via the EN pin e Toggling the WAKE pin Remote Wake from LIN Bus Awake Transitional Mode The LIN bus wake up is recognized by a recessive to dominant transition followed by a dominant level with a duration greater than 70 us followed by a dominant to recessive transition This is illustrated in Figures 11 and 12 on 11 Once the wake up is detected the 33661 enters the Awake transitional mode with INH HIGH and RXD pulled LOW Wake Up from Internal Node Activity Normal or Wait Slow Mode The 33661 can wake up by internal node activity through a LOW to HIGH transition of the EN pin When EN is switched from LOW to HIGH the device is awakened and enters either the Normal or the Wait Slow transitional mode depending on the level of TXD input The MCU must set the TXD pin LOW or HIGH prior to waking up the device through the EN pin Wake Up from WAKE Pin Awake Transitional Mode If the WAKE input pin is toggled the 336
25. t convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2006 All rights reserved e ao 2 freescale semiconductor

FREESCALE SEMICONDUCTOR Local Area Network (LIN) Enhanced Physical Interface with Selectable Slew Rate 33661 handbook

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