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ANALOG DEVICES AD8625 English products handbook Rev E

1. g S z tc z o o z 50M 10M FREQUENCY Hz FREQUENCY Hz Figure 21 Closed Loop Gain vs Frequency Figure 24 CMRR vs Frequency Z 3 z a oc E o 2 50M 1k 10k 100k 1M 10M FREQUENCY Hz Figure 25 PSRR vs Frequency FREQUENCY Hz Figure 22 Closed Loop Gain vs Frequency Rev E Page 9 of 20 AD8625 AD8626 AD8627 PSRR dB Zour O Zour 1k 10k 100k 1M 10 FREQUENCY Hz Figure 26 PSRR vs Frequency 100k FREQUENCY Hz Figure 27 Output Impedance vs Frequency 0 1k 10k 100k 1M 10M 100 FREQUENCY Hz Figure 28 Output Impedance vs Frequency 03023 026 03023 027 03023 028 Rev E Page 10 of 20 OUTPUT SWING V OVERSHOOT VOLTAGE 10V DIV 03023 029 TIME 400 1s DIV Figure 29 No Phase Reversal 10 s 1 TS 0 1 a eo 1 5 03023 030 0 0 5 1 0 1 5 2 0 2 5 SETTLING TIME us Figure 30 Output Swing and Error vs Settling Time Vg 13V RL 10kQ Vin 100mV p p
2. OUTPUT AMPLIFIER FOR DACs Many system designers use amplifiers as buffers on the output of amplifiers to increase the DAC s output driving capability The high resolution current output DACs need high precision amplifiers on their output as current to voltage converters I V Additionally many DACs operate with a single supply of 5 V Ina single supply application selection of a suitable op amp may be more difficult because the output swing of the amplifier does not usually include the negative rail in this case AGND This can result in some degradation of the DAC s specified performance unless the application does not use codes near zero The selected op amp needs to have very low offset voltage for a 14 bit DAC the DAC LSB is 300 uV with a 5 V reference to eliminate the need for output offset trims Input bias current should also be very low because the bias current multiplied by the DAC output impedance about 10 kQ in some cases adds to the zero code error Rail to rail input and output performance is desired For fast settling the slew rate of the op amp should not impede the settling time of the DAC Output impedance of the DAC is constant and code independent but in order to minimize gain errors the input impedance of the output amplifier should be as high as possible The AD862x with a very high input impedance Is of 1 pA and a fast slew rate is an ideal amplifier for these types of applications A typical conf
3. AD8627ARZ REEL7 40 C to 85 C 8 Lead SOIC N R 8 1 Z RoHS Compliant Part denotes product may be top or bottom marked For the AD8627AKS models pre 0542 parts were branded with B9A without 2003 2010 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners D03023 0 12 10 E ANALOG DEVICES Rev E Page 20 of 20 www analog com
4. maximum rating conditions for extended periods may affect Therefore proper ESD precautions should be taken to device reliability avoid performance degradation or loss of functionality Rev E Page 5 of 20 AD8625 AD8626 AD8627 TYPICAL PERFORMANCE CHARACTERISTICS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 600 400 200 0 200 400 600 VOLTAGE uV Figure 2 Input Offset Voltage 3 4 5 6 7 8 9 10 OFFSET VOLTAGE uV C Figure 3 Offset Voltage Drift Voy 3 5V 1 5V H 400 300 200 100 VOLTAGE uV 100 200 300 Figure 4 Input Offset Voltage 03023 002 03023 003 03023 004 Rev E Page 6 of 20 INPUT BIAS CURRENT pA NUMBER OF AMPLIFIERS INPUT BIAS CURRENT pA Vey 3 5V 1 5V 1 2 3 4 5 6 7 8 9 10 OFFSET VOLTAGE uV C Figure 5 Offset Voltage Drift 50 15 0 12 5 10 0 7 5 5 0 2 5 0 25 5 0 7 5 10 0 12 5 15 Vem V Figure 6 Input Bias Current vs Vcm 0 9 15 0 12 5 10 0 7 5 5 0 2 5 0 25 5 0 7 5 10 0 12 5 15 Vem V Figure 7 Input Bias Current vs Vom g 8 8 g S S 8 8 0 03023 005 5 5 S E amp S 3
5. 3 Absolute Maximum Ratings essere 5 ESD Cautioniz cioe ei RR ERREUR EIC 5 REVISION HISTORY 12 10 Rev D to Rev E Removed Table Summary Conditions Above Table 3 5 Updated Outline Dimensions 3 09 Rev C to Rev D Updated Outline Dimensions seen 18 Changes to Ordering Guide 11 04 Rev B to Rev C Updated Figure Codes ee Universal Changes to Figure 17 and 18 sse 8 Changes to Figure 33 and Figure 37 sss 11 Changes t Figure 38 tient eie 12 Changes to Figure 39 and Figure 40 sss 13 Changes to Figure 41 to Figure 44 14 Typical Performance Characteristics sse 6 Applications Information sese 13 Minimizing Input Current sse 15 Photodiode Preamplifier Application 15 Output Amplifier for DACSs sse 16 Eight Pole Sallen Key Low Pass Filter sss 17 Outline Dimensions eite etie titre 18 Ordering Guilde bebe En ele eau 20 1 04 Rev A to Rev B Change to General Descriptions eee 1 Change to Figure 10 tette R ER E S 7 Chiari ge to Figure liin e eee teens 7 Change to Figure 37 me B Changes to Figure 38 sse x12 Change to Output Amplifier for DACs Section an I5 Updated Outline Dimensions eere 19 10 03 Rev 0 to Rev A Addition of Two New Parts Universal Change to General Description sse 1
6. 8 0 AD8625 AD8626 AD8627 100 INPUT BIAS CURRENT pA TEMPERATURE C Figure 8 Input Bias Current vs Temperature INPUT BIAS CURRENT pA Vom V Figure 9 Input Bias Current vs Vem INPUT OFFSET VOLTAGE uV Vem V Figure 10 Input Offset Voltage vs Vem 03023 008 03023 009 03023 010 Rev E Page 7 of 20 OPEN LOOP GAIN V V INPUT OFFSET VOLTAGE uV OPEN LOOP GAIN V mV 500 Cd ILI 400 300 200 100 0 100 200 300 400 E 500 8 1 0 1 2 3 4 Vem V Figure 11 Input Offset Voltage vs Vem 10M 1M Vsy 13V Vsy 5V 100k 10k 8 0 1 1 10 100 LOAD RESISTANCE kQ Figure 12 Open Loop Gain vs Load Resistance 1000 a d b 100 c e 10 a Vey 13V Vo 11V Ry 10kQ b Vsy 13V Vo 11V RL 2kQ C Vey 5V Vo 0 5V 4 5V Ry 2kQ d Vsy 5V Vo 0 5V 4 5V Ry 10kQ 2 e Vsy 5V Vo 0 5V 4 5V R 6000 5 1 3 40 25 95 125 TEMPERATURE C Figure 13 Open Loop Gain vs Temperature Z10 20 0 AW FDVLIOA LAdLNO ASA Y10 EZ0E0 Ar 35V 110A 138340 AD8625 AD8626 AD8627 eo o 10 0 01 0 001 wo LOAD CU
7. Ay 1 03023 031 CAPACITANCE pF Figure 31 Small Signal Overshoot vs Load Capacitance AD8625 AD8626 AD8627 Vg 2 5V HL 10kQ Vin 100mV p p Ay 1 Vey 13V VOLTAGE nV OVERSHOOT 03023 032 03023 035 CAPACITANCE pF FREQUENCY kHz Figure 32 Small Signal Overshoot vs Load Capacitance Figure 35 Voltage Noise Density Vsy t13V Ayo 100 000V V e gt E E c S i E U lt G S 3 l o gt gt TIME 1s DIV FREQUENCY kHz Figure 33 0 1 Hz to 10 Hz Noise Figure 36 Voltage Noise Density Vey 2 5V Ayo 100 000V V Q gt E eo 2 U z S 13V Vin 18V p p o pz gt i k TIME 1s DIV 10 100 1k 10k 100 FREQUENCY Hz Figure 34 0 1 Hz to 10 Hz Noise Figure 37 Total Harmonic Distortion Noise vs Frequency Rev E Page 11 of 20 m CN co co co CN co co LCS CN co co co lt 20kQ 2kQ 2kQ ViN 6p0 Z0 0 9V p p Vin 4 5V p p Vin o o Gaui NOL VAV S SENNIN 150 160 FREQUENCY Hz Figure 38 C
8. gt Different numbers of the AD862x can be used depending on the desired response which is shown in Figure 48 The high value used for R1 minimizes interaction with signal source resistance Pole placement in this version of the filter minimizes the Q associated with the lower pole section of the filter This 0 eliminates any peaking of the noise contribution of resistors in the preceding sections minimizing the inherent output voltage e a 03023 047 e u E eo H el eo x FREQUENCY Hz S Figure 48 Frequency Response Output at Different Stages noise of the filter of the Low Pass Filter R11 286 5kQ R12 815 8kQ C8 3 805uF l D R8 25kO 03023 048 Figure 49 10 Hz 8 Pole Sallen Key Low Pass Filter Rev E Page 17 of 20 AD8625 AD8626 AD8627 OUTLINE DIMENSIONS 010 4 Tj i J 036 Y X 022 F 0 46 0 10 MAX os XN SFATING 038 4 Ae 0 36 COPLANARITY 0 15 0 26 0 10 072809 A COMPLIANT TO JEDEC STANDARDS MO 203 AA Figure 50 5 Lead Plastic Surface Mount Package SC70 KS 5 Dimensions shown in millimeters 5 00 0 1968 4 80 0 1890 4 00 0 1574 3 80 0 1497 6 20 0 2441 5 80 0 2284 0 50 0 0196 1 75 0 0688 M Y 0 25 0 0099 0 25 0 0098 1 35 0 0532 amp 0 10 0 0040 Y oy COPLANARITY 9 51 0 0201 F Iar eeu
9. 0 10 0 31 0 0122 0 25 0 0098 Ter 0 0500 SEATING 0 25 0 0098 540 0 0157 PLANE 0 17 0 0067 COMPLIANT TO JEDEC STANDARDS MS 012 AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 51 8 Lead Standard Small Outline Package SOIC_N Narrow Body R 8 Dimensions shown in millimeters and inches 012407 A Rev E Page 18 of 20 AD8625 AD8626 AD8627 5 15 3 20 4 90 3 00 4 65 2 80 PIN 1 IDENTIFIER E 0 65 BSC 0 95 15 MAX 0 85 1 10 MAX p 0 75 CARE L 0 80 015 j amp 1 t 023 055 0 40 6 0 55 0 05 i 925 S 09 0 40 COPLANARITY 0 25 7 0 10 E COMPLIANT TO JEDEC STANDARDS MO 187 AA Figure 52 8 Lead Mini Small Outline Package MSOP RM 8 Dimensions shown in millimeters 8 75 0 3445 p 8 55 0 3366 i i 4 00 0 1575 6 20 0 2441 3 80 0 1496 5 80 0 2283 y S wl be iil n 0 50 0 0197 45 1 75 0 0689 025 0 0098 0 25 0 0098 1 35 0 0531 8 0 10 0 0039 oh copLanarity La SEATING M 0 10 0 51 0 0201 PLANE 0 25 0 0098 27 0 0500 0 31 0 0122 0 17 0 0067 0 40 0 0157 COMPLIANT TO JEDEC STANDARDS MS 012 AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 53 14 Lead Standard S
10. 0 mV above Ground VOLTAGE 10mV DIV 03023 042 TIME 2us DIV Figure 43 Gain of Two Inverter Response to 20 mV Step Centered 20 mV below Ground The AD862x is designed for 16 nV VHz wideband input voltage noise and maintains low noise performance to low frequencies as shown in Figure 35 This noise performance along with the AD862x s low input current and current noise means that the AD862x contributes negligible noise for applications with large source resistances The AD862x has a unique bipolar rail to rail output stage that swings within 5 mV of the rail when up to 2 mA of current is drawn At larger loads the drop out voltage increases as shown in Figure 17 and Figure 18 The AD862x s wide bandwidth and fast slew rate allows it to be used with faster signals than older single supply JFETs Figure 44 shows the response of the AD862x configured in unity gain to a V of 20 V p p at 50 kHz The full power bandwidth FPBW of the part is close to 100 kHz Vey 13V BL 6000 VOLTAGE 5V DIV e L 03023 043 TIME 5us DIV Figure 44 Unity Gain Follower Response to 20 V 50 kHz Input Signal Rev E Page 14 of 20 AD8625 AD8626 AD8627 MINIMIZING INPUT CURRENT The AD862x is guaranteed to 1 pA maximum input current with a 13 V supply voltage at room temperature Careful attention to how the amplifier is used mainta
11. 5 V us Gain Bandwidth Product GBP 5 MHz Phase Margin m 60 Degrees NOISE PERFORMANCE Voltage Noise en p p 0 1 Hz to 10 Hz 1 9 uV p p Voltage Noise Density en f 1 kHz 17 5 nV VHz Current Noise Density in f 1kHz 0 4 fA VHz Channel Separation Cs f 1 kHz 104 dB Rev E Page 3 of 20 AD8625 AD8626 AD8627 Vs 13 V Vem 0 V Ta 25 C unless otherwise noted Table 2 Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage Vos 0 35 0 75 mV 40 C lt Ta lt 85 C 1 35 mV Input Bias Current lg 0 25 1 pA 40 C lt Ta lt 85 C 60 pA Input Offset Current los 0 5 pA 40 C lt Ta lt 85 C 25 pA Input Voltage Range 13 11 V Common Mode Rejection Ratio CMRR Vem 13V to 10 V 76 105 dB Large Signal Voltage Gain Avo R 10 KO Vo 11 V to 11 V 150 310 V mV Offset Voltage Drift AVos AT 40 C lt Ta lt 85 C 2 5 uV C OUTPUT CHARACTERISTICS Output Voltage High Von 412 92 V Von IL 2 mA 40 C lt TA lt 85 C 12 91 V Output Voltage Low VoL 12 92 V Vor IL 2 mA 40 C lt Ta lt 85 C 12 91 V Output Current lour 15 mA POWER SUPPLY Power Supply Rejection Ratio PSRR Vs 2 5Vto 13V 80 104 dB Supply Current Amplifier Isy 710 850 uA 40 C lt Ta lt 85 C 900 uA DYNAMIC PERFORMANCE Slew Rate SR 5 V us Gain Bandwidth Product GBP 5 MHz Phase Margin Om 60 Degrees NOISE PERFORMANCE Voltage Noise eu p p 0 1 Hz to 10 Hz 2 5 uV p p Voltage Noise Dens
12. ANALOG DEVICES Precision Low Power Single Supply JFET Amplifiers AD8625 AD8626 AD8627 FEATURES SC70 package Very low ls 1 pA max Single supply operation 5 V to 26 V Dual supply operation 2 5 V to 13 V Rail to rail output Low supply current 630 pA amp typ Low offset voltage 500 pV max Unity gain stable No phase reversal APPLICATIONS Photodiode amplifiers ATEs Line powered battery powered instrumentation Industrial controls Automotive sensors Precision filters Audio GENERAL DESCRIPTION The AD862x is a precision JFET input amplifier It features true single supply operation low power consumption and rail to rail output The outputs remain stable with capacitive loads of over 500 pF the supply current is less than 630 uA amp Applications for the AD862x include photodiode transimpedance amplification ATE reference level drivers battery management both line powered and portable instrumentation and remote sensor signal conditioning which includes automotive sensors The AD862x s ability to swing nearly rail to rail at the input and rail to rail at the output enables it to be used to buffer CMOS DACs ASICs and other wide output swing devices in single supply systems Rev E Information fumished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights ofthird parties that m
13. Changes to Pin Configurations sse 1 Change to Specifications Table sse 3 Ghangesito Figure 313 n RR ERES 10 Changes to Figure 32 un enero tet teda 11 Chan ges to Figure L esci RIA NEED UNES 12 Changes to Figure L 16 Changes to Figure 47 tenentes 16 Changes to Figure 49 Updated Outline Dimensions an Changes to Ordering Guide sse 19 Rev E Page 2 of 20 AD8625 AD8626 AD8627 SPECIFICATIONS ELECTRICAL CHARACTERISTICS Vs 5 V Vem 1 5 V Ta 25 C unless otherwise noted Table 1 Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage Vos 0 05 0 5 mV 40 C lt Ta lt 85 C 1 2 mV Input Bias Current la 0 25 1 pA 40 C lt Ta lt 85 C 60 pA Input Offset Current los 0 5 pA 40 C lt Ta lt 85 C 25 pA Input Voltage Range 0 3 V Common Mode Rejection Ratio CMRR Ven 2 0Vto 2 5V 66 87 dB Large Signal Voltage Gain Avo R 10 KO Vo 0 5 V to 4 5 V 100 230 V mV Offset Voltage Drift AVos AT 40 C lt Ta lt 85 C 2 5 UV FC OUTPUT CHARACTERISTICS Output Voltage High Von 4 92 V IL 2 mA 40 C lt Ta lt 85 C 4 90 V Output Voltage Low VoL 0 075 V IL 2 mA 40 C lt TA lt 85 C 0 08 V Output Current lour 10 mA POWER SUPPLY Power Supply Rejection Ratio PSRR Vs 5V to 26V 80 104 dB Supply Current Amplifier Isy 630 785 uA 40 C lt Ta lt 85 C 800 uA DYNAMIC PERFORMANCE Slew Rate SR
14. HOTODIODE PREAMPLIFIER APPLICATION The low input current and offset voltage levels of the AD862x together with its low voltage noise make this amplifier an excellent choice for preamplifiers used in sensitive photodiode applications In a typical photovoltaic preamp circuit shown in Figure 45 the output of the amplifier is equal to Vour 7 ID R R P R where ID photodiode signal current A R photodiode sensitivity A W R value of the feedback resistor in Q P light power incident to photodiode surface in W The amplifier s input current I5 contributes an output voltage error proportional to the value of the feedback resistor The offset voltage error Vos causes a small current error due to the photodiodes finite shunt resistance Rp The resulting output voltage error Vz is equal to R V beatos R I A shunt resistance on the order of 100 MQ is typical for a small photodiode Resistance R is a junction resistance that typically drops by a factor of two for every 10 C rise in temperature In the AD862x both the offset voltage and drift are low which helps minimize these errors With Is values of 1 pA and Vos of 50 mV Vz for Figure 45 is very negligible Also the circuit in Figure 45 results in an SNR value of 95 dB for a signal bandwidth of 30 kHz PHOTODIODE E x Q p OUTPUT Figure 45 A Photodiode Model Showing DC Error 03023 044 Rev E Page 15 of 20 AD8625 AD8626 AD8627
15. RRENT mA OUTPUT VOLTAGE V Figure 17 Output Saturation Voltage vs Load Current Figure 14 Input Error Voltage vs Output Voltage for Resistive Loads AW FDVLIOA LNdLNO ASA SLO Z0 0 RL 10kO R 100kQ POS RAIL NEG RAIL 1 o e o o e o e o wo e wo o I 10 o n e Dd N N ye I T y y I Av 35 v 110A LNANI 0 01 0 001 100 150 200 250 300 50 OUTPUT VOLTAGE FROM SUPPLY RAILS mV o LOAD CURRENT mA Figure 18 Output Saturation Voltage vs Load Current Figure 15 Input Error Voltage vs Output Voltage within 300 mV of Supply Rails 610 Ec0 0 see16eq 3SvHd ap NIVO 910 E20 0 vrl LNauuno 1Naosaino FREQUENCY Hz TOTAL SUPPLY VOLTAGE V Figure 19 Open Loop Gain and Phase Margin vs Frequency Figure 16 Quiescent Current vs Supply Voltage at Different Temperatures Rev E Page 8 of 20 AD8625 AD8626 AD8627 T 30 2 a 3 3 z 20 a c z q w o o 5 10 n 0 10 20 8 S 30 8 8 10k 100k 1M 10M 50M 1k 10k 100k 1M 10M FREQUENCY Hz Figure 23 CMRR vs Frequency FREQUENCY Hz Figure 20 Open Loop Gain and Phase Margin vs Frequency
16. ay result fromits use Specifications subjectto change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners PIN CONFIGURATIONS 8 Lead SOIC 5 Lead SC70 R 8 Suffix KS Suffix OUTA 5 v v 2 AD8627 IN 3 4 IN NC NO CONNECT 8 Lead SOIC 8 Lead MSOP R 8 Suffix RM Suffix 14 Lead SOIC 14 Lead TSSOP R Suffix RU Suffix Th ALS AD8625 o c E UU E o c 4 Oo 03023 001 Figure 1 The 5 MHz bandwidth and low offset are ideal for precision filters The AD862x is fully specified over the industrial temperature range 40 C to 85 C The AD8627 is available in both 5 lead SC70 and 8 lead SOIC surface mount packages SC70 packaged parts are available in tape and reel only The AD8626 is available in MSOP and SOIC packages while the AD8625 is available in TSSOP and SOIC packages One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2003 2010 Analog Devices Inc All rights reserved AD8625 AD8626 AD8627 TABLE OF CONTENTS EOG R e LU Lue 1 Applications inito Ea 1 Pin Configurations isetu retener itte EROS 1 General Description irira a r a 1 R vision S aroro a R E E E R EER ee 2 Specifications oie tette tete se 3 Electrical Characteristics seen
17. f greater input voltage noise This current limiting resistor should also be used if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV or if an input voltage is applied to the AD862x when Vsy 0 Either of these conditions damages the amplifier if the condition exists for more than 10 seconds A 100 kQ resistor allows the amplifier to withstand up to 10 V of continuous ov ov 4V VOLTAGE 2V DIV overvoltage while increasing the input voltage noise by a negligible amount 03023 039 TIME 2us DIV Figure 40 Unity Gain Follower Response to 0 V to 5 V Step Rev E Page 13 of 20 AD8625 AD8626 AD8627 The AD862x can safely withstand input voltages 15 V below Vsy if the total voltage between the positive supply and the input terminal is less than 26 V Figure 41 through Figure 43 show the AD862x in different configurations accommodating signals close to the negative rail The amplifier input stage typically maintains picoamp level input currents across that input voltage range 20kQ VOLTAGE 1V DIV 03023 040 TIME 2us DIV Figure 41 Gain of Two Inverter Response to 2 5 V Step Centered 1 25 V below Ground J 60mV 20mV sv 0V 6002 VOLTAGE 10mV DIV 03023 041 TIME 2us DIV Figure 42 Unity Gain Follower Response to 40 mV Step Centered 4
18. hannel Separation Rev E Page 12 of 20 AD8625 AD8626 AD8627 APPLICATIONS INFORMATION The AD862x is one of the smallest and most economical Vey 5V JFETs offered It has true single supply capability and has an input voltage range that extends below the negative rail INPUT 4V allowing the part to accommodate input signals below ground The rail to rail output of the AD862x provides the maximum dynamic range in many applications To provide a low offset 0v low noise high impedance input stage the AD862x uses n channel JFETs The input common mode voltage extends from 0 2 V below Vs to 2 V below Vs Driving the input of the amplifier configured in the unity gain buffer closer than 4V VOLTAGE 2V DIV OUTPUT 2 V to the positive rail causes an increase in common mode ov 03023 038 voltage error as illustrated in Figure 15 and a loss of amplifier bandwidth This loss of bandwidth causes the rounding of the TIME 2us DIV output waveforms shown in Figure 39 and Figure 40 which Figure 39 Unity Gain Follower Response to 0 V to 4 V Step have inputs that are 1 V and 0 V from Vs respectively The AD862x does not experience phase reversal with input signals close to the positive rail as shown in Figure 29 For t input voltages greater than Vsy a resistor in series with the AD862x s noninverting input prevents phase reversal at the expense o
19. iguration with a popular DAC is shown in Figure 46 In these situations the amplifier adds another time constant to the system increasing the settling time of the output The AD862x with 5 MHz of BW helps in achieving a faster effective settling time of the combined DAC and amplifier In applications with full 4 quadrant multiplying capability or a bipolar output swing the circuit in Figure 47 can be used In this circuit the first and second amplifiers provide a total gain of 2 which increases the output voltage span to 20 V Biasing the external amplifier with a 10 V offset from the reference voltage results in a full 4 quadrant multiplying circuit SERIAL INTERFACE OQ VnErF Vners OUT K AD5551 AD5552 LDAC DGND AGND 1 2 a AD8626 1 DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY Figure 47 4 Quadrant Multiplying Application Circuit Rev E Page 16 of 20 UNIPOLAR OUTPUT 03023 045 OV lt Vout lt 10V 03023 046 AD8625 AD8626 AD8627 EIGHT POLE SALLEN KEY LOW PASS FILTER NS The AD862x s high input impedance and dc precision make it a great selection for active filters Due to the very low bias current of the AD862x high value resistors can be used to construct low 0 8 frequency filters The AD862x s picoamp level input currents S contribute minimal dc errors Figure 49 shows an example of a E 10 Hz 8 pole Sallen Key filter constructed using the AD862x d
20. ins or possibly betters this performance The amplifier s operating temperature should be kept as low as possible Like other JFET input ampli fiers the AD862x s input current doubles for every 10 C rise in junction temperature as illustrated in Figure 8 On chip power dissipation raises the device operating temperature causing an increase in input current Reducing supply voltage to cut power dissipation reduces the AD862x s input current Heavy output loads can also increase chip temperature maintaining a minimum load resistance of 1 KQ is recommended The AD862x is designed for mounting on PC boards Main taining picoampere resolution in those environments requires alot of care Both the board and the amplifier s package have finite resistance Voltage differences between the input pins and other pins as well as PC board metal traces may cause parasitic currents larger than the AD862x s input current unless special precautions are taken To ensure the best result refer to the ADI website for proper board layout seminar materials Two common methods of minimizing parasitic leakages that should be used are guarding of the input lines and maintaining adequate insulation resistance Contaminants such as solder flux on the board s surface and the amplifier s package can greatly reduce the insulation resistance between the input pin and traces with supply or signal voltages Both the package and the board must be kept clean and dry P
21. ity en f 1kHz 16 nVv VHz Current Noise Density in f 1kHz 0 5 fA VHz Channel Separation Cs f 1kHz 105 dB Rev E Page 4 of 20 AD8625 AD8626 AD8627 ABSOLUTE MAXIMUM RATINGS Oya is specified for worst case conditions when devices are Table 3 soldered in circuit boards for surface mount packages Parameter Ratings Supply Voltage 27V Table 4 Input Voltage Vs to Vs Package Type Osa Bic Unit Differential Input Voltage Supply Voltage 5 Lead SC70 KS 376 126 C W Output Short Circuit Duration Indefinite 8 Lead MSOP RM 210 45 C W Storage Temperature Range R Package 65 C to 125 C 8 Lead SOIC R 158 43 C W Operating Temperature Range 40 C to 85 C 14 Lead SOIC R 120 36 C W Junction Temperature Range R Package 65 C to 150 C 14 Lead TSSOP RU 180 35 C W Lead Temperature Range Soldering 60 sec 300 C Stresses above those listed under Absolute Maximum Ratings ESD CAUTION may cause permanent damage to the device This is a stress ESD electrostatic discharge sensitive device rating only functional operation of the device at these or any Charged devices and circuit boards can discharge other conditions above those indicated in the operational EDE DOUG ie Uns producta features patented or proprietary protection circuitry damage section of this specification is not implied Exposure to absolute t 4 may occur on devices subjected to high energy ESD
22. mall Outline Package SOIC_N R 14 Dimensions shown in millimeters and inches 060606 A 510 HF 5 00 gt 4 90 0 1 00 MAX 02 Les ML a Lx 4 t pas f ll V SEATING Le l le 0 60 PLANE 0 45 COPLANARITY 019 0 10 061908 A COMPLIANT TO JEDEC STANDARDS MO 153 AB 1 Figure 54 14 Lead Thin Shrink Small Outline Package TSSOP RU 14 Dimensions shown in millimeters Rev E Page 19 of 20 AD8625 AD8626 AD8627 ORDERING GUIDE Model 2 Temperature Range Package Description Package Option Branding AD8625ARUZ 40 C to 85 C 14 Lead TSSOP RU 14 AD8625ARUZ REEL 40 C to 85 C 14 Lead TSSOP RU 14 AD8625AR 40 C to 85 C 14 Lead SOIC_N R 14 AD8625AR REEL 40 C to 85 C 14 Lead SOIC N R 14 AD8625AR REEL7 40 C to 85 C 14 Lead SOIC N R 14 AD8625ARZ 40 C to 85 C 14 Lead SOIC N R 14 AD8625ARZ REEL 40 C to 85 C 14 Lead SOIC N R 14 AD8625ARZ REEL7 40 C to 85 C 14 Lead SOIC N R 14 AD8626ARMZ REEL 40 C to 85 C 8 Lead MSOP RM 8 BJA AD8626ARMZ 40 C to 85 C 8 Lead MSOP RM 8 BJA AD8626ARZ 40 C to 85 C 8 Lead SOIC N R 8 AD8626ARZ REEL 40 C to 85 C 8 Lead SOIC N R 8 AD8626ARZ REEL7 40 C to 85 C 8 Lead SOIC N R 8 AD8627AKSZ REEL 40 C to 85 C 5 Lead SC70 KS 5 B9B AD8627AKSZ REEL7 40 C to 85 C 5 Lead SC70 KS 5 B9B AD8627AKSZ R2 40 C to 85 C 5 Lead SC70 KS 5 B9B AD8627ARZ 40 C to 85 C 8 Lead SOIC N R 8 AD8627ARZ REEL 40 C to 85 C 8 Lead SOIC N R 8

ANALOG DEVICES AD8625 English products handbook Rev E

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