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ANALOG DEVICES ADA4858-3 English products handbook Rev A

1. 100 1k 10k 100k 1M FREQUENCY Hz Figure 30 Input Voltage Noise vs Frequency SLEW RATE Vis 07714 028 CURRENT mA OUTPUT VOLTAGE V 07714 029 07714 030 Rev A Page 11 of 20 INPUT CURRENT NOISE pA Hz a o ADA4858 3 1 0 1 5 2 0 OUTPUT VOLTAGE V p p Figure 31 Slew Rate vs Output Voltage Vs 3 3 V POWER DOWN VOLTAGE V TIME 400ns DIV Figure 32 Enable Power Down Time 100 Ant ne k 10k 100k 1M FREQUENCY Hz Figure 33 Input Current Noise vs Frequency 07714 031 07714 033 07714 032 ADA4858 3 100 CHARGE PUMP HARMONICS 105 110 115 120 125 130 POWER dBm 135 140 145 150 0 05 10 15 20 25 30 35 40 FREQUENCY MHz Figure 34 Output Spectrum vs Frequency 4 5 07714 201 POWER dBm Rev A Page 12 of 20 CHARGE PUMP HARMONICS Vs 3 3V 05 10 15 20 25 30 35 40 45 FREQUENCY MHz Figure 35 Output Spectrum vs Frequency Vs 3 3 V 5 0 07714 202 ADA4858 3 THEORY OF OPERATION OVERVIEW The ADA4858 3 is a current feedback amplifier designed for exceptional performance as a triple amplifier with a variable gain capability Its specifications make it especially suitable
2. for SD and HD video applications The ADA4858 3 provides HD video output on a single supply as low as 3 0 V while only consuming 13 mA per amplifier It also features a power down pin PD that reduces the total quiescent current to 2 mA when activated The ADA4858 3 can be used in applications that require both ac and dc coupled inputs and outputs The output stage on the ADA4858 3 is capable of driving 2 V p p video signals into two doubly terminated video loads 150 Q each on a single 5 V supply The input range of the ADA4858 3 includes ground and the output range is limited by the output headroom set by the voltage drop across the two diodes from each rail which occurs 1 2 V from the positive supply and the charge pump negative supply rails CHARGE PUMP OPERATION The on board charge pump creates a negative supply for the amplifier It provides different negative voltages depending on the power supply voltage For a 5 V supply the negative supply generated is equal to 3 V with 150 mA of output supply current and for a 3 3 V supply the negative supply is equal to 2 V with 45 mA of output supply current Figure 36 shows the charging cycle when the supply voltage Vs charges C1 through to ground During this cycle C1 quickly charges to reach the Vs voltage The discharge cycle then begins with switching off and switching on as shown in Figure 37 When C1 C2 the charge in C1 is divided between the two capacitors
3. MAXIMUM POWER DISSIPATION W 40 20 0 20 40 60 80 100 AMBIENT TEMPERATURE C 07714 002 Figure 2 Maximum Power Dissipation vs Ambient Temperature ESD CAUTION ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge A without detection Although this product features patented or proprietary protection circuitry damage dy A may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Rev A Page 5 of 20 ADA4858 3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADA4858 3 TOP VIEW Not to Scale Vs 1 12 IN2 Ci_a 2U 11 IN2 C1_b 31 10 OUT2 CPO 475 PD NOTES 1 NC NO CONNECT 2 EXPOSED PAD CONNECT TO GROUND 07714 003 Figure 3 Pin Configuration Table 4 Pin Function Descriptions Pin No Mnemonic Description 1 Vs Positive Supply for Charge Pump 2 Cl_a Charge Pump Capacitor Side a 3 C1_b Charge Pump Capacitor Side b 4 CPO Charge Pump Output 5 Vs Positive Supply 6 IN3 Noninverting Input 3 7 IN3 Inverting Input 3 8 OUT3 Output 3 9 PD Power Down 10 OUT2 Output 2 11 IN2 Inverting Input 2 12 IN2 Noninverting Input 2 13 NC No Connect 14 IN1 Noninverting Input 1 15 IN1 Inverting Input 1 16 OUT1 Output 1 EPAD Exposed Pad EPAD The exposed pad must be connected to ground Re
4. Vg 5V 3 0 Rr 3010 G 2 Vout 2V p p 2 5 1 10 100 1000 FREQUENCY MHz 07714 040 Figure 42 Large Signal Frequency Response for Various Loads Rev A Page 14 of 20 220A R 220pA G 220pA B 74AC86 74AC86 ADA4858 3 07714 100 Figure 43 AC Coupled Video Input with DC Restored Output DC RESTORE FUNCTION Having a charge pump gives the ability to take an ac coupled input signal and restore its dc 0 V reference The simplest way of accomplishing this is to use the blanking interval and the H sync signal to set the 0 V reference Use the H sync to sample the dc level during the blanking interval to charge a capacitor and hold the charge during the video signal Figure 43 shows the schematic of the dc restored circuit The H sync coming out of the video source can be either positive or negative This is why a polarity correction circuit is used to produce only a positive going H sync The H sync is fed to a comparator that produces a high voltage if H sync is negative and a low voltage if the H sync is positive The H sync is then fed to an XOR with the output of the comparator If the original H sync was negative the output of the XOR is positive because of the logic high coming from the comparator causing the XOR to act as an inverter However if the original H sync is positive it stays the same because the output of the comparator is low and the XOR act
5. 6 Small Signal Frequency Response vs Feedback Resistor Figure 9 Large Signal Frequency Response vs Feedback Resistor Rev A Page 7 of 20 ADA4858 3 DISTORTION dBc NORMALIZED CLOSED LOOP GAIN dB PSRR dB 1 10 100 1000 FREQUENCY MHz Figure 10 Large Signal 0 1 dB Flatness vs Supply Voltage 60 HD2 70 HD3 80 1 10 100 FREQUENCY MHz Figure 11 Harmonic Distortion vs Frequency 0 1 1 10 100 400 FREQUENCY MHz Figure 12 Power Supply Rejection Ratio PSRR vs Frequency NORMALIZED CLOSED LOOP GAIN dB 07714 010 DISTORTION dBc 07714 011 CMRR dB 07714 012 Rev A Page 8 of 20 1 10 100 1000 FREQUENCY MHz Figure 13 Large Signal 0 1 dB Flatness vs Feedback Resistor 60 HD2 HD3 1 10 100 FREQUENCY MHz Figure 14 Harmonic Distortion vs Frequency Vs 3 3 V 10 100 400 FREQUENCY MHz Figure 15 Common Mode Rejection Ratio CMRR vs Frequency 07714 013 07714 014 07714 015 FORWARD ISOLATION dB OUTPUT VOLTAGE V OUTPUT VOLTAGE V 30
6. and slowly increases the voltage in C2 until it reaches a predetermined voltage 3 V for 5 V supply and 2 V for 3 3 V supply The typical charge pump charging and discharging frequency is 550 kHz with a 150 Q load and no input signal however this frequency changes with different loads and supply conditions lt H 07714 137 Figure 36 C1 Charging Cycle lt H 07714 138 Figure 37 C1 Discharging Cycle The ADA4858 3 specifications make it especially suitable for SD and HD video applications It also allows dc coupled video signals with its black level set to 0 V and its sync tip at 300 mV for YPbPr video The charge pump is always on even when the power down pin PD is enabled and the amplifiers are off However if a negative current is not used the charge pump is in an idle state Each amplifier needs 6 3 mA of current which totals 19 mA for all three amplifiers This means additional negative current may be available by the charge pump for external use Pin 4 CPO is the charge pump output that provides access to the negative supply generated by the charge pump If the negative supply is used to power another device in the system it is only possible for the 5 V supply operation In the 3 3 V supply operation the charge pump output current is very limited The capacitor C2 placed at the CPO pin which regulates the ripple of the negative voltage can be used as a coupling capacitor for the external device Howeve
7. p 88 91 dBc fc 5 MHz Vout 2 V p p 75 78 dBc Crosstalk f 5 MHz 60 dB Input Voltage Noise f 1 MHz 4 nV VHz Input Current Noise f 1 MHz IN IN 2 9 pA VHz Differential Gain Error 0 02 Differential Phase Error 0 03 Degrees DC PERFORMANCE Input Offset Voltage 14 0 7 14 mV Input Bias Current 2 0 6 2 uA Input Bias Current 13 7 13 yA Open Loop Transimpedance 300 350 kQ INPUT CHARACTERISTICS Input Resistance IN1 IN2 15 MQ IN1 IN2 90 Q Input Capacitance IN1 IN2 1 5 pF Input Common Mode Voltage Range Typical 0 9 42 2 V Common Mode Rejection Ratio 60 54 dB OUTPUT CHARACTERISTICS Output Voltage Swing 0 6 to 2 1 0 9to 2 2 V Output Overdrive Recovery Time Rise fall f 5 MHz 15 ns Maximum Linear Output Current Vout 1 Vpeak fc 1 MHz HD2 lt 50 dBc 20 mA POWER DOWN Input Voltage Enabled 1 25 V Powered down 1 35 V Bias Current 0 1 0 1 yA Turn On Time 0 3 us Turn Off Time 1 6 us POWER SUPPLY Operating Range 3 5 5 V Total Quiescent Current Amplifiers 14 19 20 mA Charge Pump 21 mA Total Quiescent Current When Powered Down Amplifiers 0 15 0 25 0 3 mA Charge Pump 2 mA Positive Power Supply Rejection Ratio 63 60 dB Negative Power Supply Rejection Ratio 57 54 dB Charge Pump Output Voltage 2 1 2 18 V Charge Pump Sink Current 45 mA Rev A Page 4 of 20 ABSOLUTE MAXIMUM RATINGS Table 3 Parameter Rating Supply Voltage 6V Internal Power Dissipatio
8. 15 MQ IN1 IN2 90 Q Input Capacitance IN1 IN2 1 5 pF Input Common Mode Voltage Range Typical 18 43 8 V Common Mode Rejection Ratio 61 54 dB OUTPUT CHARACTERISTICS Output Voltage Swing 1 4 to 3 6 1 7 to 3 7 V Output Overdrive Recovery Time Rise fall f 5 MHz 15 ns Maximum Linear Output Current Vout 1 Vpeak fc 1 MHz HD2 lt 50 dBc 21 mA POWER DOWN Input Voltage Enabled 1 9 V Powered down 2 V Bias Current 0 1 0 1 uA Turn On Time 0 3 us Turn Off Time 1 6 us POWER SUPPLY Operating Range 3 5 5 V Total Quiescent Current Amplifiers 15 19 21 mA Charge Pump 23 mA Total Quiescent Current When Powered Down Amplifiers 0 15 0 25 0 3 mA Charge Pump 4 mA Positive Power Supply Rejection Ratio 64 60 dB Negative Power Supply Rejection Ratio 58 54 dB Charge Pump Output Voltage 3 3 3 2 5 V Charge Pump Sink Current 150 mA Rev A Page 3 of 20 ADA4858 3 Ta 25 C Vs 3 3 V G 2 Re 301 Q Re 402 Q for G 1 Ri 150 Q unless otherwise noted Table 2 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE 3 dB Bandwidth Vout 0 1 V p p G 1 540 MHz Vout 0 1 V p p 340 MHz Vout 2 V p p G 1 140 MHz Vout 2 V p p 145 MHz Bandwidth for 0 1 dB Flatness Vout 2 V p p 70 MHz Slew Rate Vout 2 V step 430 V us Settling Time to 0 1 Vout 2 V step 20 ns NOISE DISTORTION PERFORMANCE Harmonic Distortion HD2 HD3 fc 1 MHz Vour 2 V p
9. 40 50 100 0 1 1 10 100 400 FREQUENCY MHz Figure 16 Forward Isolation vs Frequency 0 15 Vout 200mvV p p 0 10 0 05 0 05 0 10 0 15 TIME 5ns DIV Figure 17 Small Signal Transient Response vs Supply Voltage G 1 Vout 200mV p p 0 05 0 10 0 15 TIME 5ns DIV Figure 18 Small Signal Transient Response vs Capacitive Load 07714 016 07714 017 07714 018 CROSSTALK dB 5V V OUTPUT VOLTAGE Vs OUTPUT VOLTAGE V Rev A Page 9 of 20 ADA4858 3 20 30 40 0 1 1 10 100 400 FREQUENCY MHz Figure 19 Crosstalk vs Frequency TIME 5ns DIV Figure 20 Large Signal Transient Response vs Supply Voltage TIME 5ns DIV Figure 21 Large Signal Transient Response vs Capacitive Load 07714 019 3 3V V OUTPUT VOLTAGE Vs 07714 021 07714 020 ADA4858 3 AMPLITUDE V OUTPUT VOLTAGE V OUTPUT VOLTAGE V 0 15 Vout 200mV p p TIME 5ns DIV Figure 22 Small Signal Transient Response vs Capacitive Load 2 0 0 5 1 1 6 f l 0 4 OUTPUT 1 2 L i 0 3 I 0 8
10. ANALOG DEVICES Single Supply High Speed Triple Op Amp with Charge Pump ADA4858 3 CONNECTION DIAGRAM ADA4858 3 FEATURES Integrated charge pump Supply range 3 V to 5 5 V Output range 3 3 V to 1 8 V 50 mA maximum output current for external use at 3 V High speed amplifiers 3 dB bandwidth 600 MHz Slew rate 600 V s 0 1 dB flatness 85 MHz 0 1 settling time 18 ns Low power Total quiescent current 42 mA Power down feature High input common mode voltage range 1 8 V to 3 8 V at 5 V supply Current feedback architecture Differential gain error 0 01 Differential phase error 0 02 Available in 16 lead LFCSP APPLICATIONS Professional video Consumer video Imaging Active filters GENERAL DESCRIPTION The ADA4858 3 triple is a single supply high speed current feedback amplifier with an integrated charge pump that eliminates the need for negative supplies to output negative voltages or output a0 V level for video applications The 600 MHz 3 dB bandwidth and 600 V s slew rate make this amplifier well suited for many high speed applications In addition its 0 1 dB flatness out to 85 MHz at G 2 along with its differential gain and phase errors of 0 01 and 0 02 into a 150 Q load make it well suited for professional and consumer video applications Rev A Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its us
11. ATIONS sessssssasssecasestansssdsdanscaistdesssdadtetedeistaasus edbeasddeshnscdsstaneasouane 1 Connection Diagram cccecesseseessseesessesessesessessssessssenessesessenesenees 1 General Description iyeye ari aA 1 Revision HIStory era ected esd E RRE ER a 2 Specifications iraia R E EE E ET 3 Absolute Maximum Ratings s ssssssssssssssssssssssssrssrssreessssssssssseee 5 Maximum Power Dissipation ss ssssssssessssesssssssssrssssssessrsrsssessss 5 ESD Cautions riya kara eee eee 5 Pin Configuration and Function Descriptions 6 Typical Performance Characteristics cssssessesseessesesssessesseens 7 THEOrY Of OPeTatiOn s csrscssesssecdessievsscoasnvessosiecnssostenesssstnscsssthonsscione 13 OVER VIC Wna eteesi arrsa editora aie Trea aE orea era iSe seia Charge Pump Operation REVISION HISTORY 5 09 Rev 0 to Rev A Changes to Overview Section and Charge Pump Operation SOCHOM 55 2 eeb co sedesscbided dcbadedeesedededessietecesudesedebucedestueesssebodetedesseetuces 13 Changes to Table 5 and Figure 41 eeesessessesseseeseeseeseeneenes 14 Added DC Restore Function Section Figure 43 Clamp Amplifier Section and Figure 44 0 cccesessssssesseeseesesseesesseesees 15 10 08 Revision 0 Initial Version Applications Information cceessesssesesseesessesssesessesssesseeseess 14 Gain Configurations iiscsscissssssssssecsissiasssecanenssiesbvacasosiessdsessesssanrte 14 DC Coupled Video Signal eee esesseseesseseeseeseen
12. EO SIGNAL The ADA4858 3 does not have a rail to rail output stage The output can be within 1 V of the rails Having a charge pump on board that can provide 3 V on a 5 V supply and 2 V on 3 3 V supply makes this part excellent for video applications In dc coupled applications the black color has a 0 V voltage reference This means that the output voltage should be able to reach 0 V which is feasible with the presence of the charge pump Figure 40 shows the schematic of a dc coupled single supply application It is similar to the dual supply application in which the input is properly terminated with a 50 Q resistor to ground The amplifier itself is set at a gain of 2 to account for the input termination loss The choice of Rr and Re should be carefully considered for maximun flatness vs power dissipation trade off In this case the flatness is over 90 MHz which is more than the high definition video requirement 07714 141 Figure 40 DC Coupled Single Supply Schematic MULTIPLE VIDEO DRIVER In applications requiring that multiple video loads be driven simultaneously the ADA4858 3 can deliver 5 V supply operation Figure 41 shows the ADA4858 3 configured with two video loads and Figure 42 shows the two video load performances Re 3010 750 VY 75Q CABLE 07714 142 Figure 41 Video Driver Schematic for Two Video Loads 6 5 RL 1500 6 0 5 5 R 750 5 0 4 5 4 0 CLOSED LOOP GAIN dB 3 5
13. FER TO J RE THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 0 i GOPLANARITY SECTION OF THIS DATA SHEET SEATING PLANE 072808 A COMPLIANT TO JEDEC STANDARDS MO 220 VGGC Figure 45 16 Lead Lead Frame Chip Scale Package LFCSP_VQ 4mm x 4 mm Body Very Thin Quad CP 16 4 Dimensions shown in millimeters ORDERING GUIDE Model ADA4858 3ACPZ R2 40 C to 105 C 16 Lead LFCSP_VQ CP 16 4 250 ADA4858 3ACPZ R7 40 C to 105 C 16 Lead LFCSP_VQ CP 16 4 1 500 ADA4858 3ACPZ RL 40 C to 105 C 16 Lead LFCSP_VQ CP 16 4 5 000 1 Z RoHS Compliant Part Rev A Page 17 of 20 ADA4858 3 NOTES Rev A Page 18 of 20 ADA4858 3 NOTES Rev A Page 19 of 20 ADA4858 3 NOTES 2008 2009 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners D07714 0 5 09 A DEVICES www analo g com Rev A Page 20 of 20
14. e nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners NOTES 1 NC NO CONNECT 2 EXPOSED PAD CONNECT TO GROUND 07714 001 Figure 1 This triple operational amplifier is designed to operate on supply voltages of 3 3 V to 5 V using only 42 mA of total quiescent current including the charge pump To further reduce the power consumption it is equipped with a power down feature that lowers the total supply current to as low as 2 5 mA when the amplifier is not being used Even in power down mode the charge pump can be used to power external components The maximum output current for external use is 50 mA at 3 V The amplifier also has a wide input common mode voltage range that extends from 1 8 V below ground to 1 2 V below the positive rail at a 5 V supply The ADA4858 3 is available in a 16 lead LFCSP and it is designed to work over the extended industrial temperature range of 40 C to 105 C One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2008 2009 Analog Devices Inc All rights reserved ADA4858 3 TABLE OF CONTENTS WSC 100 ot Oa era RRO GS RR a ene OOS 1 APPLIC
15. eeneesesses 14 Multiple Video Driver sriid 14 DC Restore FUN CON snye R E 15 Clamp Amplifier e AR 15 PD Power Down Pin c cesesssssssssesssssssesesssscesecscseseecsesesesesees 16 Power Supply Bypassing c ssscesesssessesseessessessessessessessseeseenee 16 La yOUty eiei ited eateries 16 Outline Dimensions 00 0 eeesseeseeseesessesseseseeseeseeaeeneeneenesseneens 17 Orderine Guderiana a acces Aaa tonne 17 Rev A Page 2 of 20 SPECIFICATIONS Ta 25 C Vs 5 V G 2 Re 301 Q Re 402 Q for G 1 Ri 150 Q unless otherwise noted ADA4858 3 Table 1 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE 3 dB Bandwidth Vout 0 1V p p G 1 600 MHz Vout 0 1 V p p 350 MHz Vout 2 V p p G 1 165 MHz Vout 2 V p p 175 MHz Bandwidth for 0 1 dB Flatness Vout 2 V p p 85 MHz Slew Rate Vout 2 V step 600 V us Settling Time to 0 1 Vour 2 V step 18 ns NOISE DISTORTION PERFORMANCE Harmonic Distortion HD2 HD3 fc 1 MHz Vout 2 V p p 86 94 dBc fc 5 MHz Vout 2 V p p 71 84 dBc Crosstalk f 5 MHz 60 dB Input Voltage Noise f 1 MHz 4 nV VHz Input Current Noise f 1 MHz IN IN 2 9 pA VHz Differential Gain Error 0 01 Differential Phase Error 0 02 Degrees DC PERFORMANCE Input Offset Voltage 14 0 5 14 mV Input Bias Current 2 0 7 2 uA Input Bias Current 13 8 13 uA Open Loop Transimpedance 300 390 kQ INPUT CHARACTERISTICS Input Resistance IN1 IN2
16. l 7 INPUT 0 2 I 0 4 0 1 1 i 1 i 0 4 0 i 0 4 0 1 l ERROR 0 8 0 2 i 1 2 l 0 3 I 1 6 l 0 4 I 20 0 5 5 0 5 10 15 20 25 30 35 40 TIME ns Figure 23 Settling Time Rise 5 2 5 V IN NX 4 2 0 3 Vout 1 5 2 1 0 1 0 5 0 0 1 0 5 1 0 33 1 5 Figure 24 Output Overdrive Recovery TIME 20ns DIV OUTPUT VOLTAGE V 07714 022 TIME 5ns DIV Figure 25 Large Signal Transient Response vs Capacitive Load ERROR AMPLITUDE V 5 0 5 10 15 20 25 30 35 40 TIME ns Figure 26 Settling Time Fall 07714 023 INPUT VOLTAGE V OUTPUT VOLTAGE V 07714 024 TIME 20ns DIV Figure 27 Output Overdrive Recovery Vs 3 3 V Rev A Page 10 of 20 07714 025 ERROR INPUT VOLTAGE V 07714 026 07714 027 CHARGE PUMP OUTPUT VOLTAGE V SLEW RATE Vis INPUT VOLTAGE NOISE nVA Hz 0 0 5 1 0 1 5 2 0 2 5 OUTPUT VOLTAGE V p p Figure 28 Slew Rate vs Output Voltage CHARGE PUMP CURREN X A AMPLIFIER CURRENT 7 OUTPUT VOLTAGE 2 5 3 0 3 5 4 0 4 5 5 0 CHARGE PUMP SUPPLY VOLTAGE V Figure 29 Charge Pump Output Voltage and Current vs Charge Pump Supply Voltage 20 18
17. n 16 Lead LFCSP See Figure 2 Input Voltage Common Mode Vs 0 2 V to 4Vs 1 2 V Differential Input Voltage V5 Output Short Circuit Duration Observe power derating curves Storage Temperature Range 65 C to 125 C Operating Temperature Range 40 C to 105 C Lead Temperature 300 C Soldering 10 sec 1 Specification is for device in free air Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ADA4858 3 MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the ADA4858 3 is limited by the associated rise in junction temperature The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic approximately 150 C Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package Exceeding a junction temperature of 175 C for an extended period can result in device failure To ensure proper operation it is necessary to observe the maximum power derating curves in Figure 2 2 5 2 0 0 5
18. n the voltage applied to the PD pin is greater than a certain voltage from ground Ina 5 V supply application the voltage is greater than 2 V and in a 3 3 V supply application the voltage is greater than 1 5 V The amplifier is enabled whenever the PD pin is left floating not connected If the PD pin is not used it is best to leave it floating or connected to ground Note that the power down feature does not control the charge pump output voltage and current Table 6 Power Down Voltage Control PD Pin 5V 3 3 V Not Active lt 1 5V lt 1 V Active gt 2V gt 1 5V POWER SUPPLY BYPASSING Careful attention must be paid to bypassing the power supply pins of the ADA4858 3 High quality capacitors with low equivalent series resistance ESR such as multilayer ceramic capacitors MLCCs should be used to minimize supply voltage ripple and power dissipation A large usually tantalum capacitor between 2 2 uF to 47 uF located in proximity to the ADA4858 3 is required to provide good decoupling for lower frequency signals The actual value is determined by the circuit transient and frequency requirements In addition place 0 1 uF MLCC decoupling capacitors as close to each of the power supply pins and across from both supplies as is physically possible no more than 1 8 inch away The ground returns should terminate immediately into the ground plane Placing the bypass capacitor return close to the load return minimizes ground loop
19. r the charge pump current should be limited to a maximum of 50 mA for external use When powering down the ADA4858 3 the charge pump is not affected and its output voltage and current are still available for external use It is recommended to use 1 uF low ESR and low ESL capacitors for C1 and C2 These capactiors should be placed very close to the part C1 should be placed between Pin Cl_a and Pin C1_b and C2 should be placed between Pin CPO and ground If the charge pump ripple at the CPO pin is too high larger capacitors that is 4 7 uF can replace the 1 uF at C1 and C2 Rev A Page 13 of 20 ADA4858 3 APPLICATIONS INFORMATION GAIN CONFIGURATIONS The ADA4858 3 is a single supply high speed voltage feedback amplifier Table 5 provides a convenient reference for quickly determining the feedback and gain set resistor values and band width for common gain configurations Table 5 Recommended Values and Frequency Performance Small Signal Large Signal 0 1 dB Gain Re Q Ra Q 3 dB BW MHz Flatness MHz 1 402 N A 600 88 2 301 301 350 85 5 200 40 160 35 Conditions Vs 5 V Ta 25 C Ri 150 Q Figure 38 and Figure 39 show the typical noninverting and inverting configurations and the recommended bypass capacitor values Vs 10pF O O Vout 07714 139 Figure 38 Noninverting Gain Configuration Vs 07714 140 Figure 39 Inverting Gain Configuration DC COUPLED VID
20. s and improves performance LAYOUT As is the case with all high speed applications careful attention to printed circuit board PCB layout details prevents associated board parasitics from becoming problematic The ADA4858 3 can operate at up to 600 MHz therefore proper RF design techniques must be employed The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path Removing the ground plane on all layers from the area near and under the input and output pins reduces stray capacitance Keep signal lines connecting the feedback and gain resistors as short as possible to minimize the inductance and stray capacitance associated with these traces Place termination resistors and loads as close as possible to their respective inputs and outputs Keep input and output traces as far apart as possible to minimize coupling crosstalk through the board Adherence to microstrip or stripline design techniques for long signal traces greater than 1 inch is recommended For more information on high speed board layout see A Practical Guide to High Speed Printed Circuit Board Layout Analog Dialogue Volume 39 Number 3 September 2005 at www analog com Rev A Page 16 of 20 ADA4858 3 OUTLINE DIMENSIONS p 0 60 MAX BOTTOM VIEW PIN 1 INDICATOR PIN 1 INDICATOR 2 25 2 2 10 SQ 95 0 25 MIN 1 95 BSC FOR PROPER CONNECTION OF THE EXPOSED PAD RE
21. s as a buffer The result is a positive going H sync triggering the MOSFET during the blanking interval This shorts the 4 7 nF capacitor to ground which causes it to charge up by the dc level of the current signal When the H sync goes low the MOSFET opens and the capacitor holds the charge during the video signal making the output signal referenced to ground or 0 V level CLAMP AMPLIFIER In some applications a current output DAC driving a resistor may not have a negative supply available In such case the YPbPr video signal may be shifted up by 300 mV to avoid clamping the sync tip These applications require a signal dc clamp on the output of the video driver to restore the dc level to 0 V reference The ADA4858 3 has a charge pump that allows the output to swing negative twice the sync tip 600 mV in G 2 configuration Figure 44 shows the ADA4858 3 in a difference amplifier configuration The video signal is connected to the noninverting side and a dc bias of 600 mV is injected on the inverting side Voc 5V ADA4858 3 Pb ADA4860 1 Vcc 5V 07714 101 Figure 44 Clamp Amp Rev A Page 15 of 20 ADA4858 3 PD POWER DOWN PIN The ADA4858 3 is equipped with a PD power down pin for all three amplifiers This allows the user to reduce the quiescent supply current when an amplifier is not active The power down threshold levels are derived from ground level The amplifiers are powered down whe
22. v A Page 6 of 20 ADA4858 3 TYPICAL PERFORMANCE CHARACTERISTICS Ta 25 C Vs 5 V G 2 Rr 301 Q Re 402 Q for G 1 Re 200 Q for G 5 Ri 150 Q large signal Vour 2 V p p and small signal Vour 0 1 V p p unless otherwise noted NORMALIZED CLOSED LOOP GAIN dB b NORMALIZED CLOSED LOOP GAIN dB 1 10 100 1000 FREQUENCY MHz 1 10 100 1000 FREQUENCY MHz 07714 004 07714 007 Figure 4 Small Signal Frequency Response vs Gain Figure 7 Large Signal Frequency Response vs Gain 2 2 Vs 3 3V Vs 3 3V L G NORMALIZED CLOSED LOOP GAIN dB bs NORMALIZED CLOSED LOOP GAIN dB I o i 7 8 8 1 10 100 1000 FREQUENCY MHz 1 10 100 1000 FREQUENCY MHz 07714 005 07714 008 Figure 5 Small Signal Frequency Response vs Gain Figure 8 Large Signal Frequency Response vs Gain NORMALIZED CLOSED LOOP GAIN dB NORMALIZED CLOSED LOOP GAIN dB 1 10 100 1000 FREQUENCY MHz 07714 006 07714 009 FREQUENCY MHz Figure

ANALOG DEVICES ADA4858-3 English products handbook Rev A

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