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Philips LPC3000 Evaluation Board user manual

1. Jumper PCB Legend Position Description JP25 0 9V 1 2V FITTED D Connects the MCU 0 9V 1 2V Core voltages REMOVED Allows multimeter to measure the current drawn by the MCU 0 9V 1 2V Core voltages JP19 REMOVED D 0 9V 1 2V core voltage regulator output is set by the signal HIGHCORE 1 2V for HIGHCORE LOW 0 9V for HIGHCORE HIGH FITTED 0 9V 1 2V core voltage regulator output is set to 0 9V JP34 FIXED MODE REMOVED D 1 2V for HIGHCORE LOW is FITTED configured as 1 17V 1 31V variable mode controlled by the potentiometer R89 1 2V for HIGHCORE LOW is configured as 1 17V fixed mode 12 1 2V RTC voltage regulator U9 to supply the MCU 1 2V RTC voltages VDDrtc12 VDDrtcosc12 VDDrtccore Appendix Figure 2 Table 2 6 1 2V RTC Voltage Regulator Configuration Jumpers Jumper PCB Legend Position Description JP26 1 2V FITTED D Connects the MCU 1 2V RTC voltages REMOVED Allows multimeter to measure the current drawn by the MCU 1 2V RTC voltages JP21 REMOVED D 1 2V RTC voltage regulator output is set to 1 2V FITTED 1 2V RTC voltage regulator output is set to 0 9V JP20 RTC EXT 5 0V FITTED D 1 2V RTC voltage regulator input is connected to the power supply input connector J17 REMOVED 1 2V RTC voltage regulator input is disconnected from the power supply input connector J17 1 2V RTC voltage regulator input can then be connected to
2. Jumper JP28 Jumper PCB Legend Position Description JP28 LOCKPRE 2 3 D LOCK MECHANISM amp POWER ON AUTO READ disabled 1 2 LOCK MECHANISM amp POWER ON AUTO READ enabled 2 12 ADC Configuration Jumper 2 12 1 ADC Configuration Jumper JP33 Appendix Figure 4 Table 2 16 ADC Configuration Jumper Jumper PCB Legend Position Description JP33 ADIN1 FITTED D Connects ADINI to 0 9V 1 2V Core voltage REMOVED Disconnects ADINI to 0 9V 1 2V Core Voltage 23 2 12 2 Potentiometer R83 Appendix Figure 4 ADING is connected to the 3 0V voltage through the potentiometer R83 2 13 User Input Push Button Switches 2 13 1 User Input Push Button Switch S2 Appendix Figure 4 An active low push button switch S2 is connected to GPI 4 2 13 2 User Input Push Button Switch 83 Appendix Figure 4 An active low push button switch S3 is connected to GPI 6 2 13 3 User Input Push Button Switch S4 Appendix Figure 4 An active low push button switch S3 is connected to GPI 7 2 13 4 User Input Push Button Switch S5 Appendix Figure 4 An active low push button switch S5 is connected to GPI 11 2 14 User Output LEDs 2 14 1 User Output LED D3 Appendix Figure 5 LED D3 is driven by GPO 9 24 2 14 2 User Output LED D4 Appendix Figure 5 LED D4 is driven by GPO 10 25 3 Default Jumpers Summary Table 3 1 EVB CPU Board Default Jum
3. Emulator Configuration Hdw Config Processor Endian Mode noHau C Big MSB First Clock MHz Delay after Reset ms 13 300 te Little LSB First Reset Method HW Hardware Reset C HVVC HVV w Catchpoint Address fo Jtag Chain C HWB HW w Break Number Of Jtag Devices C SIM Simulated Reset set PC JTAG Clock Speed Auto Speed at Reset Configure Slow Target JTAG Clock MHz 0 5 Cancel Help About Prev Erin Figure 2 15 Emulator Configuration Window Displaying the Hdw Config Tab 36 Hardware Configuration Tab The initial configuration settings are read from the Startup bas file when the debugger initializes After the initial startup and configuration of Seehau the configuration parameters are saved in the Startup bas file located in the Macro subdirectory The next time the emulator is started the configuration parameters are read from the Startup bas file and compared with the default parameters on the chip Processor Shown for reference only This is the selected processor If you need to change the processor click Prev Clock MHz This is used for the trace timestamp only Enables you to set the clock speed Delay after Reset ms Used to set the time to wait after reset before accessing the hardware This allows the target to complete reset operations such as loading the logic into an FPGA Remap This is used in the ARM chip for rem
4. Table 2 18 EVB Main Board Default Jumpers Summary Table cont Jumper PCB Legend Position Description JP2 FITTED D Connects U2_TX to MAXIM MAX3232ECAE device JP3 FITTED D Connects U2_RX to MAXIM MAX3232ECAE device JP4 FITTED D Connects U2 HRTS to MAXIM MAX3232ECAE device JP5 FITTED D Connects U2 HCTS to MAXIM MAX3232ECAE device JP12 1 2 D Connects U7_TX to MAXIM MAX3232ECAE device JP13 1 2 D Connects U7_RX to MAXIM MAX3232ECAE device JP10 FITTED D Connects U7_HRTS to MAXIM MAX3232ECAE device JP11 FITTED D Connects U7_HCTS to MAXIM MAX3232ECAE device JP6 FITTED D Connects US TX to MAXIM MAX3232ECAE device JP7 FITTED D Connects US RX to MAXIM MAX3232ECAE device JP8 REMOVED D Notin use JP9 REMOVED D Not in use JP1 ADR FITTED D The I2C bus address for the Philips ISP1301 is 0101101 0x2D JP30 SCL 1 2 D Connects I2C1 SCL JP31 SDA 1 2 D Connects I2C1 SDA JP29 WP N 1 2 D Accepts program or erase operations JP28 LOCKPRE REMOVED D Not using LOCK MECHANISM amp POWER ON AUTO READ is not supported JP33 ADIN1 FITTED D Connects ADINI to 0 9V 1 2V Core voltage 4 Break Out Headers This section details the pinout for the break out headers on the EVB All of the break out headers are all 0 05 inch pitch headers SAMTEC FTR 140 52 G D A 28 4 1 Break Out Header J5
5. Philips LPC3000 Evaluation Board Users Manual Peper te DORI Bie Le TE ELET 5 r gt gt c b l t d ik b a q d sl F ca b Revision History Revision Date Author Comments A 11 Aug 6 2006 Chun Sing Chu Edit Pass 5 Release Mike Quirk 2005 06 by NOHAU All Rights Reserved Table of Contents A UEC eil 6 EVB F at te Ebu D no a 6 EVB GontipurdtlOfi snc illo dada 7 System RTC Oscillator Selection senile E RS 9 System Oscillator Selection Jumpers JPT SPA ER tesi oS vee eset D q 9 RTE OSC MT m 2 AD Perd id eus 10 Power Supply Conf Ural 10 Power Supply Input Connector 317 eese ee eeeeee cnn cono iena 10 Power Supply Configuration Jumpers nono nconnc cono ee cono RA coronan ee enne 11 ECD Voltage Regulator Ud a 13 LCD Contrast Adjustment R86 enne nennen enne rennen nennen nennen 13 Power Status LED D2 se RE ee teh ato eren 13 MAGTE FB Conero nile 14 is a oe du en T a Fui ntes c UNDE 15 Boot Select Input Configuration Jumper JP32 ee RA Re ee ee RA ee Re ee ee ee ee ee 16 RS232 Conf g ration ss cerina ajuda ADA 17 UART 2 Configuration Jumpers JP2 JP3 JP4 IPS 17 UART 1 7 Configuration Jumpers JP12 JP13 JP10 JP11 ese se se ee ee ee 18 UART 5 Configuration Jumpers JP6 JP7 JP8 IPO lele i 19 SD Card Connettor MS EE ES Ee Ge a a
6. 2 Click Finish If you do not choose to automatically start the Seehau Configuration Program do the following From the Start menu select Programs Select SeehauARM then click Config to open the Emulator Configuration window displaying the Connect tab Figure 2 14 Please note that it is not necessary to be connected at this time Emulator Configuration Connect Select Emulator Connection Universal Serial Bus Select Processor Philips LPC3000 What is your Trace Type None Cancel Help About Prev H Figure 2 14 Emulator Configuration Window Displaying the Connect Tab 35 Configuring the Communications Interface Connect Tab The graphical user interface for this tab is divided into four regions 1 Region 1 Communications Interface Displays the three communications interface options for the ARM The USB is for the pod only If you have the optional Compact Trace Module CTM choose the USB CTM in the middle The third box is for the GigaTrace option 2 Region 2 Select Emulator Connection No action required Default is Universal Serial Bus 3 Region 3 Select Processor Default is ARM generic Click on the arrow to view the drop down list for the other devices For ARMI select ARM9 generic 4 Region 4 What is your Trace Type The default is Yes if trace is supported based on earlier selections 5 Click Next The Hdw Config tab opens Figure 2 15
7. If there are multiple images to be program into the device then in order to avoid the overlapping of the images because of the Skip 45 Block Method the user should keep a reasonable margin when specify the starting block position of the image ECC Generation For MLC it features HW support for Reed Salomon Enable Encoding Decoding 10 bit symbols capable to correction of 4 symbol 4 40bit without SW needed For SLC it features HW support for ECC Error Checking and Correction on main area data If an error is detected the SW must correct it The ECC on the spare area must be done in SW ECC Generation For SLC the ECC 3Byte generation of the main area is done by HW and is Locations M10 M22 based on data blocks of 256Byte 6 3 NAND Flash Erase To erase a block or range of blocks in the NAND Flash you can click on the Erase NAND Flash button on the Main Dialog Box You will then see a screen like what is shown in figure 2 23 NAND Flash Erase Bi xj Starting Block Length co Figure 2 23 NAND Flash Erase Dialog Box Select the starting block number and a length of blocks to be erased Enter a 1 for just a single block 46 RTC Oscillator SYSTEM Oscillator Jumper Selections a NOHAU S N e 4 PHILIPS LPE3000 dd vidi BOARD 201 BERE sd d qe E E Appendix Figure 1 47 8r T Smal xipuoddy Jojoouu aam M sedunf uonenu5yuoo SNES Jamod JoxeinBay eDeyoA Ag I yast
8. external 5 0V power supply through the pin 1 of JP20 JP27 RTC EXT BIAS 1 2 D When JP20 is fitted 2 3 When JP20 is removed 2 2 3 LCD Voltage Regulator U20 3 3V LCD voltage regulator U20 to supply the LCD voltage 2 2 3 1 LCD Contrast Adjustment R86 The Contrast Adjustment for the LCD is controlled by the potentiometer R86 2 2 4 Power Status LED D2 When power is applied to the EVB the green Power Status LED D2 adjacent to the Power Supply Input Connector J17 shows the presence of the 5 0V supply voltage 13 Appendix Figure 2 2 3 JTAG ETB Connector J18 Appendix Figure 3 The JTAG ETB connector J18 on the edge of the EVB supports the 20 pin debug interface connector About ETB Embedded Trace Buffer As process speeds increase it is increasingly difficult to obtain trace information off a chip from the Embedded Trace Macrocell ETM This causes difficulties in maintaining acceptable signal quality or the signals need to be demultiplexed on to what can become a very large number of trace port pins The solution is to provide a buffer area on chip where the trace information is stored and read from the chip latter at a slower rate The ETB stores data produced by the ETM The buffered data can then be accessed by the debugging tools using a JTAG IEEE 1149 1 interface as shown in figure 2 6 Important When connecting or removing the JTAG ETB debug interface
9. GND NC O O VDD28 NC O O NC NC O O NC GND O O VDD28 NC O O VDD28 GND O O GND GND O O VDD28 GND O O NC NC O O GND VDD28 O O NC NC O O NC RESET_N O O GND GND O O NC Figure 2 13 Break Out Header J8 32 5 Seehau Configuration Installing from the CD To install the Sechau software do the following 1 2 Insert the Seehau CD into your CD ROM drive The installation process will start automatically Click Install Seehau Interface for EMUL ARM and follow the instructions that appear on your screen If the installation does not start automatically you might have your Windows Autorun feature disabled You will then need to do one of three things Use Windows Explorer and navigate to the CD root directory Double click Autorun exe The Windows Install Shield will start the installation process Right click on the CD ROM symbol while running Windows Explorer and select AutoPlay to start the installation process From the taskbar select Start then Settings Click on Control Panel then Add Remove Programs and then Install The installation process will start when you select the correct path to the CD Downloading and Installing the Seehau Software From the Internet 1 Go to the Nohau web site http www nohau com Click Downloads The Nohau Software Downloads page opens Click Current Seehau Software The Seehau Software Status page opens Locate the EMUL ARM product listing There will be two li
10. Jumper serene 11 Table 2 3 3 0V Voltage Regulator Configuration Jumper eee 11 Table 2 4 1 2V Voltage Regulator Configuration Jumper i 12 Table 2 4 1 2V Voltage Regulator Configuration Jumper seen 12 Table 2 5 0 9V 1 2V Core Voltage Regulator Configuration Jumpers ee RA ee 12 Table 2 5 0 9V 1 2V Core Voltage Regulator Configuration Jumpers 12 Table 2 6 1 2V RTC Voltage Regulator Configuration Jumpers ee se ee ee 13 Table 2 6 1 2V RTC Voltage Regulator Configuration Jumpers eee 13 Figure LALA ETB ARI aa 14 Figure 2 6 JTAG ETB Conoci ti 14 Figure 2 7 Reset buffering Scheme mera di llei 15 Figure 2 7 Reset buffering Sentieri 15 Table 2 7 Boot Select Input Configuration JUMper sa ee ee nennen 16 Table 2 7 Boot Select Input Configuration Jumper 16 Table 2 8 UART 2 Configuration Jumpers 5 ie ritu erii septa Ie this gee es buit sg bau Da ole 17 Table 2 8 UART 2 Configuration Jumpers uva e heat eign Cada nda des a d l 17 Table 2 9 UART 1 7 Configuration Juimpers ides ee ta rere tn et a e rei oe ee e hs 18 Table 2 9 ART 1 7 Configuration Jumpers rurali 18 Table 2 10 UART 5 Configuration Jumpers s sesuais ag datar ias a arado aaa 19 Table 2 10 UART 5 Configuration JUIDDELS c canbe saa anro Gela ale 19 Table 2 11 I2C Bus Address Con
11. STMicroelectronics NAND256R3A which is a Small Page device The Philips LPC3000 supports x8 bus width only The NAND Flash devices supported by the Nohau Seehau ARM NAND Flash Programming Utility are 8MByte x 8 64 Mbit 16MByte x 8 128 Mbit 32MByte x 8 256 Mbit 64MByte x 8 512 Mbit 128MByte x 8 1 Gbit 256MByte x 8 2 Gbit 512MByte x 8 4 Gbit 1GByte x 8 8 Gbit 2GB x 8 16 Gbit The NAND Flash device in the Philips LPC3000 Evaluation Board is STMicroelectronics NAND256R3A which is a 32MByte x 8 256 Mbit device Most NAND Flash devices feature a Write Protect WP pin which can be used to protect the device against program and erase operations Additionally some NAND Flash devices feature a Block Lock mode which is enabled by setting the Power Up Read Enable Lock Unlock Enable PRL pin to High The Block Lock mode has two levels of software protection Blocks Lock Unlock and Blocks Lock down The NAND Flash device in the Philips LPC3000 Evaluation Board is STMicroelectronics NAND256R3A which does not support the Block Lock mode If this option is check 1t will enable any or all of the four program Image files to be programmed into the memory during the Programming process When you click on this option if it is not checked it will open another dialog screen for additional settings Figure 2 22 Note 43 If checked you will need to click if off then on to review the settings S
12. The View button is used to check the current configuration The configuration can only be changed during the initial configuration Miscellaneous Setup Tab The Misc Setup tab Figure 2 19 is accessible only after the initial software configuration e Reset chip after load file Sets the ARM core to issue a reset after the code is loaded e Override at Reset The Program Counter option selects the value that the program counter will be set to after the reset sequence has completed Enter the program counter value in the box The Stack Pointer option selects the value that the stack pointer will be set to after a reset Enter the stack pointer value in the box Emulator Configuration Figure 2 19 Emulator Configuration Window Displaying the Misc Setup Tab 40 Map Config TAB Figure 2 20 is accessible only after the initial software configuration The file loader will automatically map THUMB regions defined in the output file This mapping window provides a manual override for THUMB regions The large open area displays the address ranges that contain THUMB code The Add button is used to add a range of memory that is used for THUMB code The Edit button is available only when a range is selected The range values may be changed The Remove button is used to delete one memory range from the table The Remove All button is used to delete all the memory ranges from the table Emulator Configuration Hdw Confi
13. iate ete tdi dle 31 Seca Ed OS OE uae 33 Installing from the Dico petet bete za aio ana 33 Download Install from ted ad 33 5 Seehau Configuration PLOMO Gagea dale eee 35 Hardware Configuration Taba ase s ae de ear 37 Configuring the Emulator Options From Within Seehau i 39 Map Confis TABS lille 41 GIN PEIN IDE Las br Pir O o EG ER De ted ef 42 NAND Flash Programming Main Dialog Box cono nononocnnn enne 42 NAND Flash Image Options Dialog Box i 44 NAND Flash Fraser alal 46 Index of Figures and Tables Figure 2 1 EVB CPU Board Functional Blocks 7 Figure 2 2 EVB Main Board Functional Blocks essent 8 Figure 2 1 EVB CPU Board Functional Blocks i 8 Figure 2 3 System Oscillator Selection cruel aaa 9 Fiegre 2 gt System Oscillator Selection lO 9 Table 2 1 System Oscillator Selection Jumpers ee RA GR Re AA RA GR Re ee ee RA Ge Re ee 9 Table 2 1 System Oscillator Selection Jumpers esse ese EA de AA Ag AA ee AA Ag s ge 9 Figure 2 4 RTC Ose atone EE Ar ara 10 Ligure 24 REG Oscar yasa 10 Figure 2 5 2 0mm Power Connector suos os n Mrd on aa 10 Figure 2 5 2 0mm Power Connector iuuenes e ese id A e dese dun 10 Table 2 2 1 8V Voltage Regulator Configuration Jumper serene 11 Table 2 2 1 8V Voltage Regulator Configuration Jumper ii 11 Table 2 3 3 0V Voltage Regulator Configuration
14. it cer a al mx dates vs Piotr I sj ili anal Tears Mr Dm Hazel Dih Figure 2 16 JTAG Chain Setup Screen Figure 2 17 Setup Screen with Two Devices e JTAG Chain configuration is used if the ARM device is not the only chip connected to the JTAG or if the chip has multiple JTAG controllers Figure 2 16 Number of JTAG devices This is the total number of devices connected to the JTAG Scan Chain If only one device is present nothing needs to be configured Configure This button is used to configure the number of devices and the Instruction Length for each device This is only available during the intial configuration If you click the Configure button Figure 2 16 or Figure 2 17 appears depending on the number of devices that were entered Number of Devices This is used to set the total number of devices in the JTAG Scan Chain Figure 2 17 Active Device Position This is used to set which device in the ARM chip the JTAG will connect to e Instruction Reg Size There will be a drop down list for each of the devices If the number of devices is set to more than one there will be a drop down list for each device Figure 2 17 Devicel Active The Instruction Register size for the active device which is automatically configured ARM7 4 ARM9 5 38 Device2 Bypass This is where the Instruction Register Length is set for the device in the chain that will be bypassed Configuring th
15. power must be removed from both the EVB and the JTAG ETB debug interface VTref 1 H 2 Vsupply NTRST3 4 vss TDI 5 O O 6 vss TMS 7 svss TCK Q O 10vss RTCK 11 O O 12vss TD013 O O 14vss NSRST 15 O O 16VSS 170 1svss 19 O O 20vss Figure 2 6 JTAG ETB Connector 14 2 4 Reset Switch S1 Appendix Figure 3 An active low push button RESET switch S1 with a MAXIM MAX823REXK T device is provided on the EVB When the 3 0V voltage regulator drops below a certain threshold level 2 63V the MAXIM MAX823REXK T device will automatically assert the MCU reset line in order to prevent incorrect operation of the MCU or EVB circuitry The MAXIM MAX823REXK T device also provides a de bounced input for the active low push button RESET switch S1 As the JTAG hardware debug probe has the ability to assert the MCU reset line additional open drain output buffering scheme is created as shown in Figure 2 7 JTAG ET Open Drain Figure 2 7 Reset buffering Scheme 15 2 5 Boot Select Input Configuration Jumper JP32 Appendix Figure 3 The Boot Select Input GPI 01 SERVICE N is configured by the jumper JP32 Table 2 7 Boot Select Input Configuration Jumper Jumper PCB Legend Position Description JP32 BOOT SEL 1 2 D GPI 01 SERVICE N is set to HIGH to run code from NAND FLASH 2 3 GPI 01 SERVICE_N is set to LOW to download code from UART 5 J10 16 2 6 RS232 Configuration
16. 2 NAND Flash Image Options ss os et De A eis opa ted tan eus 44 Figure 2 23 NAND Flash Erase Dialog BOX ee ierit rene rae ei ee and inn 46 1 Introduction This document details the setup and configuration of the Philips LPC3000 evaluation board 201 hereafter referred to as the EVB The EVB is intended to provide a mechanism for easy customer evaluation of the Philips LPC3000 microcontroller and to facilitate hardware and software development 1 1 EVB Feature List The EVB provides the following features A Single power supply input 5 0V regulated on board to provide all the necessary EVB voltages User Reset pushbutton switch 20 Way JTAG ETB connector 32M 8M x 32 Bytes of SDRAM 32M 32M x 8 Bytes of NAND FLASH 1 LCD Module with Philips PCF8558 built in SD Card connector 3 USB connectors USB A Receptacle Connector for USB Host USB B Receptacle Connector for USB Device USB Mini AB Receptacle Connector for USB OTG with Philips ISP1301 3 UART RS232 physical interface circuits connected to standard PC style DB9 female connectors 4 80 pin break out headers to provide easy access to many of the microcontroller pins 4 User input pushbutton switches 2 User output LEDs Small prototyping area consisting of an area of 0 1 inch spaced through holes with easy access to ground and 3 0V 1 8V power supply points IMPORTANT Before you apply power to the EVB please fully read the f
17. B Main Board Default Jumpers Summary Table see ee ee ee ee ee ee 26 Table 2 18 EVB Main Board Default Jumpers Summary Table see se ee ee ee ee ee 26 Table 2 18 EVB Main Board Default Jumpers Summary Table cont 27 Table 2 18 EVB Main Board Default Jumpers Summary Table cont ssse 27 Figure 2 10 Break Out Header Yi 29 Figure 2 10 Break Out Header J5 rs a 29 Figure 2 11 Break Out Header Ot e 30 Fis re 2 11 Break Out Header J6 eis eoe dello darai 30 Figure 2 12 Break Out Header Ii ol Sr PA Da da aaa 31 Figure 2 12 Break Out cade a cies 31 Break Out Header Jinbe es 32 Figure 2 13 Break Out Header I8 ses da 32 Figure 2 13 Break Out Header J8 epa A iii 32 Figure 2 14 Emulator Configuration Window Displaying the Connect Tab 35 Figure 2 15 Emulator Configuration Window Displaying the Hdw Config Tab 36 Figure 2 16 JTAG Chan Setup CM radar 38 Figure 2 17 Setup Screen with Two Devices er lele 38 Figure 2 18 Emulator Configuration Window Displaying the Hdw Config Tab 39 Figure 2 19 Emulator Configuration Window Displaying the Misc Setup Tab 40 Figure 2 20 Emulator Configuration Window Displaying the Map Config Tab 41 Figure 2 21 NAND Flash Programming Main Dialog eee 42 Figure 2 2
18. La 20 USB Connectors O A lai dele onda ao 20 DC Bus Address Configuration Jumpers IP1 iii 20 POD Madue MP c cute ES DE EE N m RR 21 DC Bus Configuration Jumpers JP30 JP31 eee tetto dde 21 Contrast Adjustment R80 se R acid 21 NAND FLASH Chip SIS n eo is 21 NAND FLASH Configuration JUMpers esse ee ee de Ge ee ee ee RA Ge Re ee ee RA ee Re ee ge 22 NAND FLASH Write Protect Input Configuration Jumper JP29 ee ke ee ee 22 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper JP28 23 ADC Configuration Jumper da 23 ADC Configuration Jumper IBP33 iius cede rte i 23 Potentiometer RSS A A ha ea 24 User Input Push Button Switches neuere ii t a Recte za 24 User Input Push Button Switch 82 s A Ve Ge Ee ed N Ge AAA R sa a 24 User Input Push Button Switch 83 usina Ge AG Re in bx gb Mar ee Sk ua rein 24 User Input Push Button Switch 84 osse aio 24 User Input Push Button Switch S5 i 24 User Output LE Dschola ir LL iD EE 24 User utpat LED D3 ear ttr i de li aaa 24 User Output LED DAS iau eoi b bar Ea ptr sistens A Ee Ee eas cd eae te pad 25 Default Jumpers Summary Table is 26 EVB CPU Board Default Jumpers Summary Table 26 EVB Main Board Default Jumpers Summary Table sse 26 Bredk Out Headers eas alal i aaa 28 Prob ee ED GE AS 29 Break Out Header Worlds 30 Break Out Header Ia
19. MCD N NC O O 19 NC NC O O 17 NC NC O O 15 NC NC O O 13 NC GND O O 1 GND NC O O 9 NC NC O Ol NC NC O Ol 5 NC NC O Ol 3 GND NC O Oli NC Figure 2 11 Break Out Header J6 30 4 3 Break Out Header J7 GIO 9 GPO 16 GPI 21 U7 HRTS GPO 15 GPIO 5 SPI DATIN GPIO 4 VDDio28 MS DIOI MS_DIO3 SPD DATIO GND MS DIOO DCI SCL MS DIO2 MS SCLK I2CI SDA NC GND GPI 6 GND VDD1828 GND GND GND GND GND USB INT N VDDiol8 USB DAT VP USB DC SCL DC2 SDA GPO 1 GND GPO 19 GPI 3 GND NC GND 0000 0000 0000 00000000 00000000 00000000 0000 O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O Appendix Figure 5 GND GPO 13 GPO 12 GPO 18 GMD GPIO 1 GPIO 0 GPIO 3 GPIO 2 NC SPI2 CLK SPIL DATIN SPIL CLK SPIL DATIO GPO 4 MS BS GPO 11 GND GND NC NC GND GND VDD1828 GND GND NC USB OE TP N USB SEO VM USB I2C SDA GND DC2 SCL GPO 0 GPO 14 GPO 5 GPO 20 VDDiol8 GND RESOUT N NC Figure 2 12 Break Out Header J7 4 4 Break Out Header J8 Appendix Figure 5 GND O O NC NC O O NC NC O O NC NC O O NC NC O O NC NC O O NC NC O O NC GND O O NC NC O O NC NC O O NC NC O O GND NC O O NC NC O O NC GND O O NC VDDts28 O O ADINI NC O O NC VDDts28 O O ADINO NC O o NC ADIN2 O O GND NC O o NC GND O O NC NC O O NC NC O O NC GND O O NC NC O O GND GND O O GND GND O O
20. ONSW GPO 17 GND GND GPI 11 UL TX U2 TX Ul RI GND U2 HCTS NC VDDio1828 NC NC U6 IRTX NC NC US 4X VDDio1828 U7 HCTS US TX KEY COL3 GND KEY COLO KEY COL4 KEY ROVV5 KEY COLI KEY ROWI VDDio28 NC NC NC GND PWM_OUTI GPI 4 GPI 8 GPO 2 GPI 9 GPO 6 GPO 10 O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O OOOOOOOO0ODO00O0O0O0O0C0 0000 0000000000000000 0000 Appendix Figure 5 NC GPI 5 NC U2 HRTS NC GND GND GND GND GND U2 RX U3 RX U3 TX NC SYSCLKEN NC HIGHCORE U6 IRRX U7 TX KEY COLS U7 RX KEY COL2 TEST KEY ROVV4 GND KEY ROW2 KEY ROW3 GND KEY ROWO NC PWM OUT2 GPI 0 GPI 2 GPI 7 GPI 1 GPI 10 NC GPO 3 GPO 7 GPO 8 Figure 2 10 Break Out Header J5 4 2 Break Out Header J6 Appendix Figure 5 NC O O 79 NC NC O O 77 NC NC O O 75 NC NC O O 73 NC VDDio18 O O 71 NC FLASH CLE O O 69 GND FLASH ALE O O 67 NC GND O O 65 NC FLASH RD N O O 63 GND FLASH 106 O O 61 FLASH WR N GND O O 59 NC FLASH RB N O O 57 FLASH 107 VDDio18 O O ss FLASH IO4 FLASH 102 O O s3 FLASH IOS NC O O 51 NC FLASH 103 O O 49 FLASH IOI FLASH 100 O O 47 NC NC O O 45 NC GND O O 43 NC NC O O 41 NC NC O O 39 NC NC O O 37 NC NC O O 35 GND NC O O 33 NC NC O O 31 NC NC O O 29 NC NC O O 27 GND NC O O 235 NC NC O O 23 NC NC O O 21 SRA
21. The EVB has three MAXIM MA X3232ECAE RS232 transceiver devices providing RS232 signal translation for the MCU Each of the MAXIM MAX3232ECAE devices has a 9 way female D Type connector associated Each of the MCU signals to the RS232 transceiver is jumpered to allow individual isolation if required 2 6 1 UART 2 Configuration Jumpers JP2 JP3 JP4 JP5 Appendix Figure 3 For the UART 2 the MAXIM MAX3232ECAE device U2 has a 9 way female D Type connector J11 associated Table 2 8 UART 2 Configuration Jumpers Jumper PCB Legend Position Description JP2 FITTED D Connects U2_TX to MAXIM MAX3232ECAE device REMOVED Disconnects U2_TX from MAXIM MAX3232ECAE device JP3 FITTED D Connects U2_RX to MAXIM MAX3232ECAE device REMOVED Disconnects U2 RX from MAXIM MAX3232ECAE device JP4 FITTED D Connects U2 HRTS to MAXIM MAX3232ECAE device REMOVED Disconnects U2 HRTS from MAXIM MAX3232ECAE device JPS FITTED D Connects U2 HCTS to MAXIM MAX3232ECAE device REMOVED Disconnects U2 HCTS from MAXIM MAX3232ECAE device 17 2 6 2 UART 1 7 Configuration Jumpers JP12 JP13 JP10 JP11 Appendix Figure 3 For the UART 1 7 the MAXIM MAX3232ECAE device U3 has a 9 way female D Type connector J12 associated Table 2 9 UART 1 7 Configuration Jumpers Jumper PCB Legend Position Description JP12 1 2 D Connects U7 TX to MAXIM MAX3232ECAE device 2 3 C
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23. apping the starting address of RAM When this is selected the remap bit will be set at reset On devices that do not provide this it is not set and will therefore be grayed out Reset Method HW Hardware Reset Sets a hardware break at address 0 and asserts reset HWC HW w Catchpoint Inserts a Jump to itself at the address specified HWB HW wBreak This reset method asserts reset waits for the set time as determined by the Delay after Reset then stops execution SIM Simulated Reset set PC This reset method sets the Program Counter to 0 and does not assert hardware reset Note For a more detailed description of the Reset Method refer to the Reset Method document called ARM Reset located in the document folder JTAG Clock Speed Auto Speed at Reset Allows EMUL ARM to bring the target up to full speed automatically Not implemented for all MCUS Slow Target A special slow target communication mode is entered Do not use this unless really necessary since it will slow down target communication significantly This does not affect the JTAG clock 31 JTAG Clock KHz Sets the JTAG clock speed e Endian Mode This is used to configure the endianess byte ordering for your chip Big MSB First Select this if your target has the Most Significant Byte MSB first Little LSB First Select this if your target has the Least Significant Byte LSB first Mt
24. clock oscillator sources 1 An on board system clock oscillator Y2 13MHz 2 A socket Y3 for user system clock oscillator Y3 ma JP1 Y2 13MHs JP2 4 Figure 2 3 System Oscillator Selection C19 15pF 1 The selection between these options is controlled using jumpers JP1 JP2 as shown below Table 2 1 System Oscillator Selection Jumpers Jumper PCB Legend Position Description JP1 FITTED D Connects the on board system clock oscillator Y2 REMOVED Disconnects the on board system clock oscillator Connects the user system clock oscillator Y3 JP2 FITTED D Connects the on board system clock oscillator Y2 REMOVED Disconnects the on board system clock oscillator Connects the user system clock oscillator Y3 2 1 2 RTC Oscillator Appendix Figure 1 The EVB has a MCU RTC clock oscillator Y1 32 768KHz l I Figure 2 4 RTC Oscillator 2 2 Power Supply Configuration The EVB requires an external supply voltage of SV DC minimum 3Amp 2 2 1 Power Supply Input Connector J17 Appendix Figure 2 This connector provides a convenient hook up mechanism for a fabricated power lead such as those found on wall plug DC adapters Care must be taken to ensure the 2 0mm plug uses the correct polarization as shown below t 9 Figure 2 5 2 0mm Power Connector 10 2 2 2 Power Supply Configuration Jumpers The EVB has 6 voltage regulators on board 1 8V voltage regulato
25. e Emulator Options From Within Seehau In Seehau open the Emulator Configuration window From the Config menu select Emulator The Emulator Configuration window opens displaying the Hdw Config tab Figure 2 18 Only the differences from the initial configuration will be discussed here The Emulator Configuration window contains three tabs When selected each tab allows you to set the following options Hdw Cfg Set up emulator hardware options Misc Setup Select reset options Map Config Used to manually set the address ranges where Thumb code is stored Buttons Common to All Tabs e OK Saves the settings for the tab and exits the dialog box e Apply Saves the settings for the tab e Cancel Exits without saving the settings for the dialog box e Help Displays the Seehau Help file e Refresh Allows you to retrieve and view the current emulator hardware configuration settings Emulator Configuration Hdw Config Processor Endian Mode d r C Big MSB First ClockiMHz Delay after Reset ms 13 300 E Little LSB First Reset Method HW Hardware Reset C HWC HW w Catchpoint Address o Jtag Chain C HWB HW w Break Number Of Jtag Devices C SIM Simulated Reset set PC JTAG Clock Speed in Configure Slow Target JTAG Clock MHz 0 5 Cancel Help About de Prev Figure 2 18 Emulator Configuration Window Displaying the Hdw Config Tab 39 Hardware Configuration Tab e JTAG Chain
26. ed for the flash boot code to work If the Secondary Boot Loader checkbox is checked the Nohau SeehauARM NAND Flash Programming Utility will automatically generate the Interface Configuration Data The Secondary Boot Loader is simply a binary image which does not contain the Interface Configuration Data The Philips LPC3000 has two NAND Flash Controllers one MLC for multi level NAND Flash devices and one SLC for single level NAND Flash devices The two NAND Flash Controllers use the same interface to the external NAND Flash device It specifies the starting block position for the image to be programmed into the NAND Flash device The NAND Flash devices are supplied with all the locations inside valid blocks erased FFh The Bad Block Information is written prior to shipping The Nohau SeehauARM NAND Flash Programming Utility uses Skip Block Method in the Bad Block Management In the Skip Block method the algorithm creates the Bad Block Table and when the target address corresponds to a Bad Block address the data is stored in the next good block skipping the Bad Block During the lifetime of the NAND device additional Bad Blocks may develop When a Bad Block is generated during the lifetime of the NAND Flash device it s data is also stored in the next good block In this case the information that indicates which good block corresponds to each developed Bad Block also has to be stored in the NAND Flash device Important Note
27. elect File buttons If the Image File to Load is a Secondary Boot Loader then it is simply a binary image The Nohau SeehauARM NAND Flash Programming Utility will automatically generate necessary the Interface Configuration Data The only Image File Option that can be used for the Secondary Boot loader is Image 0 6 2 NAND Flash Image Options Dialog Box Options for Image 0 a x Starting Block r ECC Generation Options Enable MIO o gt M1 1 E M1 2 o gt M2 0 0 7 M2 1 o 7 M2 2 fo y Figure 2 22 NAND Flash Image Options 44 Field Secondary Boot Loader Controller Type Starting Block Description In the Philips LPC3000 there is a built in ROM of 16KB which contains code to start running code from NAND FLASH or to download code from UART to IRAM if in service mode After reset execution begins from internal ROM The program in the ROM is called the Boot Code The Boot Code SW first reads input GPIO_01 SERVICE_N If GPIO_01 is high the Boot Code starts NAND FLASH booting The image in the NAND Flash device which is access by the Boot Code is referred as the Secondary Boot Loader For the flash boot procedure to work it need to find the information Interface Configuration Data for how many page to copy and the type of flash that is connected The first page in the first block or the second block of the flash shall contain the information Interface Configuration Data need
28. eptacle Connector for USB Host J13 USB B Receptacle Connector for USB Device J14 USB Mini AB Receptacle Connector for USB OTG J9 2 8 1 I2C Bus Address Configuration Jumpers JP1 Appendix Figure 3 The least least significant I2C bus address bit of the Philips ISP1301 is configured by the jumper JP1 Table 2 11 I2C Bus Address Configuration Jumper Jumper PCB Legend Position Description JP1 ADR 1 2 D The I2C bus address for the Philips ISP1301 is 0101101 0x2D 2 3 The I2C bus address for the Philips ISP1301 is 0101100 0x2C 20 2 9 LCD Module J19 Appendix Figure 3 The EVB has a LCD module with Philips PCF8558 built in 2 9 1 I2C Bus Configuration Jumpers JP30 JP31 Appendix Figure 3 The I2C bus of the LCD module is configured by the jumpers JP30 JP31 Table 2 12 I2C Bus Configuration Jumpers Jumper PCB Legend Position Description JP30 SCL 1 2 D Connects I2C1 SCL 2 3 Connects I2C2 SCL JP31 SDA 1 2 D Connects I2C1 SDA 2 3 Connects I2C2 SDA 2 9 2 Contrast Adjustment R86 Appendix Figure 3 The Contrast Adjustment of the LCD module is controlled by the potentiometer R86 2 10 NAND FLASH Chip Select The on board NAND FLASH chip select is re created as shown in Figure 2 8 GPO 1 Figure 2 8 NAND FLASH Chip Select 21 The SRAM chip select available at the break out header is re created as shown in Figu
29. figuration JUMPer i 20 Table 2 11 I2C Bus Address Configuration JUMPer sea ee Re ee RA GR Re ee ee RA ee 20 Table 2 12 I2C Bus Configuration Jumpers se se ee RA RA GR Re ee AA RA Ge Re ee ee ee RA ee 21 Table 2 12 2E Bus Configuration impresa EG ED Ee BE SEG ER Ee eg a ba a 21 Figure 2 8 NAND FLASH Chip Selde A Ge ae a 21 Figure 2 8 NAND FLASH Chip Select ria Ges ke ba Se ad ee de ee Ge a 21 Figure 2 9 SRAM Chip lea ae a 22 Fig re 2 9 SRAM Chip Select GE A RS 22 Table 2 13 NAND FLASH Write Protect Input Configuration Jumper esses 22 Table 2 13 NAND FLASH Write Protect Input Configuration Jumper sess 22 Table 2 14 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper MERE but RE EE N EA EE Er 23 Table 2 14 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper 81 55 II ORARI 23 Table 2 15 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper IRR 23 Table 2 15 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper AE ii 0 EER ER RA onsets 23 Table 2 16 ADC Configuration Jumper uri ees de ARAR a a 23 Table 2 16 ADC Configuration Jumper EE SO N ED ee 23 Table 2 17 EVB CPU Board Default Jumpers Summary Table se ee se ee ee ee de ee 26 Table 2 17 EVB CPU Board Default Jumpers Summary Table ee ee se ee ee ee de ee 26 Table 2 18 EV
30. g Misc Setup Map Config Thumb Address Ranges override loaded defaults 1000 2000 5000 7FFF 8000 9500 EB HEmuye Remove All OK Apply Cancel Help Refresh Figure 2 20 Emulator Configuration Window Displaying the Map Config Tab 41 6 NAND Flash Programming There is a button on the tool bar to start the NANDFlash Programming macro 6 1 NAND Flash Programming Main Dialog Box When you press this button the following screen should appear figure 2 21 NAND Flash Programming SMB x 8 64 Mbits Figure 2 21 NAND Flash Programming Main Dialog 42 Field Device Page Size Flash Device Size Device is Lockable Program Enable Description The Page Size of the NAND Flash device is either Small or Large For Small Page device the Page Size is 528 Byte x8 bus width 264 Word x16 bus width For Large Page device the Page Size is 2112 Byte x8 bus width 1056 Word x16 bus width For Small Page device three bus cycles are required to input the addresses for devices having 256Mbit or less four bus cycles are required to input the addresses for devices having 512Mbit or more For Large Page device four bus cycles are required to input the addresses for devices having 1Gbit or less five bus cycles are required to input the addresses for devices having 2Gbit or more The NAND Flash device in the Philips LPC3000 Evaluation Board is
31. ollowing sections on how to correctly configure the board However the boards default configuration should not require any change in configuration before you power on the EVB A Failure in configuration of the board may cause device or EVB damage 2 EVB Configuration This section details the configuration of each of the EVB functional blocks Throughout this document all default jumper settings are clearly marked with D and are shown in blue text This should allow a more rapid return to the default state of the EVB if required Note that all 3 pin jumpers have the default configuration with a jumper header fitted to pins 1 2 except JP28 The main EVB functional blocks are shown below to help with quick location of jumpers etc The EVB has been designed to try and make it as easy as possible to use The PCB has detailed silkscreen legend and where possible have been segmented into functional blocks SDRAM System Clock Oscillator ATC Clock Oscillator e Cc o tn z o x gt i Cc gt Lal Figure 2 1 EVB CPU Board Functional Blocks Voltages JTAG ETB Prototype Area eers an n i Figure 2 2 EVB Main Board Functional Blocks Povver Connector USB Connectors Reset Switch SD Card Connector LCD Module 2 1 System RTC Oscillator Selection 2 1 1 System Oscillator Selection Jumpers JP1 JP2 Appendix figure 1 The EVB supports 2 possible MCU system
32. onnects UI TX to MAXIM MAX3232ECAE device JP13 1 2 D Connects U7 RX to MAXIM MAX3232ECAE device 2 3 Connects U1 RX to MAXIM MAX3232ECAE device JP10 FITTED D Connects U7 HRTS to MAXIM MAX3232ECAE device REMOVED Disconnects U7 HRTS from MAXIM MAX3232ECAE device JP11 FITTED D Connects U7 HCTS to MAXIM MAX3232ECAE device REMOVED Disconnects U7 HCTS from MAXIM MAX3232ECAE device 18 2 6 3 UART 5 Configuration Jumpers JP6 JP7 JP8 JP9 Appendix Figure 3 For the UART 5 the MAXIM MAX3232ECAE device U4 has a 9 way female D Type connector J10 associated Table 2 10 UART 5 Configuration Jumpers Jumper PCB Legend Position Description JP6 FITTED D Connects US TX to MAXIM MAX3232ECAE device REMOVED Disconnects US TX from MAXIM MAX3232ECAE device JP7 FITTED D Connects US RX to MAXIM MAX3232ECAE device REMOVED Disconnects US RX from MAXIM MAX3232ECAE device JP8 REMOVED D Not in use JP9 REMOVED D Not in use 19 2 7 SD Card Connector J15 Appendix Figure 3 The EVB supports SD Card with a SD Card connector The Detect switch of the SD Card connector is connected to the GPI 5 pin of the MCU The output of the Detect switch is LOW when the SD Card is inserted 2 8 USB Connectors J9 J13 J14 Appendix Figure 3 The EVB has 3 x USB connectors with a Universal Serial Bus USB On The Go OTG transceiver device Philips ISP1301 USB A Rec
33. pers Summary Table Table 2 17 EVB CPU Board Default Jumpers Summary Table Jumper PCB Legend Position Description JP1 FITTED D Connects the on board system clock oscillator Y2 JP2 FITTED D Connects the on board system clock oscillator Y2 3 2 EVB Main Board Default Jumpers Summary Table Table 2 18 EVB Main Board Default Jumpers Summary Table Jumper PCB Legend Position Description JP22 1 8V FITTED D Connects the MCU 1 8V voltages and the EVB peripherals 1 8V voltages JP23 3 0V FITTED D Connects the MCU 3 0V voltages and the EVB peripherals 3 0V voltages JP24 1 2V FITTED D Connects the MCU 1 2V voltages JP25 0 9V 1 2V FITTED D Connects the MCU 0 9V 1 2V Core voltages JP19 REMOVED D 1 0 9V 1 2V core voltage regulator output is set by the signal HIGHCORE 1 2V for HIGHCORE LOW 0 9V for HIGHCORE HIGH JP34 FIXED MODE REMOVED D 1 2V for HIGHCORE LOW is configured as 1 17V 1 31V variable mode controlled by the potentiometer R89 JP26 1 2V FITTED D Connects the MCU 1 2V RTC voltages JP21 REMOVED D 1 2V RTC voltage regulator output is set to 1 2V JP20 RTC EXT 5 0V FITTED D 1 2V RTC voltage regulator input is connected to the power supply input connector J17 JP27 RTC EXT BIAS 1 2 D When JP20 is fitted JP32 BOOT SEL 1 2 D GPI 01 SERVICE N is set to HIGH to run code from NAND FLASH 26
34. r US to supply the MCU 1 8V voltages VDDio18 VDDsdram18 and the EVB peripherals 1 8V voltages Appendix Figure 2 Table 2 2 1 8V Voltage Regulator Configuration Jumper Jumper PCB Legend Position Description JP22 1 8V FITTED D Connects the MCU 1 8V voltages and the EVB peripherals 1 8V voltages REMOVED Allows multimeter to measure the current drawn by the MCU 1 8V voltages 3 0V voltage regulator U6 to supply the MCU 3 0V voltages VDDio28 VDDio1828 VDD1828 VDDad28 VDD28 and the EVB peripherals 3 0V voltages Appendix Figure 2 Table 2 3 3 0V Voltage Regulator Configuration Jumper Jumper PCB Legend Position Description JP23 3 0V FITTED D Connects the MCU 3 0V voltages and the EVB peripherals 3 0V voltages REMOVED Allows multimeter to measure the current drawn by the MCU 3 0V voltages 1 2V voltage regulator U7 to supply the MCU 1 2V voltages VDD12 VDDosc12 VDDpll12 VDDcorefixed12 11 Appendix Figure 2 Table 2 4 1 2V Voltage Regulator Configuration Jumper Jumper PCB Legend Position Description JP24 1 2V FITTED D Connects the MCU 1 2V voltages REMOVED Allows multimeter to measure the current drawn by the MCU 1 2V voltages 0 9V 1 2V core voltage regulator U8 to supply the MCU 0 9V 1 2V Core voltages VDDcore12 Appendix Figure 2 Table 2 5 0 9V 1 2V Core Voltage Regulator Configuration Jumpers
35. re 2 9 GPO 1 N VO SRAM CE N FLASH CE N N Figure 2 9 SRAM Chip Select The normal state of the signal GPO 1 is low after reset from the microcontroller This means that the Flash Chip Enable signal will be active Since there is no actual enable for Static RAM from the micro we have added a signal SRAM CE that the user can enable by setting the GPO 1 signal to a high state to enable access to Static RAM 2 11 NAND FLASH Configuration Jumpers 2 11 1 NAND FLASH Write Protect Input Configuration Jumper JP29 Appendix Figure 4 Table 2 13 NAND FLASH Write Protect Input Configuration Jumper Jumper PCB Legend Position Description JP29 WP_N 1 2 D Accepts program or erase operations 2 3 Does not accept any program or erase operations 22 2 11 2 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper JP28 Appendix Figure 4 The table below shows the configuration of the Jumper JP28 if ST NAND256R3A2AZAG6E is installed on the board Table 2 14 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration Jumper JP28 Jumper PCB Legend Position Description JP28 LOCKPRE REMOVED D Not using LOCK MECHANISM amp POWER ON AUTO READ is not supported The table below shows the configuration of the Jumper JP28 if SAMSUNG K9F5608Q0C GIBO is installed on the board Table 2 15 NAND FLASH Lock Mechanism amp Power On Auto Read Configuration
36. stings one for documentation and one for software Click Information and Download Seehau Review the information on the page Click Yes I Want to Download A Customer Information Form page opens Complete this form then click Proceed You have the option to download more than one product A verification page opens with the information you have just entered If all information is correct select SEND at the bottom of the page A message will open that verifies your information has been sent Click Go to Download The Available Download Areas page opens Click either option for a download site The Nohau Software Updates page opens Click the EMUL ARM link 33 10 Click the ARM exe link The application will start downloading Make a note of the directory for this downloaded file 11 Following the download go to the directory which has the downloaded file Click the ARM exe file and follow the installation instructions After installing the Seehau software the Setup Complete dialog box appears allowing you to view the Readme txt file and or launch the SeehauARM configuration Note You must launch the SeehauARM configuration before running the Seehau software 34 Seehau Configuration Program After installing Seehau it is recommended that you automatically start the Seehau Configuration program Do the following steps before starting Seehau 1 From the Setup Complete dialog box select Launch SeehauARM Configuration

Philips LPC3000 Evaluation Board user manual

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