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FAIRCHILD FQAF14N30 Manual

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1. Figure 7 Breakdown Voltage Variation vs Temperature T 1 Operation in This Area E i Ut EU 5 is Limited by R psen L MELDE 10 E EE Ez i IR 1 i 10 c t i E X Notes d F 1 T 25 C d k 2 T 150 3 Single Pulse 10 L 10 10 10 Vps Drain Source Voltage V Figure 9 Maximum Safe Operating Area _8 p zo 28 E T a x g s 5 a 30 25 20 j IS 10 L 05 H 0 0 i i i i i 100 50 0 50 100 150 200 T Junction Temperature C Figure 8 On Resistance Variation vs Temperature 12 0 i i i i 25 50 75 100 125 150 T Case Temperature C Figure 10 Maximum Drain Current vs Case Temperature o o c 10 S Ee a D 0 5 o o H 4 D Se 0 2 X Notes S H 1 Z 0 1 39 C W Max E o 1 2 Duty Factor D t t ugs 3 Tims Te Pow Zest 00 c 0 05 a e fe e LEEN a Log poe Moy Put PT E s EC oo tilde H e d dl hd EL A N pr N tb i single pulse 2 10 10 10 10 10 107 10 10 t Square Wave Pulse Duration sec Figure 11 Transient Thermal Response Curve 2000 Fairchild Semiconductor International Rev A April 2000 0 Nt LHVOJ FQAF14N30 Gate Charge Test Circuit amp Waveform Charge Resistive Switching Test Circuit amp Waveforms 90 10 GS den Te hs tar Unclamped Inductive Switching T
2. or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx HiSeC SuperSOT 8 Bottomless ISOPLANAR SyncFET CoolFET MICROWIRE TinyLogic CROSSVOLT POP UHC E2CMOS PowerTrench VOX M FACT QFET FACT Quiet Series QSTM FASTO Quiet Series FASTr SuperSOT 3 GTO SuperSOT 6 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL As used herein result in significant injury to the user 1 Life support devices or systems are devices or systems 2 A critical component is any component of a life support which a are intended for surgical implant into the body device or system whose failure to perform can be or b support or sustain life or c whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system or to affect its safety or effectiven
3. 3 30 pF Switching Characteristics t s i did d on Turn On Delay Time Vpp 150 V Ip 14 4 A 22 55 ns Lk Turn On Rise Time Rg 252 145 300 ns ta off Turn Off Delay Time 45 100 ns tr Turn Off Fall Time Note 4 3 T Ze 70 150 ns Oe Total Gate Charge Vps 240 V Ip 14 4 A 30 40 nC Qgs Gate Source Charge Ves 10 V 75 N nC Qga Gate Drain Charge Note 4 5 13 nC Drain Source Diode Characteristics and Maximum Ratings Is Maximum Continuous Drain Source Diode Forward Current 11 4 A Lou Maximum Pulsed Drain Source Diode Forward Current 45 6 A Vsp Drain Source Diode Forward Voltage Ves 0 V lg 11 4 A 1 5 V tr Reverse Recovery Time Ves 0 V Ig 14 4 A 200 ns Qr Reverse Recovery Charge dr dt 100 A us MOEN jr 1 5 uC Notes 1 Repetitive Rating Pulse width limited by maximum junction temperature 2 L 2 7 7mH lag 11 4A Vpp 50V Rg 25 Q Starting Ty 25 C 3 Isp X 14 4A di dt lt 200A us Mon lt BVpss Starting Tj 25 C 4 Pulse Test Pulse width lt 300us Duty cycle lt 2 5 Essentially independent of operating temperature 2000 Fairchild Semic onductor International Rev A April 2000 0 Nt LHVOJ FQAF14N30 Ip Drain Current A Roson o Drain Source On Resistance o N E 8 8 Capacitance pF 10 2 2 o e p 0 0 2100 S 8 8 8 8 o Typical Characteristics Note
4. DABS RAB FQAF14N30 Masi ARAM MACE RE FAIRCHILD Em SEMICONDUCTOR m FQAF14N30 300V N Channel MOSFET General Description These N Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary planar stripe DMOS technology This advanced technology has been especially tailored to minimize on state resistance provide superior switching performance and withstand high energy pulse in the avalanche and commutation mode These devices are well suited for high efficiency switching DC DC converters switch mode power supply April 2000 QFET Features 11 4A 300V Baton 0 290 Ves 10 V Low gate charge typical 30 nC Low Crss typical 23 pF Fast switching 100 avalanche tested Improved dv dt capability TO 3PF FQAF Series GDS Absol ute Maximu m Ratings Tg 25 C unless otherwise noted Parameter Drain Source Voltage Symbol Voss FQAF14N30 300 Ip Drain Current Continuous Tc 25 C Continuous Tc 100 C 11 4 7 2 IDM Drain Current Pulsed 45 6 Gate Source Voltage 30 Single Pulsed Avalanche Energy 600 Avalanche Current 11 4 Repetitive Avalanche Energy 9 0 Peak Diode Recovery dv dt 4 5 Power Dissipation Tc 25 C Derate above 25 C 90 0 72 Operating and Storage Temperature Range 55 to 150 1 8 from cas
5. e for 5 seconds Maximum lead temperature for soldering purposes 300 Thermal Characteristics Symbol Parameter Roc Thermal Resistance Junction to Case Raya Thermal Resistance Junction to Ambient 2000 Fairchild Semiconductor International Rev A April 2000 Electrical Characte ristics Tc 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves 0 V lp 250 pA 300 V ABVpss Breakdown Voltage Temperature Ip 250 pA Ref d to 25 C e I AT Coefficient D ps 0 34 we Vps 300 V Veg 0 V at 1 A DSS Zero Gate Voltage Drain Current ve 240 V a 125 C 10 a lassF Gate Body Leakage Current Forward Ves 30 V Vps 0 V 100 nA lesen Gate Body Leakage Current Reverse Ves 30 V Vps 0 V 100 nA On Characteristics Vesith Gate Threshold Voltage Vps Vos lp 250 pA 3 0 m 5 0 V Rps on Static Drain Source Ves 10 V Ip 2 5 7 A i On Resistance es H ood 0 29 Q 9rs Forward Transconductance Vps 50 V Ip 5 7 A Note 4 8 3 Dynamic Characteristics Ciss Input Capacitance Vps 25 V Veg 0 V 1050 1360 pF Coss Output Capacitance f 1 0 MHz 200 260 pF Criss Reverse Transfer Capacitance 2
6. ess provided in the labeling can be reasonably expected to PRODUCT STATUS DEFINITIONS Definition of Terms Advance Information Formative or In This datasheet contains the design specifications for Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only 2000 Fairchild Semiconductor International Rev A January 2000
7. est Circuit amp Waveforms E DER BVpss 572 75 BV bss Vp BVpss las Ip t Vor Vos t 2000 Fairchild Semiconductor International Rev A April 2000 Peak Diode Recovery dv dt Test Circuit amp Waveforms Same Type as DUT e dv dt controlled by Re Isp controlled by pulse period Gate Pulse Width Ves En Gate Pulse Period Driver Jeu Body Diode Forward Current Isp DUT di dt lam Body Diode Reverse Current Vos DUT Body Diode Recovery dv dt Body Diode Forward Voltage Drop 0 Nt LHVOJ 2000 Fairchild Semiconductor International Rev A April 2000 FQAF14N30 Package Dimensions TO 3PF 5 50 0 20 amp 15 50 0 20 93 60 0 20 3 00 0 20 1 50 LO at i S o H e e e sl FT g E FU o e Gi SI JS Sl N pa E S EY SI a eo g 3 e im q Q o o Q o N d 8 sg 8 B 7 Fog TT Al I p 2 00 0 20 S 2 00 0 20 E 2 00 0 20 2 00 0 20 F 4 00 0 20 e eo x 3 30 0 20 n Gs re 5 45TYP 5 45TYP 40 20 5 45 0 30 5 45 0 30 0 90 0 10 1 L sl ai g Si S F Si 8 D ceo N LO 2000 Fairchild Semiconductor International Rev A April 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns
8. s 1 2500 s Pulse Test 2 7 250 10 10 10 Vps Drain Source Voltage V Figure 1 On Region Characteristics Veg 10V X Note T 25 C Drain Current A Figure 3 On Resistance Variation vs Drain Current and Gate Voltage C shorted X Notes 1 V g 0V 2f21MHz Va Drain Source Voltage V Figure 5 Capacitance Characteristics Drain Current A Notes 1 V 50V 2 2504 s Pulse Test 2 4 6 8 10 Vos Gate Source Voltage V Figure 2 Transfer Characteristics Veg Gate Source Voltage V amp 10 P amp Be e 11500 25 E 3 Notes 1 Vg 0V 2 2504 s Pulse Test 40 L i i i L p i 12 0 2 0 4 0 6 08 1 0 1 2 14 16 18 Vi Source Drain Voltage V Figure 4 Body Diode Forward Voltage Variation vs Source Current and Temperature ng 60V 10 m V 150V Been Vps 240V 8 E 6 Z 4 2 X Note L7 144A 0 i i i i i 0 5 10 15 20 25 30 Q Total Gate Charge nC Figure 6 Gate Charge Characteristics 2000 Fairchild Semiconductor International Rev A April 2000 lp Drain Current A Typical Characteristics BV ogg Normalized Drain Source Breakdown Voltage Continued 12 11H 1 0 09r X Notes 1 V5 0V 2 1 250pA 08 i L i i i 100 50 0 50 100 150 200 T Junction Temperature C

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