STMICROELECTRONICS -L6598 HIGH VOLTAGE RESONANT CONTROLLER handbook
Contents
1. L6598 15 17 L6598 Figure 28 Revision History June 2004 5 Changed the impagination following the new release of Corporate Technical Pubblication Design Guide Done a few of corrections in the text lt 16 17 L6598 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2004 STMicroelectronics All rights reserved STMicroelectronics GROUP OF COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States www st com ATI 17 172. SS Note that there is not a fixed threshold of the voltage across Css in which the soft start finishes i e the end of the frequency shifting and Tss depends on Css ltstart Gm and Iss eq 5 Making Tss independent of ltstart the Iss current has been designed to be a fraction of lfstart SO C ss tstart B Css listani _ c Laas Kee O 6 Iler K 7 887 g K ss Kss ss 6 Iss K gt Tgg In this way the soft start time depends only on the capacitor Css The typical value of the kss constant Soft Start Timing Constant is 0 15 s uF The current losc is fed to the oscillator as shown in fig 7 It is twice mirrored x4 and x8 generating the triangular wave on the oscillator capacitor Cr Referring to the internal structure of the oscillator fig 7 a good relationship to compute an approximate value of the oscillator frequency in normal operation is 1 41 ba ee ish RiminCt n The degree of approximation depends on the frequency value but it remains very good in the range from 30kHz to 100kHz figg 9 13 ATI 77 L6598 Figure 8 Oscillator Block 8 17 L6598 Figure 9 Typ fmin vs Rfmin Cf 470pF Figure 12 Typ fstart fmin vs Rfstar fri Cf 470pF KHz Af D98IN894 Rimin 100KQ 20 40 60 80 100 Ristart KQ 20 40 60 80 100 Rimin K9 Figure 10 Typ fstart fmin vs Rfstar Cf 470pF Figure 13 fmin different Rf vs
3. Cf Af D981N892 fais KHz Rf 19 9Kohm calc 9 9Kohm meas 400 200 Rf 90Kohm meas Rf 90Kohm calc 0 0 200 400 Cf pF Figure 11 Typ fstart fmin vs Rfstar Cf 470pF Af D98IN893 KHz 80 60 40 L 9 17 L6598 3 3 Bootstrap Section The supply of the high voltage section is obtained by means of a bootstrap circuitry This solution normally re quires an high voltage fast recovery diode for charging the bootstrap capacitor fig 14a In the device a patent ed integrated structure replaces this external diode It is realised by means of a high voltage DMOS driven synchronously with the low side driver LVG with in series a diode as shown in fig 14b Figure 14 Bootstrap driver To drive the synchronised DMOS it is necessary a voltage higher than the supply voltage Vs This voltage is obtained by means of an internal charge pump fig 14b The diode connected in series to the DMOS has been added to avoid undesirable turn on of it The introduction of the diode prevents any current can flow from the Vpoot pin to the Vs one in case that the supply is quickly turned off when the internal capacitor of the pump is not fully discharged The bootstrap driver introduces a voltage drop during the recharging of the capacitor Choot i e when the low side driver is on which increases with the frequency and with the size of the external power MOS It is the sum of the drop across the Rpson and of the diode t
4. IGH LOW SIDE DRIVERS 15 High Side Driver Source Curen VuveVour 0 170 250 ma 11 Low Side Driver Source Current Viveeno 0 170 260 mA Time i Cieegzine 40 80 ns OSCILLATOR pew fefoje frin Minimum Output Oscillation Cr 470pF Rfmin 50k 58 2 61 8 Frequency fstart Soft Start Output Oscillation 470pF Rimin 50k Frequency e 47k Vref 2 4 Voltage to Current Converters Threshold ta 14 Dead Time between Low and 0 2 0 27 0 35 us High Side Conduction TIMING SECTION SENSE OP AMP sore mit rt 1 m he Sink Output Current Sink Output Current Current Vout 0 2V OP AMP input common mode 0 2 range 3 4 17 L6598 Table 6 Electrical Characteristcs continued Vs 12V VBoor Vout 12V Tamb 25 C Symbo Pin Parameter TestCondition Min Typ Max Unit GBW Sense Op Amp Gain Band 0 5 1 MHz Width Product Gac PC Open Loop Gain COMPARATORS Ww 8 Enabling Comparator Threshold 056 os 99 v Guaranted by design Figure 4 EN2 Timing Diagrams fstart Tss D981N889 Figure 5 EN1 Timing Diagrams D981N890 lt 5 17 L6598 Figure 6 Oscillator Output Timing Diagram D98IN897 3 BLOCKS DIAGRAM DESCRIPTION 3 14 High Low Side driving section An High and Low Side driving Section provide the proper driving to the external Power MOS or IGBT An high sink
5. KHz m 2 3 130 Iq Vclamp 2 1 120 la 12V 1 9 110 rA 100 1 5 50 0 50 100 T C 50 0 50 100 T C Figure 19 Vs thresholds and clamp vs temp Figure 22 HVG Source and Sink Current vs CA Temperature W L S Ih Vclamp des 14 500 12 400 10 Vsuvp Ihvg sink curr 300 8 Ihvg source curr Vsuvn 200 6 50 0 50 100 T C 100 50 0 50 100 T C 12 17 L L6598 Figure 23 LVG Source and Sink Current vs Figure 24 Soft Start Timing Constant vs Temperature Temperature Ilvg kss mA S F 500 TRL U IS 400 Ilvg sink curr 300 0 14 200 llvg source curr 100 0 12 50 0 50 100 T C 50 0 50 100 T C Figure 25 Wide Range AC DC Adapter Application 85 to 270 L6561 2 D98IN874A_MOD2 13 17 L6598 Figure 26 DIP 16 Mechanical Data amp Package Dimensions OUTLINE AND MECHANICAL DATA 14 17 Figure 27 SO 16N Mechanical Data amp Package Dimensions TYP al a2 b1 0 050 0 5 1 27 8 89 0 350 SIUE s ps os se os em efa T pe e se pur m 1 75 0 25 1 6 0 46 0 25 45 10 6 2 4 0 30 1 27 0 62 0 157 0 208 0 050 0 024 0 150 0 181 0 150 ax 1 D and F do not include mold flash or protrusions Mold flash or protrusions shall not exceed 0 15mm 006inc OUTLINE AND MECHANICAL DATA SO16 Narrow 0016020 D
6. gned to offer Low Output Impedance wide band High input Impedance and wide Common Mode Range It can be readily used to implement protection features or a closed loop control For this purpose the OP AMP Output can be properly connected to Rimin pin to adjust the oscillation frequency 3 5 Comparators Two CMOS comparators are available to perform protection schemes Short pulses gt 200ns on Comparators Input are recognised The EN1 input active High has a threshold of 0 6V typical value forces the device ina latched shut down state e g LVG Low HVG low Oscillator stopped as in the Under Voltage Conditions Nor mal Operating conditions are resumed after a power off power on sequence The EN2 input active high with a threshold of 1 2V typical value restarts a Soft Start sequence see Timing Diagrams In addition the EN2 Comparator when activated removes a latched shutdown caused by ENI Figure 15 Switching Time Waveform Definitions D981N898 T1 Tperiod Dc Tperiod D981N899 L 11 17 L6598 Figure 17 Typ fmin vs Temperature Figure 20 Start Up Current vs Temperature fmin D981N895 Isu KHz uA 70 200 _L_LL 60 150 50 100 40 50 50 0 50 100 T C 50 0 50 100 T C Figure 18 Typ fstart vs Temperature Figure 21 Quiescent Current vs Temperature fistart D981N896 Iq
7. hreshold voltage At low frequency this drop is very small and can be neglected Anyway increasing the frequency it must be taken in to account In fact the drop reducing the amplitude of the driving signal can significantly increase the Rpson of the external power MOS and so the dissipation To be considered that in resonant power supplies the current which flows in the power MOS decreases increas ing the switching frequency and generally the increases of Rpson is not a problem because power dissipation is negligible The following equation is useful to compute the drop on the bootstrap driver Q _ B g Varop IchargeRason Vdiode Vdrop SIT Picon Vdiode 8 charge where Qg is the gate charge of the external power MOS Rason is the on resistance of the bootstrap DMOS and Tcharge is the time in which the bootstrap driver remains on about the semiperiod of the switching frequency minus the dead time The typical resistance value of the bootstrap DMOS is 150 Ohm For example using a power MOS with a total gate charge of 30nC the drop on the bootstrap driver is about 3V at a switching fre quency of 200kHz In fact _ 30nC drop DO 2 6V To summarise if a significant drop on the bootstrap driver at high switching frequency when large power MOS are used represents a problem an external diode can be used avoiding the drop on the Rpson of the DMOS 10 17 Oo gt 7 L6598 3 4 OP AMP Section The integrated OP AMP is desi
8. in OPOUT OPIN OPIN ENI CO N OO Aa C N D981N888 Table 2 Thermal Data Rth j amb Thermal Resistance Junction to Ambient Table 3 Pin Function e I mTIIZ Rw N VN tl Low Side Driver Output 7 10 11 lt 2 17 L6598 Table 4 Absolute Maximum Ratings VBOOT pin Slew Rate repetitive r Storage Temperature 40 to 150 Junction Temperature 40 to 150 Ambient Temperature 40 to 125 The device is provided of an internal Clamping Zener between GND and the Vs pin It must not be supplied by a low impedance voltage source Note ESD immunity for pins 14 15 and 16 is guaranteed up to 900 Human Body Model Table 5 Recommended Operating Conditions Vout High Side Reference 1 to Vboot V Vboot Floating Supply Rail 500 Maximum Switching Frequency 400 If the condition Vboot Vout lt 18 is guaranteed Vout can range from 3 to 580V 191 3 17 Vs 12V Vgoor Vout 12V Tamb 25 C Symbol Pin Parameter Test Condition win Typ Max Unt SUPPLY VOLTAGE Ta Vo Tam On teste o 107 14 Y VstunOftmestod Tasse 97 V e pee E hysteresis CERE ee r 60kHz no load HIGH VOLTAGE SECTION ke 16 BOOT pin Leakage Gurrent _ Vaoor 580V 5 A we 14 OUTpinLeakage Current Vour 56V 5 Reon 16 Bootstrap Driver On Resistance 100 180 300 _ H
9. source driving current 450 250 mA typ ensure fast switching times also when size4 Power MOS are used The internal logic ensures a minimum dead time to avoid cross conduction of the power devices 3 2 Timing and Oscillator Section The device is provided of a soft start function It consists in a period of time Tss in which the switching frequen cy shifts from fstart to fmin This feature is explained in the following description ref fig 7 and fig 8 Figure 7 Soft Start and frequency shifting block 6 17 ATI L6598 During the soft start time the current Iss charges the capacitor Css generating a voltage ramp which is delivered to a transconductance amplifier as shown in fig 7 Thus this voltage signal is converted in a growing current which is subtracted to liar Therefore the current which drives the oscillator to set the frequency during the soft start is equal to gml losc tmin Clistart 7 ImVcss limin listar Et 1 SS V V REF REF where limin 377 lar gt VREF 2V 2 fmin fstart At the start up t 0 the oscillator frequency is set by 1 1 losc 0 limin start Vrerla B 3 fmin fstar At the end of soft start t Tss the second term of eq 1 decreases to zero and the switching frequency is set only by Imin i e Rtmin V HEF loscl Ts Itmin R 4 fmin Since the second term of eq 1 is equal to zero we have Omlss C ss tstart istat _ ss F 03 Iss DI SS Im
10. y L6598 HIGH VOLTAGE RESONANT CONTROLLER 1 FEATURES m HIGH VOLTAGE RAIL UP TO 600V m dV dt IMMUNITY 50V ns IN FULL TEMPERATURE RANGE m DRIVER CURRENT CAPABILITY 250mA SOURCE 450mA SINK m SWITCHING TIMES 80 40ns RISE FALL WITH 1nF LOAD gm CMOS SHUT DOWN INPUT m UNDER VOLTAGE LOCK OUT m SOFT START FREQUENCY SHIFTING TIMING m SENSE OP AMP FOR CLOSED LOOP CONTROL OR PROTECTION FEATURES m HIGH ACCURACY CURRENT CONTROLLED OSCILLATOR m INTEGRATED BOOTSTRAP DIODE m CLAMPING ON Vs m 5016 DIP16 PACKAGES 2 DESCRIPTION The device is manufactured with the BCD OFF LINE Figure 2 Block Diagram 5 pi aa UV SEINS M DETECTION OPIN DEAD TIME Rfmin l Ifstart Rfstart l June 2004 Figure 1 Packages Table 1 Order Codes technology able to ensure voltage ratings up to 600V making it perfectly suited for AC DC Adapters and wherever a Resonant Topology can be benefi cial The device is intended to drive two Power MOS in the classical Half Bridge Topology A dedicated Timing Section allows the designer to set Soft Start Time Soft Start and Minimum Frequency An Error Amplifier together with the two Enable inputs are made available In addition the integrated Bootstrap Diode and the Zener Clamping on low voltage sup ply reduces to a minimum the external parts needed in the applications BOOTSTRAP DRIVER D981N887A 1 17 L6598 Figure 3 Pin Connection Css Rfstart Cf Rfm
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