STMICROELECTRONICS L6574 handbook
Contents
1. with Ring 50kQ Af D981N869 KHz 100 80 RING 50KQ 60 40 100 L6574 Figure 4 Af vs with Ring 100kQ Af KHz 40 D981N870 RING 100KQ 20 20 Figure 5 vs temperature fiNG KHz 70 60 50 Figure 6 vs temperature KHz 130 120 110 40 60 80 100 D98IN871 0 50 100 TCC D98IN872 0 50 100 TCC 7 10 L6574 OUTLINE AND iem A al 0 1 a2 b 0 35 b1 0 19 2 EN MECHANICAL DATA Weight 0 20gr ese Le se Fee om ore 1 27 0 050 8 89 0 350 F 1 3 8 0 150 0 157 4 6 5 3 0 181 EU Poa rar oars PEE 8 max SO16 Narrow 1 D and do not include mold flash or protrusions Mold flash or potrusions shall not exceed 0 15mm 006inch 8 10 0016020 L6574 OUTLINE AND MECHANICAL DATA y al b1 D E e 9 10 L6574 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of ST2. 16574 CFL TL BALLAST DRIVER PREHEAT AND DIMMING m HIGH VOLTAGE RAIL UP TO 600V m dV dt IMMUNITY 50 V ns IN FULL TEMPERATURE RANGE m DRIVER CURRENT CAPABILITY 250mA SOURCE 450mA SINK m SWITCHING TIMES 80 40ns RISE FALL m WITH 1nF LOAD m CMOS SHUT DOWN INPUT m UNDER VOLTAGE LOCK OUT m PREHEAT AND FREQUENCY SHIFTING TIMING m SENSE OP AMP FOR CLOSED LOOP CONTROL OR PROTECTION FEATURES m HIGH ACCURACY CURRENT CONTROLLED OSCILLATOR m INTEGRATED BOOTSTRAP DIODE m CLAMPING ON VS m 5016 DIP 16 PACKAGES DESCRIPTION In order to ensure voltage ratings in excess of 600V the L6574 is manufactured with BCD OFF LINE technology which makes it well suited for lamp ballast applications BLOCK DIAGRAM uv DETECTION CONTROL ye SO16N DIP16 ORDERING NUMBERS L6574D L6574 The device is intended to drive two power MOS FETS in the classical half bridge topology ensur ing all the features needed to drive and properly control a fluorescent bulb A dedicated timing section in the L6574 allows the user set the necessary parameters for proper pre heat and ignition of the lamp Also an OP AMP is available to implement closed loop control of the lamp current during normal lamp burning An integrated bootstrap section eliminating the nor mally required bootstrap diode and the zener clamp ing on Vs makes the L6574 well suited for low cost applications where few additio
3. Vsuvp 12 Vs On Threshold Vs Turn Off Threshold 2 10 ERES ur 5 T gt Quiescent Current fout 60kHz no load va EN High voltage Section Ibootleak 16 BOOT pin leakage current VBoor 580V loutleak 14 OUT pin Leakage Current Vour 562V High Low Side Drivers gt gt gt 3 2 Invgso 3 gt Ihvgsi 3 gt lhvgso livgsi 2 o trise 2 o EN EUN tall Dc fing 14 Minimum Output Oscillation Frequency Maximum Output Oscillation Cr 470pF Frequency Ring 50 14 Rpre 47kQ Vref 2 4 Voltage to current converters threshold fpre vref 2 4 Reference Current 1 Dead Time between Low and High Side Conduction ta EEE 4 10 L6574 ELECTRICAL CHARACTERISTCS continued Vs 12V Vpoor Vour 12V Tamb 25 Symbol Pim Parameter TestCondiion Min Typ unit Timing Section mes meme TY Threshold m RE E 67 Common EN E ___ Product OC OpentoopGan e Comparators Ve Enabling Comparators 05 oe Joe v Wwe mv we 1 High Low Side Driving Section High and low side driving sections provide the proper drive to the external power MOSFET A high sink Source driving curre
4. Microelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2003 STMicroelectronics All rights reserved STMicroelectronics GROUP OF COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States www st com 1572 10 10
5. nal components are needed to build a high performance ballast BOOTSTRAP DRIVER LEVEL DRIVING SHIFTER LOGIC LVG DRIVER D971N493A 1 10 September 2003 L6574 PIN CONNECTION top view O A UO D971N492 THERMAL DATA Parameter DIP16 SO16N Unit Thermal Resistance Junction to ambient Max 8 1 Preheat Timing Capacitor The capacitor Cppe sets the preheating and the frequency shift time according to the relations and Kes Cpre typ Kpre 1 5s uF KFs 0 15s uF This feature is obtained by charging CPRE with two different currents During tPRE this current is independent of the external components so CPRE is charged up to 3 5V preheat timing comparator threshold During 5 the current depends on Rpne value i e on the differ ence between fpre and fign In this way tsp is always set at 0 1tpre In steady state the voltage at pin 1 is 5V Maximum Oscillation Frequency Setting The resistance connected between this pin and ground sets the fPRE value fixing the difference between fpng and 1 gt At the end of the Start up procedure the effect current drown from Rpre is over The voltage at this pin is fixed at 22V Oscillator Frequency Setting The capacitor Cr along with to Rpre and Rian sets feng and In normal operation this pin shows a triangular wave Minimum Oscillation Frequency Se
6. nt 450 250 mA typical ensures fast switching times when a size 4 external power MOSFET needs to be driven E EIE Bootstrap Section A patented integrated bootstrap section replaces an external bootstrap diode This section together with a bootstrap capacitor provides the bootstrap voltage to drive the high side power MOSFET This function is achieved using a high voltage DMOS driver which is driven synchronously with the low side external power MOSFET For a safe operation current flow into the Vboot pin is inhibited even though ZVS operation may not be ensured Timing Section To set the proper preheat time tpre kpre Cpre for the bulb a capacitor is connected to the Cpre pin which is charged with a fixed current During tpre the output is switching at fpre see Oscillator Section When the tpre expires the Cpre capacitor is discharged and then recharged with a different current This sets a second time interval tsh 0 1 times the selected preheat time tpre during which frequency shifting from fpre to fing is performed to ensure lamp ignition 5 10 L6574 Oscillator Section A voltage controlled oscillator with the selected frequencies fpre and fing drives the output half bridge Independently selected fpre is effective during tpre and fing is effective during normal lamp burning When working open loop fpre and fing are the highest and lowest allowed oscillation frequencies Closed loop control of the lamp c
7. o the HV and those related to the LV side High Side Driver Floating Reference This pin must be connected close to the source of the high side power MOS or IGBT Bb High Side Driver Output This pin must be connected to the high side power MOSFET gate of the half bridge A resistor connected between this pin and the power MOS gate can be used to reduce the peak current VBOOT Bootstrapped Supply Voltage Between this pin and VS must be connected the bootstrap capac itor A patented integrated circuitry replaces the external bootstrap diode by means of a high voltage DMOS synchronously driven with the low side power MOSFET ABSOLUTE MAXIMUM RATINGS High Side Reference V Floating Supply Voltage dVpgoor dt pin Slew rate repetitive 50 V ns dVour dt OUT pin Slew Rate repetitive 50 V ns Forced Input Voltage pins Ring Rpre Forced Input Voltage pins Cpre Cf mA Sense Op Amp Output Voltage forced c c The device has an internal Clamping Zener between GND and the Vcc pin it must not be supplied by a Low Impedance Voltage Source Note ESD immunity for pins 14 15 and 16 is guaranteed up to 900V Human Body Model 3 10 L6574 RECOMMENDED OPERATING CONDITIONS Supply Voltage Floating Supply Voltage 500 If the condition Vboot Vout lt 18 is guaranteed Vout can range from 3 to 580V ELECTRICAL CHARACTERISTCS Vs 12V Vpoor Vour 12V Tamb 25 Supply Voltage
8. tting The resistance connected between this pin and ground sets the fian value The voltage at this pin is fixed at VREF 2V 5 OPout Out of the operational amplifier To implement a feedback control loop this pin can be connected to the RIGN pin by means an appropriate circuitry 6 OPin Inverting Input of the operational amplifier Non Inverting Input of the operational amplifier EN1 Enable 1 This pin active high forces the device in a latched shutdown state like in the under voltage conditions There are two ways to resume normal operation the first is to reduce the supply voltage below the undervoltage threshold and then increase it again until the valid supply is recognised the second is activating EN2 input The enable 1 is especially designed for strong fault e g in case of lamp disconnection 2 10 1 L6574 PIN DESCRIPTION continued Enable 2 EN2 input active high restarts the start up procedure preheating and ignition sequence This features is useful if the lamp does not turn on after the first ignition sequence Low Side Driver Output This pin must be connected to the low side power MOSFET gate of the half bridge A resistor connected between this pin and the power MOS gate can be used to reduce the peak current Supply Voltage This pin connected to the supply filter capacitor is internally clamped 15 6V typical BM Non Connected This pin set a distance between the pins related t
9. urrent under normal operation can be achieved with the L6574 This is accomplished by automatic adjustment of the oscillator frequency The OP AMP output is fed through a resistor diode network to the Ring pin See AN 993 OP AMP Section The integrated OP AMP offers low output impedance wide bandwidth high input impedance and wide common mode range It can be readily used to implement closed loop control see Oscillator Section of the lamp current EN1 EN2 Comparators Two CMOS comparators with thresholds set at 0 6 V typical are available to implement protection meth ods such as overvoltage lamp removal etc Short pulses 200nsec at the comparator inputs are rec ognized The EN1 input active high forces the L6574 in the shut down state e g LVG low HVG low oscillator stopped in the event of an undervoltage condition Normal operating condition is resumed after a power off power on sequence or when EN2 input is high The EN2 input active high also restarts a preheat sequence see timing diagrams TIMING DIAGRAMS Vcc LVG HVG EN1 D971N490 D97IN491B tsH 5 6 10 Figure 1 fing vs RING KHz 100 80 60 D98IN867 40 60 80 100 Ring KQ Figure 2 Af vs with Ring Af D981N868 KHz RING 33KQ 80 60 40 40 60 80 100 RprE KQ Figure 3 Af vs
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STMICROELECTRONICS L6574 handbook