INTERNATIONAL RECTIFIER IRS2111(S)PbF HALF-BRIDGE DRIVER
Contents
1. 320 V 320 V 0v 150 160 V 150 e T 30 V S 125 9 125 o 5 100 100 T w B15 9 15 E E lt 50 SS 2 50 S S 9 25 2 S 5 RK 5 0 0 1E 2 E 3 EH Et5 E 6 1E 2 E 3 E 4 E 5 E 6 Frequency kHz Frequency kHz Figure 31 IR2111S Ty vs Frequency IRFBC20 Figure 32 IR2111S Ty vs Frequency IRFBC30 Recarte 33 Q Vcc 15 V Reate 22 Q Vcc 2 15 V 320 V 140 V 320 V 140 V 30 V 150 30 V 150 5 123 G 125 CE 9 100 2 100 2 2 K E gd 75 D 75 E E g 50 2 50 5 5 25 25 2 2 2 2 gt 0 2 0 1E 2 E 3 E 4 E 5 E 6 1E 2 E 3 E 4 E 5 E 6 Frequency kHz Frequency kHz Figure 33 IR2111S Ty vs Frequency IRFBC40 Figure 34 IR2111S Ty vs Frequency IRFPC50 Reate 15 Q Vcc 15 V Reate 10 2 Vcc 15V www irf com 13 International IRS2111 S PbF TOR Rectifier Case outlines MEASURE PERPENDICULAR TO DATUM PLANE C DIMENSION DOES NOT INCLUDE MOLD PROTUSIONS SHALL NOT EXCI 25 01 6014 8 Lead PDIP 01 3003 01 MS 001AB INCHES MILLIMETERS MN MAX MN MAX FOOTPRINT 0532 0688 135 1 75 0040 0098 0 10 0 25 013 020 033 051 h rm nd 0075 0098 0 19 0 25 A EE E 189 1968 480 5 00 r To 1497 1574 3 80 4 00 646 22. 11 gt 10 10 Max wee ede eee cette 5 3 ER ni L Max krk 8 Typ is d o Typ Sen S co mam RR UR RR S Min ale ee EINE s g SE AE 5 Min ege er Po o 7 ENKE LL E 5 2 o 8 6 gt 6 gt 5 5 0 5 7 10 15 50 25 0 25 50 75 100 125 Temperature C Temperature C Figure 23 Vcc Undervoltage vs Temperature Figure 24 Vcc Undervoltage vs Temperature 500 500 T T E E 400 400 Typ p G 300 6 300 Se Min o Perde 9 P _ 2 Typ B 3 200 S 2 200 SR Kal 05 Leg a 100 a 100 5 5 Min O O 0 0 50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature C Maas Supply Voltage V Figure 25A Output Source Current vs Temperature Figure 25B Output Source Current vs Voltage 900 900 750 Z 750 E Typ t 9 e00 P 600 3 Min eet a O Typ e Q 450 nell gt 450 a c D le sw d E K ARR 2 300 Seedy SO goy E gt gt Q E 3 150 a 150 0 0 50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature C Vous Supply Voltage V Figure 26A Output Sink Current vs Temperature Figure 26B Output Sink Current vs Voltage www irf com 11 International TOR Rectifier S 320 V ta
3. 25 0 25 50 75 Temperature C Figure 9A Turn On Rise Time vs Temperature irf com Turn On Delay Time ns Turn Off Delay Time ns IRS2111 S PbF 10 12 14 16 18 20 VBias Supply Voltage V Figure 7B Turn On Time vs Voltage 400 350 300 250 200 Typ 10 12 14 16 18 20 VBias Supply Voltage Figure 8B Turn Off Time vs Voltage 400 350 Turn On Rise Time ns 10 12 14 16 18 20 VRAS Supply Voltage V Figure 9B Turn On Rise Time vs Voltage International IRS2111 S PbF TOR Rectifier 200 200 E 150 150 w E E E 100 YES E 100 SS l B 50 50 O DR z Typ F 0 F 0 50 25 0 2 50 75 100 125 10 12 14 16 18 20 Temperature C VBIAS Supply Voltage V Figure 10A Turn Off Fall Time vs Temperature Figure 10B Turn Off Fall Time vs Voltage 1250 1250 1000 1000 3 M ax LA Max 2 I pene ue Typ 750 TYP G BS o amp 500 g 500 rr S A 250 250 0 0 50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature C VBIAS Supply Voltage V Figure 11A Deadtime vs
4. Description Logic input for high side and low side gate driver outputs HO amp LO in phase with HO High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Part Number www irf com 4 International IRS2111 S PbF TOR Rectifier Vog 15V HV 10 to 600V IN SR 9 I T 100 uF Te 1 8 H ll 8 HO gt 7 OHO 2 We 4 10KF6 gt 50 V ns Ee OUTPUT S SR SG SR dp MONITOR qn walie lt 9 Figure 1 Input Output Timing Diagram Figure 2 Floating Supply Voltage Transient Test Circuit 90 Figure 3 Switching Time Test Circuit Figure 4 Switching Time Waveform Definition 50 50 LO HO 10 MT N gt 4 MT 90 LO HO Figure 5 Deadtime Waveform Definitions Figure 6 Delay Matching Waveform Definitions www irf com 5 International T R Turn Off Delay Time ns Turn On Delay Time ns Turn On Rise Time ns WWW Rectifier Lee 25 0 25 50 75 100 125 Temperature C Figure 7A Turn On Time vs Temperature 400 350 300 250 200 150 Typ 100 50 0 25 0 25 50 75 125 Temperature C 50 100 Figure 8A Turn Off Time vs Temperature 400 350 300 250
5. 10 12 14 16 18 20 Vac Supply Voltage V Figure 14B High Level Output vs Supply Voltage Max Typ 10 12 14 16 18 20 Va Supply Voltage V Figure 15B Low Level Output vs Voltage International IRS2111 S PbF TOR Rectifier 500 500 3 E 400 E 400 3 300 d 300 gt amp 200 Q S Max 200 D D Max 190 3 100 D o L o H 0 SR Er o 0 100 200 300 400 500 600 Temperature C Vg Boost Voltage v Figure 16A Offset Supply Current vs Temperature Figure 16B Offset Supply Current vs Voltage 200 200 lt 2 150 150 5 en Max S Max Ur S O E der gt 100 6 100 S ER i E Typ 8 p yp o 50 Tres D 50 het gt gt 0 0 50 25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature C VBs Floating Supply Voltage V Figure 17A Vgs Supply Current vs Temperature Figure 17B Vgs Supply Current vs Voltage _ 500 500 lt 3 lt 400 400 c o c o bal 6 300 5 300 gt Max T M SA Q 2 ax Rieti El 200 mE 8 200 Sr r 8 100 Typ Q 100 H gt Oo RO E 3 Typ 0 0 50 25 0 25 50 75 100 12 10 12 14 16 18 20 Temperature C Voc Fixed Supply Voltage V Figure 18A Vcc Supply Current vs Temperature Figure 18B Vcc Supply Current vs Volt
6. Nn le rna ti ond Data Sheet No PD60253 TOR Rectifier IRS2111 S PbF HALF BRIDGE DRIVER Features Product Summary Floating channel designed for bootstrap operation Fully operational to 600 V VOFFSET 600 V max Tolerant to negative transient voltage dV dt immune 10 200 mA 420 mA Gate drive supply range from 10 V to 20 V e Undervoltage lockout for both channels VOUT 10V 20V CMOS Schmitt triggered inputs with pull down Matched propagation delay for both channels ton off typ 750 ns amp 150 ns e Internally set deadtime High side output in phase with input Deadtime typ 650 ns Description Packages The IRS2111 is a high voltage high speed power MOSFET and IGBT driver with dependent high and low side referenced out put channels designed for half bridge applications Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction Logic input is compatible with standard CMOS outputs The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction In ternal deadtime is provided to avoid shoot through in the output paci Ee 8 Lead SOIC half bridge The floating channel can be used to drive an N E channel power MOSFET or IGBT in the high side configuration which operates up to 600 V Typical Connection up to 600 V E Refer to Lead Assignments for correct pin configura
7. 8SOICN Code BT 2095 2145 0 824 0844 D Los 245 0767 0096 15 International IRS2111 S PbF TOR Rectifier LEADFREE PART MARKING INFORMATION Part number RSxxxx Date code YWW Te aR IR logo Pin 1 0 XXXX Identifier J Lot Code i MARKING CODE Prod mode 4 digit SPN code P Lead Free Released Non Lead Free Released L Assembly site code Per SCOP 200 002 ORDER INFORMATION 8 Lead PDIP IRS2111PbF 8 Lead SOIC IRS2111SPbF 8 Lead SOIC Tape amp Reel IRS2111STRPbF International IER Rectifier The SOIC 8 is MSL2 qualified The SOIC 14 is MSL3 qualified This product has been designed and qualified for the industrial level Qualification standards can be found at www irf com http www irf com IR WORLD HEADQUARTERS 233 Kansas St El Segundo California 90245 Tel 310 252 7105 Data and specifications subject to change without notice 6 14 2006 www irf com 16
8. Logic 1 input voltage for HO amp logic 0 for LO Vcc 10V Vcc 15V Vcc 20V VIL Logic 0 input voltage for HO amp logic 1 for LO Vcc 10V Vcc 15V Vcc 20 V VOH High level output voltage Vgjas Vo VoL Low level output voltage Vo lo 2mA ILK Offset supply leakage current VB Vs 600 V lags Quiescent Vgs supply current lacc Quiescent Vcc supply current Vin 0VorVec liN Logic 1 input bias current VIN Vcc liN Logic 0 input bias current Vin 0V VBSUV VBs supply undervoltage positive going threshold VBsuv VBs supply undervoltage negative going threshold Vecuv Vcc supply undervoltage positive going threshold Vccuv Vcc supply undervoltage negative going threshold Output high short circuit pulsed current Vo 0V VINS Vcc PW lt 10 us www irf com Output low short circuit pulsed current Vo 15V Vin 0V PW lt 10 us International IRS2111 S PbF TOR Rectifier Functional Block Diagram e e Va 3 UV R n DETECT a d e R un E FRA Seege TIME e S lt Lx IF PULSE f GEN L UV n OS DETECT T lt Vo DEAD TIME P
9. Temperature Figure 11B Deadtime vs Voltage LO S 15 m g 12 32 Min o Min SC c 9 et ZS i m 3 Ee Es 3 o m o 0 5 50 5 0 2 50 75 100 125 e 10 12 14 16 18 20 Temperature C Figure 12A Logic I Input voltage for HO Figure 12B Logic I Input voltage for HO amp Logic 0 for LO vs Temperature amp Logic 0 for LO vs Voltage www irf com 7 International TOR Rectifier Logic 0 Input Threshold V 50 25 0 25 50 75 125 Temperature C 100 Figure 13A Logic 0 Input voltage for HO amp Logic I for LO vs Temperature gt 1 0 S 08 o gt 5 0 6 a 5 O 0 4 o Max 9 E 0 2 e A be vn cl ni I Typ 0 0 50 25 0 25 50 75 100 125 Temperature C Figure 14A High Level Output vs Temperature 0 5 ob Sg 0 4 E s 03 Qo 35 O 02 M 9 01 ax DEREN EE Typ 0 50 25 0 25 50 75 100 125 Temperature C Figure 15A Low Level Output vs Temperature www irf com Logic 0 Input Threshold V High Level Output Voltage V Low Level Output Voltage V IRS2111 S PbF 15 12 10 12 14 16 18 20 VCC Logic Supply Voltage V Figure 13B Logic 0 Input voltage for HO amp Logic I for LO vs Voltage o co e R
10. 125 3 u S 100 3 160 V 5 15 30 V S 50 o E 3 25 0 1E 2 E 3 Et4 Et5 E 6 Frequency kHz Figure 27 IR2111 Ty vs Frequency IRFBC20 Reate 33 Q Vcc 15 V Junction Temperature C Sch 320 V 160 V 125 Lg 30V 100 75 50 25 0 1E 2 E 3 E 4 E 5 Et6 Frequency kHz Figure 29 IR2111 Ty vs Frequency IRFBC40 Reate 15 Q Vcc 15 V www irf com Junction Temperature C Junction Temperature C IRS2111 S PbF 1E 2 E 3 Et4 Et5 Et6 Frequency kHz Figure 28 IR2111 Ty vs Frequency IRFBC30 Reate 22 Q Vcc 15 V 320 V 160 V 150 30 V 123 1E 2 E 3 E 4 1E 5 E 6 Frequency kHz Figure 30 1R2111 Ty vs Frequency IRFPC50 Reate 10 Q Vcc 15 V 12 E IRS2114 S PbF
11. 55 050 BASIC 1 27 BASIC TmT d uiu I 8X 0 72 028 H 0 25 010 AW 025 BASIC 0 635 BASIC 2284 2440 5 80 6 20 0099 0196 0 25 0 50 016 o0 040 127 3127105014 gx 1 781 070 os Ti seen Es K x 452 A c ys T SW Aforoa JL a pe BX D 0 25 010 0 C alB 7 NOTES 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 1 DIMENSIONING amp TOLERANCING PER ASME Y14 5M 1994 __ MOLD PROTRUSIONS NOT TO EXCEED 0 15 006 2 CONTROLLING DIMENSION MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 3 DIMENSIONS ARE SHOWN IN MILLIMETERS INCHES MOLD ERO TRUSIONS NOLO EXCEED 029010 4 OUTLINE CONFORMS TO J EDEC OUTLINE MS 012AA EE 01 6027 8 Lead SOIC 01 0021 11 MS 012AA www irf com 14 International TOR Rectifier Tape amp Reel 8 lead SOIC www irf com IRS2111 S PbF LOADED TA PE FEED DIRECTION NOTE CONTROLLING DIMENSION IN MM CARRIER TAPE DIMENSION FOR 8SOICN Ei eer EE Code Min Max E ax ip also aio osa 0181 3 90 4 10 153 e 4 61 IC 11 70 1230 046 0484 ip 545 555 0214 0218 Jk REEL DIMENSIONS FOR
12. age www irf com 9 International TOR Rectifier Input Bias Current WA Logic 1 Logic 0 Input Bias Current uA VBS UVLO Threshold V 120 100 80 60 40 20 50 25 0 25 50 75 100 125 Temperature C Figure 19A Logic 1 Input Current vs Temperature 5 Max 50 25 0 25 50 75 100 125 Temperature C Figure 20A Logic 0 Input Current vs Temperature 12 11 Max 10 9 Typ o a rr H 8 7 Min 6 50 25 0 25 50 75 100 125 Temperature C Figure 21 Vgs Undervoltage Threshold vs Temperature www irf com Logic 1 Input Bias Current uA O e Logic 0 Input Bias Current uA IRS2111 S PbF 120 100 Typ 0 10 12 14 16 18 20 VCC Supply Voltage V Figure 19B Logic 1 Input Current vs Vcc Voltage 5 4 3 2 Max 1 0 10 12 14 16 18 20 VCC Supply Voltage V Figure 20B Logic 0 Input Current vs Vcc Voltage 12 11 10 Max VBS UVLO Threshold V Temperature C Figure 22 Vgs Undervoltage Threshold vs Temperature 10 International IRS2111 S PbF TOR Rectifier 11
13. tion This diagram shows electrical connections only Please refer to our Application Notes and DesignTips for proper circuit board layout www irf com 1 International IRS2111 S PbF TOR Rectifier Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur All voltage param eters are absolute voltages referenced to COM The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions Additional information is shown in Figs 7 through 10 Definition in Max High side floating supply voltage 625 Note 1 High side floating supply offset voltage VB 0 3 High side floating output voltage Vp 0 3 Low side and logic fixed supply voltage 0 25 Note 1 Low side output voltage 0 Vcc 0 3 Logic input voltage Vcc 0 3 Allowable offset supply voltage transient Fig 2 50 8 Lead PDIP 1 0 8 lead SOIC 0 625 8 lead PDIP 125 8 lead SOIC 200 Junction temperature 150 Package power dissipation TA lt 25 C Thermal resistance junction to ambient Storage temperature 150 Lead temperature soldering 10 seconds 300 Note 1 All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply Recommended Operating Conditions The input output logic timing diagram is shown in Fig 1 For proper operation the device sho
14. uld be used within the recommended conditions The Vs offset rating is tested with all supplies biased at a 15 V differential Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage Ambient temperature Note 2 Logic operational for Vs of 5 V to 600 V Logic state held for Vs of 5 V to Vgs Please refer to the Design Tip DT97 3 for more details www irf com 2 International TOR Rectifier Dynamic Electrical Characteristics VBIAS Vcc Vgs 15 V CL 1000 pF and Ta 25 C unless otherwise specified The dynamic electrical characteristics are measured using the test circuit shown in Fig 3 Definition IRS2111 S PbF Test Conditions Turn on propagation delay Turn off propagation delay Vg 0V Turn on rise time Vg 600 V Turn off fall time Deadtime LS turn off to HS turn on amp HS turn off to LS turn on Delay matching HS amp LS turn on off Static Electrical Characteristics Veias Vcc VBs 15 V and TA 25 C unless otherwise specified The Vin VTH and IN parameters are referenced to COM The Vo and lo parameters are referenced to COM and are applicable to the respective output leads HO or LO Definition Test Conditions
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