FAIRCHILD SEMICONDUCTOR FGH30N6S2D FGP30N6S2D FGB30N6S2D handbook
Contents
1. 5 E 12 T T T 9 Rg 100 L 500mH Vcg 390V Vgg 15V O 1 9 Erora Eone Eorr x lcg 24A rd u 08 z ii 9 Z 06 5 E 2 lee 12 a 5 0 2 e cg 6A 3 o ur 25 50 75 100 125 150 Tc CASE TEMPERATURE C Figure 15 Total Switching Loss vs Case Temperature 14 T T T FREQUENCY 1MHz C CAPACITANCE nF 0 10 2 30 40 50 60 70 80 90 100 Vcg COLLECTOR TO EMITTER VOLTAGE V Figure 17 Capacitance vs Collector to Emitter Voltage 16 T T T T T T Ig REF 1mA Ri 250 Ty 25 C 14 Vee GATE TO EMITTER VOLTAGE V 2 4 6 8 10 12 14 16 18 20 22 24 Qg GATE CHARGE nC Figure 14 Gate Charge 10 p E Ty 125 C L 5004H Vcg 390V Vae 15V Erota Eone Eorr 0 1 1 0 EroraL TOTAL SWITCHING ENERGY LOSS mJ Figure 16 Total Switching Loss vs Gate 10 100 1000 Rg GATE RESISTANCE 0 Figure 18 Collector to Emitter On State Voltage vs Resistance S 35 s s u DUTY CYCLE 0 5 g PULSE DURATION 250us Ty 25 C d S 30 tr E w 25 o o m i 2 0 al al e o Bas 2 Voe GATE TO EMITTER VOLTAGE V Gate t2. Symbol BVces Ratings 600 lcos Collector Current Continuous Tc 25 C 45 lc110 Collector Current Continuous Tc 110 C 20 lom Collector Current Pulsed Note 1 108 VaEs Gate to Emitter Voltage Continuous 20 VGEM Gate to Emitter Voltage Pulsed 30 SSOA Switching Safe Operating Area at Tj 150 C Figure 2 60A at 600V Eas Pulsed Avalanche Energy lcg 12A L 2mH Vpp 50V 150 Power Dissipation Total Tc 25 C 167 Power Dissipation Derating Tc gt 25 C 1 33 Operating Junction Temperature Range 55 to 150 TsrG Storage Junction Temperature Range 55 to 150 CAUTION Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied NOTE 1 Pulse width limited by maximum junction temperature 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dOd dG6S9NO H9J Package Marking and Ordering Information Device Marking Device Package Tape Width Quantity 30N6S2D FGB30N6S2D TO 263AB 24mm 800 30N6S2D FGP30N6S2D TO 220AB 30N6S2D FGH30N6S2D TO 247 Electrical Characteristics 1 25 c unless otherwise noted Symbol Paramet
3. 100 Vg 15V L 100mH s a LE Z 4 E u 5 B o tc 2 tc o 30 W g E p i o 20 FE l 9 5 9 E o o A 10 B u J 2 o 5 0 9 25 50 75 100 125 150 ae 0 100 200 300 400 500 600 700 Tc CASE TEMPERATURE C Voce COLLECTOR TO EMITTER VOLTAGE V Figure 1 DC Collector Current vs Case Figure 2 Minimum Switching Safe Operating Area Temperature 1000 I 12 T T T T T 350 Tc Vcg 390V Rg 100 Tj 125 C 75 C 10 300 T T z W 2 2 9 T m z 23 2 amp o D 8 250 p d E g LL 400 L fmax 9 05 ta orry ta on s tsc Sc g g fuaxo Pp Pc Eon Eore e 6 200 O E Pe CONDUCTION DISSIPATION 5 E amp DUTYFACTOR 50 g o ui Rouc 0 49 CW SEE NOTES O a 150 3 o E x E o 9 ui E T 125 C Rg 30 L 200mH Vcg 390V aa io o 1 o o y ERE 8 9 10 11 12 13 14 15 16 Z Ice COLLECTOR TO EMITTER CURRENT A Veg GATE TO EMITTER VOLTAGE V Figure 3 Operating Frequency vs Collector to Figure 4 Short Circuit Withstand Time Emitter Current i i 18 5 DUTY CYCLE lt 0 5 Veg 10V Z DUTY CYCLE lt 0 5 Veg 15V E 16 PULSE DURATION 250ms E 16 PULSE DURATION 250ms 2 gt i 12 i 12 10 10 Ww Ww 2 e 2 s fid fid
4. 9 6 O 6 O T 150 C Ty 125 C 5 Ty 150 C T 125 C u 4 u 4 l 3 8 9 2 Ty 25 C o 2 Ty 25 C L o o 0 50 0 75 1 00 1 25 1 50 1 75 2 00 2 25 5 75 1 1 25 1 50 1 75 2 0 2 25 Vcg COLLECTOR TO EMITTER VOLTAGE V Vcg COLLECTOR TO EMITTER VOLTAGE V Figure 5 Collector to Emitter On State Voltage Figure 6 Collector to Emitter On State Voltage 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dOd dGcS9NO H9J 400 350 300 250 200 150 100 50 Eon2 TURN ON ENERGY LOSS uJ 0 Typical Performance Curves Continued Rg 100 L 500mH Vcg 390V Ty 125 C Voge 10V Vae 15V Ty 25 C Voz 10V Vgp 15V 0 5 10 15 20 25 Ice COLLECTOR TO EMITTER CURRENT A Figure 7 Turn On Energy Loss vs Collector to Emitter Current 16 T T Rg 100 L 5004H Vcg 390V T 25 C Ty 125 C Vag 10V Ty 25 C Ty 125 C Vg 15V ta on TURN ON DELAY TIME ns 90 5 10 15 20 25 Ice COLLECTOR TO EMITTER CURRENT A Figure 9 Turn On Delay Time vs Collector to Emitter Current T T Rg 100 L 500uH Vcg 390V 80 70 60 50 40 30 tacorr TURN OFF DELAY TIME ns 20 5 10 15 20 25 Ice COLLECTOR TO EMITTER CURRENT A Figure 11 Turn
5. to 10 of the on state time for a 50 duty factor Other definitions are possible tyorFy and tyony are defined in Figure 27 Device turn off delay can establish an additional frequency limiting condition for an application other than T jw ta oFF is important when controlling output ripple under a lightly loaded condition fax is defined by fmax2 Pp Pc Eorr Eonz The allowable dissipation Pp is defined by Pp Tym To Rgjc The sum of device switching and conduction losses must not exceed Pp A 50 duty factor was used Figure 3 and the conduction losses Pc are approximated by Pc Vcg x Ice 2 Eow and Eorr are defined in the switching waveforms shown in Figure 27 Eonp is the integral of the instantaneous power loss lcg x Vcg during turn on and Eo rr is the integral of the instantaneous power loss Ice x Vcg during turn off All tail losses are included in the calculation for Eorr i e the collector current equals zero lcg 0 ECCOSORBD is a Trademark of Emerson and Cumming Inc 92001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d dGcS9NO H9J TO 247 3 LEAD JEDEC STYLE TO 247 PLASTIC PACKAGE TERM 4 2V 4 e p BACK VIEW INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0 180 0 190 4 58 4 82 x b 0 046 0 051 1 17 1 29 2 3 by 0 060 0
6. 01 2 0 150 3 81 NOTES 1 These dimensions are within allowable dimensions of Rev 0 080 TYP 2 03 gt C of JEDEC TO 263AB outline dated 2 92 0 062 TYP 1 58 2 re 2 Lg and by dimensions established a minimum mounting surface for terminal 4 Solder finish uncontrolled in this area Dimension without solder MINIMUM PAD SIZE RECOMMENDED FOR 3 4 5 Add typically 0 002 inches 0 05mm for solder plating 6 T SURFACE MOUNTED APPLICATIONS L4 is the terminal length for soldering Position of lead to be measured 0 120 inches 3 05mm from bottom of dimension D 8 Controlling dimension Inch 9 Revision 10 dated 5 99 jum a e DIA HOLE USER DIRECTION OF FEED 20 mm a imm TO263AB A ion St 24mm TAPE AND REEL 16mm 40mm MIN ACCESS HOLE COVER TAPE 30 4mm 13mm O 330mm F 100mm GENERAL INFORMATION gt 24 4mm 1 800 PIECES PER REEL 2 ORDER IN MULTIPLES OF FULL REELS ONLY 3 MEETS EIA 481 REVISION A SPECIFICATIONS 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d dGcS9NO H9J TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks AC
7. 070 1 53 1 77 1 2 b2 0 095 0 105 2 42 2 66 1 2 c 0 020 0 026 0 51 0 66 1 2 3 D 0 800 0 820 20 32 20 82 E 0 605 0 625 15 37 15 87 e 0 219 TYP 5 56 TYP 4 ey 0 438 BSC 11 12 BSC 4 Jy 0 090 0 105 2 29 2 66 5 L 0 620 0 640 15 75 16 25 Ly 0 145 0 155 3 69 3 93 1 P 0 138 0 144 3 51 3 65 Q 0 210 0 220 5 34 5 58 OR 0 195 0 205 4 96 5 20 S 0 260 0 270 6 61 6 85 NOTES d o 2 Lead dimension without solder 3 4 Position of lead to be measured 0 250 inches 6 35mm from bottom of di Position of lead to be measured 0 100 inches 2 54mm from bottom of di Controlling dimension Inch Revision 1 dated 1 93 Lead dimension and finish uncontrolled in L4 Add typically 0 002 inches 0 05mm for solder coating mension D mension D 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d dG6S9NO H9J TO 220AB 3 LEAD JEDEC TO 220AB PLASTIC PACKAGE TERM 4 INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0 170 0 180 4 32 4 57 Ay 0 048 0 052 1 22 1 32 b 0 030 0 034 0 77 0 86 3 4 by 0 045 0 055 1 15 1 39 2 3 0 014 0 019 0 36 0 48 2 3 4 D 0 590 0 610 14 99 15 49 gt Di 0 160 4 06 E 0 395 0 410 10 04 10 41 E 0 030 0 76 e 0 100 TYP 2 54 TYP 5 e1 0 200 BSC 5 08 BSC 5 Hy 0 235 0 255 5 97 6 47 Jy 0 10
8. Off Delay Time vs Collector to Emitter Current Eorr TURN OFF ENERGY LOSS uJ Figure 8 Turn Off Energy Loss vs Collector to ti RISE TIME ns Figure 10 Turn On Rise Time vs Collector to ty FALL TIME ns 600 500 400 300 200 100 30 25 20 120 T T Rg 100 L 500uH Vcg 390V 100 Ty 125 C Vae 10V OR 15V 80 60 10V OR 15V 40 0 5 10 15 20 25 Figure 12 Fall Time vs Collector to Emitter Rg 100 L 500mH Vcg 390V Ty 125 C Vog 10V Vee 15V Ty 25 C Vae 10V Vae 15V 0 5 10 15 20 25 Ice COLLECTOR TO EMITTER CURRENT A Emitter Current Rg 100 L 500mH Vcg 390V Ty 125 C Vae 15V Vee 10V T 25 C Voe 10V Vgg 15V 0 5 10 15 20 25 Ice COLLECTOR TO EMITTER CURRENT A Emitter Current Ice COLLECTOR TO EMITTER CURRENT A Current 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d GCSINOEHDSA Typical Performance Curves Continued 175 DUTY CYCLE 0 5 Vcg 10V 150 PULBE DURATION 250us Ice COLLECTOR TO EMITTER CURRENT A Vae GATE TO EMITTER VOLTAGE V Figure 13 Transfer Characteristic
9. 0 0 110 2 54 2 79 6 L 0 530 0 550 13 47 13 97 gt Ly 0 130 0 150 3 31 3 81 2 P 0 149 0 153 3 79 3 88 Q 0 102 0 112 2 60 2 84 NOTES 1 These dimensions are within allowable dimensions of Rev J of JEDEC TO 220AB outline dated 3 24 87 2 Lead dimension and finish uncontrolled in L4 3 Lead dimension without solder 4 Add typically 0 002 inches 0 05mm for solder coating 5 Position of lead to be measured 0 250 inches 6 35mm from bottom of dimen 6 Psion of lead to be measured 0 100 inches 2 54mm from bottom of dimen sion D 7 Controlling dimension Inch 8 Revision 2 dated 7 97 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 acS9N0 dO9d dGcS9NO H9J ITO 263AB SURFACE MOUNT JEDEC TO 263AB PLASTIC PACKAGE C E EM INCHES MILLIMETERS H SYMBOL MIN MAX MIN MAX NOTES A TERM 4 A 0 170 0 180 4 32 4 57 Ay 0 048 0 052 1 22 1 32 4 5 b 0 030 0 034 0 77 0 86 4 5 b4 0 045 0 055 1 15 1 39 4 5 Do 0 310 z 7 88 T 2 Ir hi c 0 018 0 022 0 46 0 55 4 5 D 0 405 0 425 10 29 10 79 gt e zd E 0 395 0 405 10 04 10 28 a e 0 100 TYP 2 54 TYP 7 aiaa ey 0 200 BSC 5 08 BSC 7 m H4 0 045 0 055 1 15 1 39 mm Jy 0 095 0 105 2 42 2 66 z 8 89 L 0 175 0 195 4 45 4 95 His L 0 090 0 110 229 2 79 4 6 Lo 0 050 0 070 1 27 1 77 3 Kj Hl L3 0 315 8
10. 1 ns m Current Rise Time lcg 12A 17 ns torri Current Turn Off Delay Time uer Hid 73 100 ns m Current Fall Time RE Dor 90 100 ns EoN1 Turn On Energy Note 2 p 500uH 55 uJ Eon2 Turn On Energy Note 2 Test Circuit Figure 26 2 160 200 uJ Eorr Turn Off Energy Note 3 Z 250 350 uJ tir Diode Reverse Recovery Time lec 12A dlec dt 200A us 35 46 ns lec 1A dlgc dt 200A us 25 32 ns Thermal Characteristics Diode 2 0 C W NOTE 2 Values for two Turn On loss conditions are shown for the convenience of the circuit designer Epy is the turn on loss of the IGBT only Eono is the turn on loss when a typical diode is used in the test circuit and the diode is at the same Tj as the IGBT The diode type is specified in figure 26 3 Turn Off Energy Loss Eorr is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero lcg 0A All devices were tested per JEDEC Standard No 24 1 Method for Measurement of Power Device Turn Off Switching Loss This test method produc es the true total Turn Off Energy Loss 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d dcS9NO H9J Typical Performance Curves 50 T 70 a Lr Ty 150 C Rg
11. Ex FAST OPTOPLANAR STAR POWER Bottomless FASTr PACMAN Stealth CoolFET FRFET POP SuperSOT 3 CROSSVOLT GlobalOptoisolator Power247 SuperSOT 6 DenseTrench GTO PowerTrench SuperSOT 8 DOME HiSeC QFET SyncFET EcoSPARK ISOPLANAR Qs TinyLogic E CMOS LittleFET QT Optpelectronics TruTranslation Ensigna MicroFET Quiet Series UHC FACT MICROWIRE SILENT SWITCHER UltraFET9 FACT Quiet Series OPTOLOGIC SMART START VCX STAR POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life or c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to resul
12. d Transient Thermal Impedance Junction to Case Test Circuit and Waveforms FGH30N6S2D DIODE TA49390 FGH30N6S2D Vpp 390V Figure 26 Inductive Switching Test Circuit 90 i laor zr ty th a gt ta on Figure 27 Switching Test Waveforms 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d GCSI9NOEHDSA Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gate insulation damage by the electrostatic discharge of energy through the devices When handling these devices care should be exercised to assure that the static charge built in the handler s body capacitance is not discharged through the device With proper handling and application procedures however IGBTs are currently being extensively used in production by numerous equipment manufacturers in military industrial and consumer applications with virtually no damage problems due to electrostatic discharge IGBTs can be handled safely if the following basic precautions are taken 1 Prior to assembly into a circuit all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conduc tive material such as ECCOSORBD LD26 or equivalent 2 When devices are removed by hand from their carriers the hand being used should be grounded by any suitable means for exa
13. ee er ee FAIRCHILD SEMICONDUCTOR July 2001 FGH30N6S2D FGP30N6S2D FGB30N6S2D 600V SMPS II Series N Channel IGBT with Anti Parallel Stealth Diode General Description The FGH30N6S2D FGP30N6S2D and FGB30N6S2D are Low Gate Charge Low Plateau Voltage SMPS II IGBTs combining the fast switching speed of the SMPS IGBTs along with lower gate charge and plateau voltage and ava lanche capability UIS These LGC devices shorten delay times and reduce the power requirement of the gate drive These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss fast switching times and UIS capability are essential SMPS II LGC devices have been specially designed for Power Factor Correction PFC circuits Full bridge topologies Half bridge topologies Push Pull circuits Uninterruptible power supplies Zero voltage and zero current switching circuits IGBT formerly Developmental Type TA49336 Diode formerly Developmental Type TA49390 Package Features 100kHz Operation at 390V 14A 200kHZ Operation at 390V 9A 600V Switching SOA Capability 90ns at TJ 125 C 23nC at Vege 15V Low Plateau Voltage 6 5V Typical UIS Rated Typical Fall Time Low Gate Charge Low Conduction Loss Symbol JEDEC STYLE TO 220AB JEDEC STYLE TO 263AB Device Maximum Ratings To 25 C unless otherwise noted Parameter Collector to Emitter Breakdown Voltage
14. er Test Conditions Min Typ Max Units Off State Characteristics BVces Collector to Emitter Breakdown Voltage lc 250uA Vee 0 600 V Ices Collector to Emitter Leakage Current Vcg 600V Ty 25 C E 250 uA Ty 125 C s 2 mA IGES Gate to Emitter Leakage Current Vee 20V 250 nA On State Characteristics Vcesat Collector to Emitter Saturation Voltage lc 12A Ty 25 C 1 95 2 5 V Vee 15V Ty 125 C 1 8 2 0 V Vec Diode Forward Voltage lec 12A 2 1 2 5 V Dynamic Characteristics Qgon Gate Charge lc 12A Vee 15V 23 29 nC Vcg 300V Voe 20V 26 33 nC Vae tH Gate to Emitter Threshold Voltage lc 250uA Voge 600V 3 5 4 3 5 0 V Veep Gate to Emitter Plateau Voltage lc 12A Vcg 300V 6 5 8 0 V Switching Characteristics SSOA Switching SOA Ty 150 C Rg 100 Va 60 A 15V L 100HH Vcg 600V ta ON I Current Turn On Delay Time IGBT and Diode at Ty 25 C 6 ns m Current Rise Time lcg 212A 10 ns taorrj Current Turn Off Delay Time Voce 390V 40 T ns t Current Fall Time VESIN 53 ns fl Rg 102 Eont Turn On Energy Note 2 L 500uH 55 uJ Eon2 _ Turn On Energy Note 2 Test Circuit Figure 26 110 pJ Eorr Turn Off Energy Note 3 100 150 uJ ta oN I Current Turn On Delay Time IGBT and Diode at Ty 125 C 1
15. mple with a metallic wristband 3 Tips of soldering irons should be grounded 4 Devices should never be inserted into or removed from circuits with power on 5 Gate Voltage Rating Never exceed the gate voltage rating of Vgem Exceeding the rated Vac can result in permanent damage to the oxide layer in the gate region 6 Gate Termination The gates of these devices are essentially capacitors Circuits that leave the gate open circuited or floating should be avoided These conditions can result in turn on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup 7 Gate Protection These devices do not have an internal monolithic Zener diode from gate to emitter If gate protection is required an external Zener is recommended Operating Frequency Information Operating frequency information for a typical device Figure 3 is presented as a guide for estimating device performance for a specific application Other typical frequency vs collector current Icg plots are possible using the information shown for a typical unit in Figures 5 6 7 8 9 and 11 The operating frequency plot Figure 3 of a typical device shows fuAx1 OF fmax2 whichever is smaller at each point The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature fMAX1 is defined by fMAx1 0 05 tatogryr ta on i Deadtime the denominator has been arbitrarily held
16. o Emitter Voltage 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 dcS9N0 dO9d d6S9NO H9J Typical Performance Curves Continued DUTY CYCLE lt 0 5 PULSE DURATION 2501s M o o lec FORWARD CURRENT A S ES 0 0 5 10 15 20 25 3 0 Vec FORWARD VOLTAGE V Figure 19 Diode Forward Current vs Forward Voltage Drop 175 T lec 12A Vcg 390V 125 C tp trr REVERSE RECOVERY TIMES ns 75 25 C tp 50 125 C ta 25 25 C ta 0 200 300 400 500 600 700 800 900 1000 dlgc dt RATE OF CHANGE OF CURRENT A ms Figure 21 Recovery Times vs Rate of Change of 200 300 400 500 600 700 800 900 1000 Current 7 0 T T T 5 Vcg 390V Ty 125 C im o 6 5 o9 Q 60 z F 55 lu a S 50 gt 45 o B 40 Ww Q 35 Ww U 3 0 Oo dlgc dt CURRENT RATE OF CHANGE A us Figure 23 Reverse Recovery Softness Factor vs Rate of Change of Current 200 dlgc dt 200A us Vcg 390V 125 C tyr 175 125 C ty 25 C try 25 C tp trr REVERSE RECOVERY TIMES ns Ss e 50 125 C t 0S 25 C ta 0 2 4 6 8 10 12 lec FORWARD CURRENT A Figure 20 Recovery Times vs For
17. t in significant injury to the user PRODUCT STATUS DEFINITIONS Definition of Terms Advance Information Formative or This datasheet contains the design specifications for In Design product development Specifications may change in any manner without notice 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only Rev H3 2001 Fairchild Semiconductor Corporation
18. ward Current 300 T 6 Vcg 390V 2 ce 125 C Ing 12A u 250 O lt 5 20 gt amp ae 20 1259C lgg 6A o o A u 25 C lec 12A u 100 7 i u 25 C lec 6A 5 4 G o 200 300 400 500 600 700 800 900 1000 dlgc dt RATE OF CHANGE OF CURRENT A us Figure 22 Stored Charge vs Rate of Change of Current 10 Vcg 390V Ty 125 C 200 300 400 500 600 700 800 900 1000 dlgc dt CURRENT RATE OF CHANGE A us IrRm MAX REVERSE RECOVERY CURRENT A Figure 24 Maximum Reverse Recovery Current vs Rate of Change of Current 2001 Fairchild Semiconductor Corporation FGH30N6S2D FGP30N6S2D FGB30NS2D Rev A QcS9N0 894 acS9N0 dO9d dcS9NO H9J Typical Performance Curves continued Ww Q 10 g 10 iH 0 50 tr EI i 0 20 c Y t Ww E 0 10 Pp Q 10 u 0 05 ee qom E m DUTY FACTOR D ty ty j PEAK Ty Pp X Zguc X Rayc Tc e 0 0 z SINGLE PULSE S 2 LL LILLLIL N 10 105 104 103 10 10 10 10 t4 RECTANGULAR PULSE DURATION s Figure 25 IGBT Normalize
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FAIRCHILD SEMICONDUCTOR FGH30N6S2D FGP30N6S2D FGB30N6S2D handbook