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FAIRCHILD FQPF14N30 MOSFET Manual

1. WARS RAGA BIER HARSH BAERS HEEN FAIRCHILD April 2000 QFET Er SEMICONDUCTOR w FQPF14N30 FQPF14N30 300V N Channel MOSFET General Description Features These N Channel enhancement mode power field effect 8 5A 300V Rps on 0 290 Q Vas 10 V transistors are produced using Fairchild s proprietary Low gate charge typical 30 nC planar stripe DMOS technology Low Crss typical 23 pF This advanced technology has been especially tailored to Fast switching minimize on state resistance provide superior switching 100 avalanche tested performance and withstand high energy pulse in the Improved dv dt capability avalanche and commutation mode These devices are well suited for high efficiency switching DC DC converters switch mode power supply TO 220F FQPF Series Absol ute Maximu m Ratings Tc 25 C unless otherwise noted Symbol Parameter FQPF14N30 Voss Drain Source Voltage 300 Ip Drain Current Continuous Tc 25 C 8 5 Continuous Tc 100 C 5 4 IDM Drain Current Pulsed 34 Gate Source Voltage 30 Single Pulsed Avalanche Energy 600 Avalanche Current 8 5 Repetitive Avalanche Energy 5 0 Peak Diode Recovery dv dt 4 5 Power Dissipation Tc 25 C 50 Derate above 25 C 0 4 Operating and Storage Temperature Range 55 to 150 Maximum lead temperature for soldering purposes 1 8 from case for 5 seconds
2. 09r X Notes 1 V5 0V 2 1 250pA 08 i j i i i 100 50 0 50 100 150 200 T Junction Temperature C Figure 7 Breakdown Voltage Variation vs Temperature 10 Operation in This Area i is Limited by R DS 1 T 25 C 2 T 150 3 Single Pulse 10 L 10 10 Vps Drain Source Voltage V Figure 9 Maximum Safe Operating Area _8 p zo 38 E T a lt g 5 a 3 0 25r 20r 15r 10 0 5 10 Figure 8 On Resistance Variation 50 0 50 100 200 T Junction Temperature C vs Temperature 25 Figure 10 Maximum Drain Current 50 75 T Case Temperature C 100 125 150 vs Case Temperature Z A0 Thermal Response Notes Z 0 2 5 C W Max 1 L 0 05 2 Duty Factor D t t 10 Ez 3 Tu Te Pou Z seo GEN E0077 TL Pou E 7 LE 0 01 i H i E Lu t de L H D lt ta single pulse 107 10 10 10 10 107 10 10 t Square Wave Pulse Duration sec Figure 11 Transient Thermal Response Curve 2000 Fairchild Semiconductor International Rev A April 2000 0 NTt I HdOJ FQPF14N30 Gate Charge Test Circuit amp Waveform Charge Resistive Switching Test Circuit amp Waveforms 90 10 GS den Te hs ton gt Unclamped Inductive Switching Test Circuit amp Waveforms DER BV
3. 1 On Region Characteristics 1 0 0 8 8 C 3 V 10V ae 06 L 26 Pg Y Egat B 02 X Note T 25 C 00 i i i i i i i i i Drain Current A Figure 3 On Resistance Variation vs Drain Current and Gate Voltage 2100 C C C shorted C C 1800 C 1500 5 1200 g Ss 900 5 3 Notes 3 600 1 V 0V 2 f 1MHz 300 0 10 10 10 V Drain Source Voltage V Figure 5 Capacitance Characteristics Drain Current A l k Reverse Drain Current A Veg Gate Source Voltage V 10 150 C 10 25 C 55 C Notes 1 Vy 50V 2 2504 s Pulse Test 10 i L L 2 4 6 8 10 Veg Gate Source Voltage V Figure 2 Transfer Characteristics 10 10 150 C 250 3 Notes 1 Vs 0V 2 2504 s Pulse Test 40 i i i i i 0 2 0 4 0 6 0 8 1 0 1 2 14 1 6 1 8 V Source Drain Voltage V Figure 4 Body Diode Forward Voltage Variation vs Source Current and Temperature 12 ng 60V YN seem gt gt gt EEE Vps 240V 8 E 6 4 2 X Note l 144A 0 i i i i i 0 5 10 15 20 25 30 Q Total Gate Charge nC Figure 6 Gate Charge Characteristics 2000 Fairchild Semiconductor International Rev A April 2000 l Drain Current A Typical Characteristics BV ogg Normalized Drain Source Breakdown Voltage Continued 12 1 1 F 1 0
4. 300 Thermal Characteristics Symbol Parameter Roc Thermal Resistance Junction to Case Raya Thermal Resistance Junction to Ambient 2000 Fairchild Semiconductor International Rev A April 2000 Electrical Characte ristics Tc 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves 0 V lp 250 pA 300 V ABVpss Breakdown Voltage Temperature lp 250 LA Ref d to 25 C o I AT Coefficient D ps 9 34 ve Vps 300 V Veg 0 V at 1 A DSS Zero Gate Voltage Drain Current 240 V 125 C 10 a lesse Gate Body Leakage Current Forward Ves 30 V Vps 0 V 100 nA lassr Gate Body Leakage Current Reverse Ves 30 V Vps 0 V 100 nA On Characteristics VGs th Gate Threshold Voltage Vps Vos lp 250 uA 3 0 m 5 0 V Rps on Static Drain Source Ves 10 V Ip 4 25 A i i On Resistance es H 9 29 0 29 Q 9rs Forward Transconductance Vps 50 V Ip 2 4 25A Note4 7 9 Dynamic Characteristics Ciss Input Capacitance Vps 25 V Veg 0 V 1050 1360 pF Coss Output Capacitance f 1 0 MHz 200 260 pF Criss Reverse Transfer Capacitance 23 30 pF Switching Characteristics t s i t d on Turn On Delay Time Vpp 1
5. 50 V Ip 14 4 A 22 55 ns t Turn On Rise Time Rg 252 145 300 ns ta off Turn Off Delay Time 45 100 ns tr Turn Off Fall Time Note 4 5 T Ze 70 150 ns Qg Total Gate Charge Vps 240 V lp 14 4 A 30 40 nC Qgs Gate Source Charge Ves 10 V 75 N nC Qga Gate Drain Charge Note 4 5 13 nC Drain Source Diode Characteristics and Maximum Ratings Is Maximum Continuous Drain Source Diode Forward Current 8 5 A lsm Maximum Pulsed Drain Source Diode Forward Current 34 A Vsp Drain Source Diode Forward Voltage Ves 0 V lg 8 5 A 1 5 V tr Reverse Recovery Time Ves 0 V Ig 14 4 A 200 ns Qr Reverse Recovery Charge dlp dt 100 A us MOEN Tract 1 5 uC Notes 1 Repetitive Rating Pulse width limited by maximum junction temperature 2 L 13 8mH las 8 5A Vpp 50V Rg 25 Q Starting Ty 25 C 3 Isp lt 14 4A di dt lt 200A us Vpp lt BVpss Starting Tj 25 C 4 Pulse Test Pulse width lt 300us Duty cycle lt 2 5 Essentially independent of operating temperature 2000 Fairchild Semic onductor International Rev A April 2000 0 NTt 1 HdOJ FQPF14N30 Typical Characteristics Vg 317 To 150V T 10 0V 80V GSE 2 70V ki 65V 7 T rir i 60V F Li Bottom 55V v Zi 2 Td z V t i s 8 10 a lt i Notes 1 2504 s Pulse Test 2 7 250 10 10 10 Vps Drain Source Voltage V Figure
6. TinyLogic CROSSVOLT POP UHC E2CMOS PowerTrench VOX M FACT QFET FACT Quiet Series QSTM FASTO Quiet Series FASTr SuperSOT 3 GTO SuperSOT 6 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL As used herein result in significant injury to the user 1 Life support devices or systems are devices or systems 2 A critical component is any component of a life support which a are intended for surgical implant into the body device or system whose failure to perform can be or b support or sustain life or c whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system or to affect its safety or effectiveness provided in the labeling can be reasonably expected to PRODUCT STATUS DEFINITIONS Definition of Terms Advance Information Formative or In This datasheet contains the design sp
7. ecifications for Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only 2000 Fairchild Semiconductor International Rev A January 2000
8. pss 572 75 BV bss Vp BVpss las Ip t Vop Vos t 2000 Fairchild Semiconductor International Rev A April 2000 Peak Diode Recovery dv dt Test Circuit amp Waveforms Same Type as DUT e dv dt controlled by Re Isp controlled by pulse period Gate Pulse Width Ves En Gate Pulse Period Driver lzm Body Diode Forward Current Isp DUT di dt lam Body Diode Reverse Current Vos DUT Body Diode Recovery dv dt Body Diode Forward Voltage Drop OENtL4doy 2000 Fairchild Semiconductor International Rev A April 2000 FQPF14N30 Package Dimensions TO 220F 10 16 020 93 18 0 10 2 54 0 20 3 7 00 0 70 ep 8 m gt gt eo T I 8 l 8 o 8 e H N amp D E 1 00x45 5 o LO MAX1 47 3 fi LO 0 80 0 10 j 2 O 2 1 0 35 0 10 0 10 4 0 507505 _ 2 76 0 20 2 54TYP 2 54TYP 2 54 0 20 2 54 0 20 S T 9 40 0 20 p N 1 2000 Fairchild Semiconductor International Rev A April 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx HiSeC SuperSOT 8 Bottomless ISOPLANAR SyncFET CoolFET MICROWIRE

FAIRCHILD FQPF14N30 MOSFET Manual

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