maxim MAX741 Manual
Contents
1. 16 18 0 02 04 06 08 10 12 14 16 18 200us div OUTPUT CURRENT A OUTPUT CURRENT A PANAPA AAA A aa MAX741 4 Pin Programmed Low Voltage Current Mode SMPS Controller Typical Operating Characteristics continued MAX741D STEP DOWN MAX741N INVERTING NO LOAD SUPPLY CURRENT vs MAX741N INVERTING NO LOAD SUPPLY CURRENT vs S SUPPLY VOLTAGE LOAD CURRENT vs SUPPLY VOLTAGE SUPPLY VOLTAGE Vout 5V OR 3V Vour 5V z CIRCUIT OF FIGURE 9 O lt CRUT OF moure a 38 S A HT ea ec S 35 3 3 gt E Esa 2 E y T 77 S 2 3 32 G S a 2 28 o i f 7 8 9 10 1 12 13 14 15 16 17 45 65 85 105 125 145 45 65 85 105 125 145 SUPPLY VOLTAGE V SUPPLY VOLTAGE V SUPPLY VOLTAGE V eses BOOTSTRAPPED MOSFET DRIVE DRV Vout NON BOOTSTRAPPED MOSFET DRIVE DRV GND MAX741N INVERTING EFFICIENCY vs LOAD CURRENT 90 Vout 5V CIRCUIT OF FIGURE 11 EFFICIENCY 0 02 04 06 08 10 12 14 16 LOAD CURRENT A 4 124 MAXIMA Pin Programmed Low Voltage Current Mode SMPS Controller Pin Description FUNCTION O OoOO aes dl SLOPE Sets slope compensation for AC stability Normally a 50kQ to 1M2 resistor connected to ground Required for con L tinuous conduction mode operation o2. a smaller output capacitor Output Voltage Selection The output voltage can be adjusted by an external resis tor divider network or it can be set to a fixed level 5V 12V 15V 5V 12V or 15V by pin programming the MAX741 as shown in Table 2 When using an external resistor divider the output voltage is determined by the ratio of the resistors in the divider and the internal 1 23V reference See the Application Circuits section for more information on output voltage adjustment Table 2 Output Voltage OUTPUT Bit lo DECO a oe 4 127 LFE X YW B MAX741 Pin Programmed Low Voltage Current Mode SMPS Controller 3 Level Input Pins Pins P Z N FREQ and DUTY have three levels Low GND to 0 3V middle VREF 0 3V and high V 0 3V to V Obtain middle level operation by typing the appropriate 3 level input to VREF Figure 8 except pin 20 FREQ which should be held at 1 4V This 1 4V can be generated with two forward biased diodes tied to ground and pulled up with 100kQ to V This resis tance value is suitable for V voltages in the 5V to 15V range For operation with V as low as 2 7V use a 60kQ resistor Siope Compensation Slope compensation is used to eliminate subharmonic ascillation in the power output stage Compensation is controlled by resistor RSLOPE connected from SLOPE to ground Current mode regulators tend to oscillate in a local loop in the output sta
3. is equal to the declining inductor current slope which is given by VIN VOUT L 15V 5V 304H 0 33A us The voltage slope SVS at the current sense amplifier s output is equal to SVS m RSENSE 0 33A us 0 10 0 033V us The slope resistor RSLOPE is thus _ RSLOPE VREF 20 10pF m RSENSE 1 23V 20 10pF 0 33A us 0 1Q 186kQ AC Compensation The stability of the outer voltage feedback loop can be evaluated using load iransient response tests Sig nificant overshoot or ringing after a step from zero to full load indicates potential stability problems The outer loop can be compensated with an RC network around the error amplifier Typicaliy a pole zero cancellation scheme is used to eliminate excess phase shift due to the zero caused by the output filter capacitor s equivalent series resistance ESR The following example shows the compensation calculations fora 1000pF 0 05 ESR output capacitor CF The calculations are the same regardless of the circuit type step up step down or inverting The zero caused by the output capacitor s ESR occurs at a frequency fz given by fz 1 2 m ESR CF 1 6 284 0 0502 10004F 3 18kHz A cancellation pole is required at 3 18kHz This compen sation pole s frequency fp is given by fp 1 2 n REAIN C4 where REAIN is the impedance of the error amplifier input pin EAIN and C4 is the value of the compensation
4. necessary for various modes including Figure 1 s three basic circuits The Table 1 Output Stage Programming _Current Mode SMPS Controller MAX741 can also accomodate specialized applications needing complementary or push pull power switches Table 1 describes the pin programming used to obtain complementary and push pull drive and Figure 2 shows the resulting drive waveforms at OUTA and OUTB Operating Principle The controller consists of two feedback loops an inner current loop that monitors the switch current via the current sense resistor and amplifier and an outer volt age loop that monitors the output voltage via the error amplifier Figure 1 The inner loop performs cycle by cycle current limiting truncating the on time of the power transistor when the switch current reaches a threshold predetermined by the outer loop For example a sagging output voltage produces an error signal that raises the threshold allowing the circuit to store and transfer more energy during each cycle PROGRAM MODES PROGRAM PINS OUTA OUTB MODE e No N OUTA OUTB push pull 50 N N OUTA OUTB push pull P P OUTA OUTB push pull V GND VREF P S P OUTA OUTB push pull V V GND GND GND Shut down using N channel push pull V GND GND V Ve Shut down using P channel push pull VREF V VREF P OUTA OUTB complementary 50 VREF GND V OUTA
5. 19 0097 Rev 1 8 93 N EN General Description The MAX741 is a highly versatile switch mode power supply SMPS controller IC that operates from an input supply as low as 2 7V and typically starts up from 1 8V The MAX741 can be pin programmed into hundreds of different SMPS configurations The internal blocks refer ence error amplifier etc are interconnected via analog switches so they can be reconfigured into different architectures by applying trilevel data V VREF GND to certain logic input pins This pin programming feature lends tremendous application flexibility For example the output stage can drive N channel or P channel MOSFETs or bipolar transistors in single ended complementary or push pull modes The error amplifier can accom modate positive or negative feedback voltages The out put voltage can be adjusted with external resistors or it can be set at any one of six preset values by switching in the appropriate laser trimmed resistor divider net work For mainstream applications step up step down and in verting basic MAX741 circuits can be designed directly into the system with little effort using the tested circuit layouts found in the Application Circuits section At the same time the MAX741 provides the power supply desig ner the right inputs and controls to implement nearly any SMPS function Applications Battery Operated Equipment Distributed Power Systems isolated Off Line Suppl
6. OUTB complementary 50 VREF GND VREF OUTA OUTB complementary 50 VREF X GND GND V Shut down non push pull mode GND V V S N ae OUTA OUTB complementary j 85 GND V VREF ee P OUTA OUTB complementary 95 GND GND V N OUTA OUTB complementary 85 _ GND GND OUTA OUTB complementary 95 GND X GND GND V Shut down non push pull mode N Drives N Channel FETs On V P Drives P Channel FETs On GND X Don t Care 4 126 MAXKIAA Pin Programmed Low Voltage Curent Mods ids Controller ib INVERTING CONFIGURATION MAX741N 1c STEP DOWN CONFIGURATION MAX741D Figure 1 Basic Configurations Continuous Discontinuous Conduction Modes In continuous conduction mode CCM the inductor current never decays to zero In discontinuous con duction mode DCM or burst mode the inductor cur rent slope is steep enough so it decays to zero before the end of the transistor off time The MAX741 operates in either CCM or DCM by the selection of higher or lower MAAXKILAN COMPLEMENTARY MODE POL V DUTY GND OUTA L PUSH PULL MODE POL V DUTY Vs Figure 2 Push Pull and Complementary Waveforms inductor values respectively CCM allows the MAX741 to deliver maximum load currents and is normally less noisy than DCM However DCM does not provide a continuous feedback path through the inductor and hence is easier to stabilize it does not require slope compensation and allows for
7. Sau C INDUCTOR CURRENT 1A div C INDUCTOR CURRENT AOM CIRCUIT OF T CIRCUIT OF FIGURE 7 4 122 MA AXLAN Pin Programmed Low Voltage Current Mode SMPS Controller Typical Operating Characteristics continued MAX741U MAX741 LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE gt w L TENENS N A A h B B i c A 1A LOAD HIGH 200mA LOAD Low i A Vin 4V HIGH LYN 3V LOW B OUTPUT VOLTAGE AC 100mv div B OUTPUT VOLTAGE AC 100mV div C INDUCTOR CURRENT 1A div INDUCTOR CURRENT 1A diy CIRCUIT OF FIGURE 7 CIRCUIT OF FIGURE 7 MAX741U STEP UP MAX741D STEP DOWN MAX741D STEP DOWN EFFICIENCY vs LOAD TRANSIENT RESPOSNE LOAD TRANSIENT RESPOSNE LOAD CURRENT Vour 3 3 Vour 54 95 Vout 5V CIRCUIT OF FIGURE 7 Vout 20mV div 90 VOUT eo 20mV div C 4 Vin 7V i CIRCUIT OF FIGURE 9 gt E 8 ts ee Ble a N 2 to amp 80 500mA div ILOAD ae S00mA div de ORGUTOF FIGURES 0 A o as AE 0 02 04 06 08 10 12 14 16 NS A LOAD CURRENT A 100ps div 200j15 div MAX741B STEP DOWN MAX741D STEP DOWN MAX741D STEP DOWN EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT LINE TRANSIENTRESPOSNE Vour 5V Vour 3 3V Vin 15 Vout 5V CIRCIUT OF Fi EFFICIENCY VOUT 3 3V CIRCUIT OF FIGURE 9 lav ee A 0 0 02 04 06 08 10 12 14
8. V A d 9 85 9 50 l _ OUTA or OUTB Ta 25 C loH 50mA A 4 10 4 35 Output Voltage High t A V JOu 50mA DRV 10V E _ 4 50 4 70 i Output Rise or Fall Time OUTA or OUTB Ta 25 C CLOAD in Note 1 50 100 T UVLO Threshold Adjustable mode measured at UVLO Note 1 eee ee Gare v UVLO Start Up Threshold J UVLO 0V ss 3 0 4 0 4 4 v ELECTRICAL CHARACTERISTICS MAX741U Step Up Circuit of Figure 1a V 5V ILOAD OMA TA TMIN to TMAX unless otherwise noted pa PARAMETER CONDITIONS MIN Fixed modes referred to VOUT V 3 3V VSEL V 4 80 Note 2 l G ETLE Output Voltage Initial Accuracy cc VREF TA 425 C 11 52 VSEL OV TA 25 C l 14 40 T Adjustable mode referred to error ampiifier input 1 18 Supply Current _ VSEL V 3 3V Note 3 i Saan A ELECTRICAL CHARACTERISTICS MAX741N Inverting Circuit of Figure 1b V 5V ILOAD OmA TA TMIN to TMAX unless otherwise noted n PARAMETER l CONDITIONS co MIN 7 modes referred to Vout VSEL V Note 2 T 5 20 Output Voltage Initial Accuracy THE T ee Re 21e VSEL OV Ta 25 C om l 15 60 Adjustable mode Ri 50kQ R2 50kQ 129 Supply Current i P VSEL V Note 3 K MAARI l enar sash cet gt 4121 MAX741 Pin Programmed Low Voltage Current Mode SMPS Controller ELECTRICAL CHARACTERISTICS MAX741D S
9. capacitor in Figures 7 and 9 From Table 2 with VSEL and P Z N connected to V EAIN has a nominal im pedance of 16 5kQ so CC 1 2 x REAIN fp 1 2 3 142 16 5kQ 3 18kHz 3nF MAA Additional outer loop compensation may be required in step up circuits Capacitor C5 in Figure 7 provides the extra compensation needed in this application The actual compensation capacitor values required depends on the printed circuit layout and the capacitor type used These values may therefore vary significantly from those calculated Prototyping is essential Current Sense Amplifier The current sense amplifier Figure 4 employs a switched capacitor design to achieve a common mode voltage range that exceeds both supply rails by 0 3V The current sense amplifier has a gain of 10 with a 0 6V 200mV output offset For clarity Figure 4 s block diagram of the soft start and current limit sections omits the slope compensation circuit and summing amplifier shown in Figure 3 Soft Start SS and Current Limiting The switch transistor s maximum peak current limit is determined by the voltage on SS An external RC network on SS results in a gradual increase in peak current on power up minimizing the possibility of overloading the source The SS voliage is amplified by a factor of 3 5 and this voltage clamps the maximum swing of the error amplifier a transconductance amplifier as it is presented to the PWM comparator For examp
10. e ape ee 10 EAO Error Amplifier Output 73 pore fee ae Jansie Ln EAIN Error AmpliferImput o A Duty Cycle Adjust when DUTY V push pull mode 50 max guy cycle A 12 DUTY DUTY VRE complementary 50 max duty cycle e bre DUTY GND and FREQ V complementary 85 max duty cycle DUTY GND and FREQ VREF complementary mode 95 max duty cycle fen a ays Selects current sense amplifier output polarity and controls OUTA and OUTB polarity when in push pull mode Lata yd towels bee 2 R C TRS 13 POL V N Channel CS inputs sense around aye GND P Channel CS inputs sense around V ee ee ee R e z 14 CSB arront sense Amp B input connects to signal side of current sense resistor Signal passes through a 1st order LP filter ALA E ea Se Va Mec ihe cea ree A ee hg Oe E ete z 15 csa Current sense amp A input Connect fo V in buck and Peg creus Connect to GND in step up circuits CSA should be bypassed with 0 1pF located close to CSA and GND when in the buck or inverting power supply modes Negative Drive Bootstrap Supply Voltage Input accepts a DC bias voltage as the negative supply rail for the drivers 16 DRV at OUTA and OUTB useful when driving P channel MOSFETs from low supply voltages Observe Absolute Maximum Ratings carefully CAS ESA a l T 47 OUTB Output B MOSFET Driver drives P Channel or PNP transistors in complementary modes See Table 1 L When V gt 14V use 5 60 in series between OUTB and gate of powe
11. er Supply Voltage DRV to V 0 3V 17V Feedback Voltage VOUT to GND eee 50V Auxiliary Input Voltages SLOPE SS VSEL P Z N g EAIN DUTY POL CSA CSB FREQ to GND A E Cats 0 3V to V 0 3V Peak Output Current louTA Or lOUTB 1 0A Reference Current IVREF 0 0 0 0 ccc eee eee 2 5mA Current Mode SMPS Controller Continuous Power Dissipation Ta 70 C Plastic DIP derate 11 11mW C above 70 C 889mw SSOP derate 8 00MW C above 70 C 640mW CERDIP derate 11 11mW C above 70 C 889mW Operating Temperature Ranges MAXTAT C gt ita ala UC to 70 C MAX 74 FB arar aro 40 C to 85 C MAX741_ MP cee eee ees 55 C to 125 C Storage Temperature Range 65 C to 160 C Lead Temperature soldering 10sec 300 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS V 5V TA TMIN fo Tmax unless otherwise noted PARAMETER Supply Voltage Range CONDITIONS MIN TYP MAX Stari Up Supply Voltage TA 25 C UVLO V Shutdown Mode Sup
12. ge because the inductor current waveform can bounce between zero and the maximum current limit threshold This instability is cor rected by a slope compensation scheme that adds a ramp signal to the current sense amplifier output Slope compensation is required when the switch duty cycle exceeds 50 When this is the case varying degrees of slope compensation eliminate inner loop in stability Excessive slope compensation makes the loop behave like a traditional voltage mode triangle wave PWM where the AC stability can also suffer due to the extra pole in the loop response Slope compensation is not required when operating in DCM inner loop instability manifests itself as staircasing of the inductor current where the current waveform ramps up in steps until it hits the maximum current limit threshold set by the voltage at SS and then declines This effect is also seen in the output voltage ripple waveform where the noise has a large subharmonic component or at the switching nodes where the duty cycle is seen to be successively increasing over a period of several cycles This instability differs distinct ly from instability in the outer voltage regulation feed back loop which has a more random character and must be debugged separately ideal slope compensation is achieved by adding to the rising inductor current sense signa a ramp whose value is equal to the slope of the declining inductor current The slope m of the decli
13. ies On Card DC DC Converters Pin Configuration DIP SO MAAXLAN MA AXK LIVI Pin Programmed Low Voltage Current Mode SMPS Controller Features 4 Pin Programmable Architecture 4 Operates on Supply Voltages from 2 7V Starts up from 1 8V Low Supply Current 1 6mA MAX741U 504A in Shutdown Bootstrap Input for Low Voltage Applications 4 Current Mode PWM Control 4 Cycle by Cycle Current Limiting 4 Adjustable Undervoltage Lockout and Soft Start 4 Oscillator Synchronization Input Output 4 Shutdown Control Input 4 Low Noise Fixed Frequency Operation 4 Evaluation Kits Available 4 PCB Layout Information Available __ Ordering Information TEMP RANGE PIN PACKAGE MAX741UCPP 0 C to 70 C 20 Plastic DIP MAX741UCAP 0 C to 70 C 20 SSOP MAX741UC D OC to 70 C Dice MAX741UEPP 40 C to 85 C 20 Plastic DIP MAX741UEAP 40 C to 85 C 20 SSOP MAX741UMJP 55 C to 125 C 20 CERDIP Ordering Information continued on last page Dice are tested at Ta 25 C only Contact factory for availability and processing to MIL STD 883 __ Block Diagram SS FREQ SYNC V d E Maxim Integrated Products 4 119 Call toll free 1 800 998 8800 for free samples or literature MAX741 Pin Programmed Low Voltage ABSOLUTE MAXIMUM RATINGS Supply Voltage V to GND oo eee 17V 0 3V Oscillator Output Voltage SYNC 0 3V to V 0 3V MOSFET Driv
14. le with SS connected to VREF 1 23V and RSENSE 0 1Q the highest peak current is 3 5 Vs 0 6Y _ 3 5 1 28V 0 6V IPK 10 RSENSE OO 7 where Vs is the SS pin voltage Under normal load a good value for the peak voltage differential across the current sense amplifier inputs is 200mV or so achieved by adjusting the sense resistor value Setting the SS current limit at 1 5 to 2 times that 3V to 4V at the error amplifier output adds margin to handle worst case loads Ensure that the error amplifier s maximum swing allows enough peak current to meet the average load current Peak transistor current in a typical switch mode power supply is several times greater than the DC load cur rent The exact value depends on configuration input output voltage ratio frequency and inductor value 4 129 LF XY B MAA 741 Pin Programmed Low Voltage Current Mode SMPS Controller CURRENT SENSE AMPLIFIER AV 10 POLARITY DEPENDS ON POL PIN CONNECTION Vt PWM COMPARATOR SOFT START 20k 25R AMPLIFIER ERROR AMPLIFIER AV 2000 3 5 SS VOLTAGE 0 6V CA ans Figure 4 Soft Start and Current Limit Undervoltage Lockout Switching with low gate drive to the power MOSFET results in low efficiency and can cause excessive heating of the switching transistor Undervoltage lockout inhibits switching activity while the supply voltage is low When lockout is triggered the output power FETs a
15. mV and subharmonics of the fundamen tal switching frequency will be present With heavier loads the MAX741U enters CCM giving lower noise performance see Typical Operating Characieristics This circuit s output can be turned on and off with an open drain logic signal applied to the ON OFF control In the off state the output remains connected to the input via inductor L1 and diode D1 The ON OFF control should be taken below 0 5V to turn the circuit off or left open to turn it on Do not apply a voltage to the ON OFF control that exceeds the circuit s output voltage Figure 6 MAX741U EV Kit Schematic This step up converter supplies 5V at 1A from a 3V input INPUT Vin BV TO 15 5V OF CTX20 4 IN PARALLEL ay CTX20 4 COILTRONICS 20uH OUPLT 5V 1 54 10 3A D1 NSQ03A03 SCHOTTKY Figure 7 MAX741D EV Kit Schematic 6V to 15 5V Input Step Down Converter Supplies 5V at 1 5A or 3A MAMKLAN 4 131 MAX 741 Pin Programmed Low Voltage Current Mode SMPS Controller ___Ordering Information continued PART TEMP RANGE PIN PACKAGE MAXZ41DCPP____ OC to 70 C 20 Plastic DIP _ MAX741DCAP O Cto 70 C 20 SSOP MAXT41DCID_ O S 10 470 C Dice MAX741DEPP 40 Cto 85 C_____ 20Plastic DIP_ MAX741DEAP 40 Cto 85 C 208S0OP MAX741DMJP 56 Cto 125 20 CERDIPY gt MAX74INCPP__O Cto 70 C 20 Plastic DIP MAX741NCAP O Cto 70 C 20 SSOP MAX741NC D O Ct
16. nd sink capability Standard 5V CMOS logic can easily drive this pin as long as the logic supply voltage does not exceed V If V drops below 5V buffer the SYNC input signal with a CMOS logic gate with its supply rails connected to GND and V Externally Synchronizing the Switching Frequency To synchronize the switching frequency to an external clock apply the clock to the SYNC pin This signal s duty cycle controls the maximum duty cycle of OUTA or OUTB the high portion of the clock controls the minimum off time A 20 duty cycle clock signal applied at SYNC for example forces a minimum of 20 off time for the MOSFET driven by OUTA or OUTB Therefore for most applications it is appropriate to clock SYNC with a duty cycle of approximately 10 a series of short pulses at the desired switching frequency allowing OUTA and OUTB to achieve duty cycles of up to 90 MNAAXIAN Pin Programmed Low Voltage Current Mode SMPS Controller Application Circuits Low Voltage Step Up Converter Figure 7 shows a 3V to 5V step up or boost converter capable of delivering 1A Bootstrapped operation provides efficiencies between 80 and 90 depending on the load current and the input voltage At light loads the MAX741U enters discontinuous conduction burst mode operation in which inductor currents may stair case before discharging into the output capacitor The resulting output voltage ripple may be higher than CCM noise up to 100
17. ning inductor current is deter mined from the output voltage and the inductance value 4 128 m VoutT L for step down converters and inverters or m VOUT VINVL for step up circuits The voltage slope SVS at the current sense amplifier s output is equal to SVS m RSENSE where RSENSE is the current sense resistor value The slope compensation voltage CVS is generated by a current source controlled by a resistor con nected to the SLOPE pin charging an internal 10pF capacitor as shown in Figure 3 This compensation voltage is summed with the signal from the current sense amplifier and for ideal compensation must be equal to the declining inductor current signal SVS calculated above Hence the slope compen sation voltage is given by SVS CVS VREF 20 10pF RSLOPE where the factor of 20 arises from the current source gain Figure 3 Rearranged these equations give the formula for the slope resistor RSLOPE to be connected to the SLOPE pin RSLOPE VREF 20 10pF m RSENSE POLARITY DEPENDS ON POL PIN CONNECTION TO PWM COMPARATOR gt VREF ESO Figure 3 Current Amplifier and Slope Compensation Model MAAXLAA Pin Programmed Low Voltage Current Mode SMPS Controller Slope Compensation Example The following slope compensation calculation is for a 5V to 15V step up converter using a 30H inductor and a 0 10 sense resistor The ideal compensation slope
18. o 70 C Die a UE MAX741NEPP 40 C to 85 C 20 Plastic DIP MAX741NEAP 40 C to 85 C 20 SSOP MAX741NMJP _ 55 C to 125 C 20 CERDIP MAX741DEVKITSO 0 C to 70 _ SurfaceMount l MAX741U EVKIT 50__ 0 C to 70 C _ Surface Mount Dice are tested at Ta 25 C only Contact factory for availability and processing to MIL STD 883 Chip Topography SYNC VSEL SLOPE FREQ V OUTA rs il PIZN a sable T IRL ours 190 Vout 4 826 mm VREF Bay UVLO ae CSB sa l PES 7 GND i G Ta lien 150 S gas TRANSISTOR COUNT 614 3 810 mm i SUBSTRATE CONNECTED TO V 4 132 MAAKI
19. ply Current FREQ OV Ta 25 C Reference Voltage Reference Voltage Line Regulation Reference Voltage Load Regulation V 2 7V to 15 5V Ta 25 C ILOAD ORA to 300HA Ta 25 C MAX74 iN only FREQ V Ta 28 C Oscillator Frequency FREQ VREF Ta 25 C External Clock Frequency Synchronization Range at SYNC SYNC Input Capacitance SYNC Trip Threshold 1 level used as clock input O level used as clock input 0 2 High Leve 3 Level Pin Trip Thresholds Middle Level P Z N FREQ DUTY Low Level SYNC Output Low Voltage SYNC Output High Voltage VIH V used as clock input loL 252A used as clock output IOH 25A used as clock output 40 200 kHz 10 SYNC Input Current l ViL OV used as clock input 4 120 APA AKIL MI Pin Programmed Low Voltage Current Mode SMPS Controller ELECTRICAL CHARACTERISTICS continued V 5V Ta TMIN fo Tmax unless otherwise noted PARAMETER CONDITIONS arene MIN TYP MAX UNITS gt Error Amplifier Input Bias Current P Z N VREF E O a l 0 005 10 pA N Error Amplifier Open Loop Gain EAO 2V to 3V ae 7 2000 l VN A OUTA or OUTB Ta 25 C loL 50mA a 0 65 0 95 Output Voltage Low A V loL 50mA DRV 10
20. r FET DEREN 18 oura Output A MOSFET Driver drives N channel or NPN transistors in complementary modes When V gt 14V use 5 6Q d in series between OUTA and gate of power FET See Table 1 A we M 19 V Positive Supply Voltage 2 7V to 15 5V Bypass with at least 0 1pF close to V and GND pins of IC Frequency Shutdown Control sets oscillator frequency or forces a non operating shutdown mode 20 FREQ V 145kHz with 85 duty cycle i LAV 140KHz with 95 duty cycle see 3 level input pins section GND Shutdown Mode l RES O MACAKILA _ gt 2125 MAX741 Pin Programmed Low Voltage Detailed Description The MAX741 is a monolithic CMOS current mode PWM controller that can be used in a variety of configurations with one or more external power switching transistors The current mode PWM control scheme provides tight output voltage regulation excellent load and line tran sient response and low noise An external current sens ing resistor provides cycle by cycle current limiting and output current limiting in applications where there is no DC path from input to output The MAX741 is optimized for step up MAX741U step down MAX741D or invert ing MAX741N configurations The basic step up step down and inverting applications presented in detail in the Application Circuits section use the standard topologies shown in Figure 1 Table 1 describes the pin programming
21. re disabled and the SS pin is internally pulled to GND There are three undervoltage lockout modes disabled fixed at 4V and adjustable Connect UVLO to V to disable the undervoltage lockout Connect UVLO to GND to trigger lockout at 4V or less Undervoltage is adjus table when the voltage applied to the UVLO pin is be tween 0 075 V and 0 47 V In adjustable mode the UVLO pin lockout threshold is nominally 0 523V Connect a resistor divider network from V to UVLO to GND as shown in Figure 5 The nominal undervoltage lockout voltage is Vee 0 523 RA RB RB Values for RA and Rp can range from 10kQ to 100k since UVLO is a high impedance input with leakage currents under 1pA For example connect an 82kQ resistor from V to UVLO Ra and a 10kQ resistor from UVLO to GND Rp to achieve a nominal 4 81V lockout voltage threshold These calculations define the undervoltage lockout threshold when V is rising from a low value Hysteresis 4 130 MAM MAX741_ Figure 5 Undervoltage Lockout Comparator Adjustable Mode built into the MAX741 provides a UVLO threshold voltage typically 6 lower when V is falling from above the undervoltage lockout threshold SYNC Input Output Clock The SYNC output typically drives up to five CMOS gates Capacitive loading of this pin lowers the internal oscillator frequency When driven by an external gate SYNC be comes an input The clock source must have 1mA source a
22. tep Down Circuit of Figure tc V 12V ILOAD OMA Ta TMIN to Tmax unless otherwise noted Note 1 Guaranteed but not 100 tested fess Note 2 Output Voltage Initial Accuracy tests include ethe effects of the error amplifier input offset voltage Note 3 Total supply current under actual operating conditions including currents drawn by components PARAMETER CONDITIONS MN TYP MAX L Fixed modes referred to Vout VSEL V Note 2 480 5 00 5 20 Output Voltage Initial Accuracy Adjustable mode referred to error amplifier input 1 18 1 23 1 28 Supply Current VSEL V Note 3 mA Typical Operating Characteristics Ta 25 C unless otherwise noted MAX741U STEP UP MAX741U STEP UP NO LOAD SUPPLY CURRENT vs MAX741U STEP UP LOAD CURRENT vs INPUT VOLTAGE CONTINUOUS CONDUCTION REGION SUPPLY VOLTAGE Vout 5V Vout 5V 2 USA CIRCIUT OF FIGURE 7 CIRCUIT OF FIGURE 7 E CIRCUIT OF FIGURE 7 FE a z z ps Ez kE 3 a CONTINUOUS GONDUCT S gt REGION ES a 4 3 3 F S 3 LOADED DURING 2 STARTUP 25 30 35 40 45 25 30 35 40 45 50 25 30 35 40 45 50 SUPPLY VOLTAGE V SUPPLY VOLTAGE V SUPPLY VOLTAGE V _MAX741U O MAX741U SWITCHING WAVEFORMS SWITCHING WAVEFORMS CONTINUOUS CONDUCTION BURST MODE sev A MOSFET DRAIN VOLTAGE as Y A MOSFET DRAIN VOLTAGE ae y B OUTPUT VOLTAGE RIPPLE AC iad e OUTPUT VOLTAGE RIPPLE AG
23. u a Pi RAS A wit ta cas op NRE RA SYNC output at the oscillator frequency Also functions as a clock GT when driven externally Capacitive loads 2 SYNC reduce oscillator frequency up to 25 When using an external clock the clock s high time corresponds to power switch off time 7 TE TTT Ve T R Voltage Select VSEL and P Z N are decoded to determine the output voltage See Table 2 under Output Voltage 3 VSEL Selection 2 a E Oo H E A Ae a See VSEL ping int Positive Output P 4 PZN VREF Adjustable Mode 2 S GND Negative Output N et eee a ee ee ee 5_ Vout Output Voltage connection to internal resistor dividers Connect to output or leave open in adjustable mode B VREF Voltage Reference Output that can source 300HA for external loads Bypass with TF minimum Undervoltage Lock Out disables IC when V is less than the UVLO threshold See Undervoltage Lockout section 7 UvO V No Lockout S E 0 47V to 0 075V adjustable threshold 3 GND 4V threshold Riera eee a T l Soft Start and current limit adjust A DC voltage applied here sets the maximum peak switch current limit See Soft 8 ss Start and Current Limiting section An RC network reduces surge currents on start up Connect a 150kQ resistor from VREF to SS and 0 1uF from SS to GND for a 15ms soft start time Always connect a resistor 50kQ to 1MQ between VREF and SS lt sI t 7 wee E PE EN fae 2 aia ae y 9 GND Ground l TTT Bel
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maxim MAX741 Manual