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ANALOG DEVICES ADG774 Manual

1. ADG774 ABSOLUTE MAXIMUM RATINGS T 25 C unless otherwise noted Vpp to GND a ater e on aa ANA ORA 0 3 V to 6 V Analog Digital Inputs 0 3 V to Vpp 0 3 V or 30 mA Whichever Occurs First Continuous Current SorD 100 mA Peak Current S or D rar erroe ehe es x 300 mA Pulsed at 1 ms 10 Duty Cycle max Operating Temperature Range Industrial B Version 40 C to 125 C Storage Temperature Range 65 C to 150 C OSOP Package Power Dissipation 566 mW 6j Thermal Impedance 149 97 C W Lead Temperature Soldering 10 sec 300 C IR Reflow Peak Temperature lt 20 sec 235 C ESI cL 2 kV NOTES IStresses above those listed under Absolute Maximum Ratings may cause perma nent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Only one absolute maximum rating may be applied at any one time Overvoltages at IN S or D will be clamped by internal diodes Current should be Junction Temperature 150 C Dnm ui n SOIC Package Power Dissipation 600 mW ja Thermal Impedance 100 C W
2. ORDERING GUIDE Model Temperature Range Package Descriptions Package Options ADG774BR 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BR REEL 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BR REEL7 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BRZ 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BRZ REEL 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BRZ REEL7 40 C to 125 C Standard Small Outline Package SOIC R 16 ADG774BRQ 40 C to 125 C Shrink Small Outline Package QSOD RQ 16 ADG774BRQ REEL pa to 125 C Shr iall Outline Pneus OSOP RO 16 ADG774BRQ REEL7 K Package A RQ 16 ADG774BRQZ to Shrink Small P RQ 16 ADG774BRQZ REEL 40 C to 125 C Shrink Small Outline veni QSOD RQ 16 ADG774BRQZ REEL7 40 C to 125 C Shrink Small Outline Package QSOP RQ 16 Z Pb free part CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the ADG774 features proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality WARNING ESD SENSITIVE DEVICE REV C ADG774 PIN CONF
3. 10 MHz One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 2004 Analog Devices Inc All rights reserved ADG774 SPECIFICATIONS SINGLE SUPPLY Voo 5 V 10 GND 0 V All specifications Tin to Tmax unless otherwise noted B Version 40 C to 40 C to Parameter 25 C 85C 125 C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range 0 V to Vppi V On Resistance Ron 2 2 Q typ Vp 0 V to Vpp Is 10 mA 5 7 O max On Resistance Match between Channels ARon 0 15 Q typ Vp 0 V to Vpp Is 10 mA 0 5 0 5 Q max On Resistance Flatness ReLar om 0 5 Q typ Vp 0 V to Vpp Is 1 mA 1 1 O max LEAKAGE CURRENTS Source OFF Leakage Is OFF 0 01 nA typ Vp 4 5 V Vs 1 V Vp 1 V Vs 4 5 V 0 5 El ES nA max Test Circuit 2 Drain OFF Leakage Ip OFF 0 01 nA typ Vp 4 5 V Vs 1 V Vp V Vs 4 5 V 0 5 1 11 5 nA max Test Circuit 2 Channel ON Leakage Ip Is ON 0 01 nA typ Vp Vs 4 5 V Vp Vs 1 V Test Circuit 3 20 5 1 t15 nA max DIGITAL INPUTS Input High Voltage Vnu 2 0 V min Input Low Voltage Vint 0 8 V max Input Current IINL or Inx 0 001 HA typ Vin Vint or Vine 0 5 HA max DYNAMIC CHARACTERISTICS ton ns typ Q L 0 5 pF 2 ns max s 3V T rcuit 4 torr 4 ns typ Ry 100 Q Cy 35 pF 8 9 ns max Vs 3 V Test Circuit 4 5 1 Break Before Make Time Delay tp ns typ Ry 100 O C 3
4. 0 01 nA typ Vp 3 V Vs 1 V Vp 1 V Va 3 V 0 5 l 1 5 nA max Test Circuit 2 Channel ON Leakage Ip Is ON 0 01 nA typ Vp Vs 3 V Vp Vs 1 V Test Circuit 3 0 5 zl 1 5 nA max DIGITAL INPUTS Input High Voltage Vina 2 0 V min Input Low Voltage Vin 0 8 V max Input Current Int or Im 0 001 LA typ Vin Vint or Ving 0 5 HA max DYNAMIC CHARACT 2 D meom E GOA Ww m 6 21 ns max s 1 5 V Test Circuit 4 torr 5 ns typ R 100 Q Cy 35 pF 10 11 ns max Vs 1 5 V Test Circuit 4 Break Before Make Time Delay tp 5 ns typ Ri 100 Q C 35 pF 1 ns min Vs Vs 3 V Test Circuit 5 Off Isolation 65 dB typ R 500 f 10 MHz Test Circuit 7 Channel to Channel Crosstalk 75 dB typ R 50 Q f 10 MHz Test Circuit 8 Bandwidth 3 dB 240 MHz typ Ry 50 Q Test Circuit 6 Distortion 2 typ Ry 50 Q Charge Injection 3 pC typ Cr 1 nF Test Circuit 9 Cs OFF 10 pF typ f 1 kHz Cp OFF 20 pF typ f 1 kHz Cp Cs ON 30 pF typ f 1 MHz POWER REQUIREMENTS Vpp 13 3 V Digital Inputs 0 V or Vpp Ipp 1 1 HA max 0 001 HA typ Im 1 1 uA typ Vin 43V Io 100 mA max Vs Vp 0V NOTES Temperature range B Version 40 C to 125 C Guaranteed by design not subject to production test Specifications subject to change without notice Table I Truth Table IN D1 D2 D3 D4 Function Hi Z Hi Z Hi Z Hi Z DISABLE SIA S2A S3A S4A IN 0 S1B S2B S3B S4B IN 1 SO m REV C 3
5. 5 pF ns min Vs Vs 5 V Test Circuit 5 Off Isolation 65 dB typ Ry 100 Q f 10 MHz Test Circuit 7 Channel to Channel Crosstalk 75 dB typ Ry 100 Q f 10 MHz Test Circuit 8 Bandwidth 3 dB 240 MHz typ Ry 100 Q Test Circuit 6 Distortion 0 5 typ R 1000 Charge Injection 10 pC typ Cy 1 nF Test Circuit 9 Cs OFF 10 pF typ f 1 kHz Cp OFF 20 pF typ f 1 kHz Cp Cs ON 30 pF typ f 1 MHz POWER REQUIREMENTS Vpp 5 5 V Digital Inputs 0 V or Vpp Ipp 1 1 HA max 0 001 HA typ In 1 1 MA typ Vin 5 V Io 100 mA max Vs Vp 0V NOTES Temperature range B Version 40 C to 125 C Guaranteed by design not subject to production test Specifications subject to change without notice 2 REV C ADG774 SINGLE SUPPLY Voo 3 V 10 GND 0 V All specifications Tyn to Tmax unless otherwise noted B Version 40 C to 40 C to Parameter 25 C 85 C T125C Unit Test Conditions Comments ANALOG SWITCH Analog Signal Range 0 V to Vpp V On Resistance Ron 4 Q typ Vp 0 V to Vpp Is 10 mA 8 9 Q max On Resistance Match between Channels ARon 0 15 Q typ Vp 0 V to Vpp Is 10 mA 0 5 0 5 Q max On Resistance Flatness ReLariom 2 Q typ Vp 0 V to Vpp Is 10 mA 4 4 Q max LEAKAGE CURRENTS Source OFF Leakage I OFF 0 01 nA typ Vp 3 V Vs 1 V Vp 1 V Vs 3 V 0 5 ze 11 5 nA max Test Circuit 2 Drain OFF Leakage Ip OFF
6. ANALOG DEVICES CMOS 3 V 5 V Wide Bandwidth Quad 2 1 Mux ADG774 FEATURES Low Insertion Loss and On Resistance 2 2 Typical On Resistance Flatness 0 5 Typical Automotive Temperature Range 40 C to 125 C 3 dB Bandwidth 240 MHz Single 3 V 5 V Supply Operation Rail to Rail Operation Very Low Distortion 0 5 Low Quiescent Supply Current 1 nA Typical Fast Switching Times ton 7ns torr 4ns TTL CMOS Compatible APPLICATIONS USB 1 1 Signal Switching Circuits Cell Phones PDAs Battery Powered Systems Communications Systems Data Acquisition Systems Token Ring 4 Mbps 16 Mbps Audio and Video Switchi Relay Replacement GENERAL DESCRIPTION The ADG774 is a monolithic CMOS device comprising four 2 1 multiplexer demultiplexers with high impedance outputs The CMOS process provides low power dissipation yet gives high switching speed and low on resistance The on resistance variation is typically less than 0 5 O with an input signal ranging from 0 V to 5 V The bandwidth of the ADG774 is greater than 200 MHz this coupled with low distortion typically 0 596 makes the part suitable for switching USB 1 1 data signals and fast Ethernet signals The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals Fast switching speed coupled with high signal bandwidth also makes the parts suitable for video signal switching CMOS const
7. ARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16 Lead Shrink Small Outline Package QSOP RQ 16 Dimensions shown in inches 0010 cioe ae 0 004 pend 0 012 SEATING 0 010 COPLANARITY 0 008 PLANE 0 006 did 0 004 COMPLIANT TO JEDEC STANDARDS MO 137AB 10 REV C ADG774 Revision History Location Page 3 04 Data Sheet changed from REV B to REV C Added APPLICATIONS sow i e os copia fa cu a cet n it aan ia aaa aa ei aa dau ate nes Do Dee 1 Ghanges to ORDERING GUIDE aa An dokon odk oa ur ti a AG dara d ta Ae den Wee eared din rente du RN 4 10 03 Data Sheet changed from REV A to REV B Updated tomas aa ceda CD Universal Renumbered TP Cs amd Figures ir a AA E CR A E o RR A Universal Changes to FEATURES aci a A Aa ue A UU A ES 1 Changes to APPLICATIONS oe reste ine ana A a N due de aa D id Ei io ta a eee eee 1 Changes to PRODUCT HIGHLIGHTS 23485 34 is e REX ra Yn RR Ea as Sia ae ep e e re 1 Changes to SPECIFICATIONS teria Rut oka bee lh bee dled dua pe P oo E oy Ae Sad ae qu e gra a NG ete 2 Changes to ABSOLUTE MAXIMUM RATINGS des nr dd ce dea Apes Ro a aoe a 4 Updated ORDERING GUIDE yeu RT HAE RSS oa eed te ed ena ee baa sa dan a 4 BJ Carum 7 Updated OUTLINE DIMENSIONS asa vie na eR Re UAR e E arte D gue e Vane A eu od A di an ad eee 10 4 03 Data Sheet changed from REV 0 to REV A Renuinbered EPCs and EIgufes 4 245
8. E tela eee Cera Re See i a on a a p Som d aod Ri dd Universal Updated OUTLINE DIMENSIONS aje n ae REO X AERE e ee e C AX WERE RES C Ea 8 ww BDI C conh ALI REV C 11 ww BDI C comi AL
9. IGURATION SOICIQSOP in Li e 16 Von sia 2 115 EN siB 5 Ha saA D1 4 ADG774 13 saB s2A 5 Nat to Scala 112 Da s2B 6 11 s3A D2 ho ss GND s o ps TERMINOLOGY Vpp Most Positive Power Supply Potential GND Ground 0 V Reference S Source Terminal May be an input or output D Drain Terminal May be an input or output IN Logic Control Input EN Logic Control Input Rox Ohmic Resistance between D and S ARon On Resistance Match between any Two Channels i e Rox max Ron min REFLAT ON Flatness is defined as the d vag ea MINE nt ximum and minimum NT resistance as measured over the specifie Is OFF Source MAT teh CC OBM Ip OFE Drain Leakage Current with the Switch OFF Ip Is ON Channel Leakage Current with the Switch ON Vp Vs Analog Voltage on Terminals D S Cs OFF OFF Switch Source Capacitance Cp OFF OFF Switch Drain Capacitance Cp Cs ON ON Switch Capacitance ton Delay between Applying the Digital Control Input and the Output Switching on See Test Circuit 4 torr Delay between Applying the Digital Control Input and the Output Switching Off tp OFF Time or ON Time Measured between the 90 Points of Both Switches When Switching from One Address State to Another See Test Circuit 5 Crosstalk A Measure of Unwanted Signal that is Coupled through from One Channel to Another as a Result of Parasitic Capacitance Off Isolation A Measure of Unwanted Signal Coupling throu
10. INJECTION pC a 0 05 1 0 15 20 25 30 35 40 45 5 0 1200 1000 SOURCE VOLTAGE V TPC 7 Charge Injection vs Source Voltage Figure 2 Line Termination Y Figure 3 Line Clamp ww BDI C conh ALI REV C 7 ADG774 Test Circuits Is OFF lp OFF Vs T Row Vi lps ki i ki l i Test Circuit 1 On Resistance Test Circuit 2 Off Leakage Test Circuit 3 On Leakage Vour Test Circuit 5 Break Before Make Time Delay g REV C ADG774 Test Circuit 6 Bandwidth Test Circuit 8 Off Isolation CHANNEL TO CHANNEL CROSSTALK 20 x LOG IVs Voyrl Test Circuit 7 Channel to Channel Crosstalk V ADG774 Test Circuit 9 Charge Injection REV C ADG774 OUTLINE DIMENSIONS 16 Lead Standard Small Outline Package SOIC Narrow Body R 16 Dimensions shown in millimeters and inches 10 00 0 3937 9 80 0 3858 a 4 00 0 1575 L 91 6 20 0 2441 3 80 0 1496 1 5 80 0 2283 e zdi al je 1 27 0 0500 1 75 0 0689 0 50 0 0197 35 0 0531 gt FF 0 25 0 0098 9 BSC 1 0 25 0 0098 0 0 0 0039 HT TI ji ty A gt m e gt le 0 25 0 0098 1 27 0 0500 0 51 0 0201 SEATING 0 31 0 0122 PLANE 0 31 0 0122 0 17 0 0067 0 40 0 0157 COPLANARITY 0 10 COMPLIANT TO JEDEC STANDARDS MS 012AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN P
11. gh an OFF Switch Bandwidth Frequency Response of the Switch in the ON State Measured at 3 dB Down Distortion Rar AT oNy Rr REV C b ADG774 Typical Performance Characteristics 5 0 45 4 0 3 5 3 0 25 Ron ON RESPONSE dB 1 3 2 5 3 7 4 9 10M Vs OR Vp DRAIN OR SOURCE VOLTAGE V FREQUENCY Hz TPC 1 On Resistance as a Function of Vp Vs for TPC 4 On Response vs Frequency Various Single Supplies _ ATTENUATION dB 1 3 2 5 37 4 9 Vs OR Vo DRAIN OR SOURCE VOLTAGE V FREQUENCY Hz TPC 2 On Resistance as a Function of Vp Vs for TPC 5 Off Isolation vs Frequency Different Temperatures with 5 V Single Supplies Von 3V 85 C 25 C 40 C Ron ATTENUATION dB 0 6 1 1 1 6 2 1 2 6 100k 1M 10M 100M 1G Vs OR Vp DRAIN OR SOURCE VOLTAGE V FREQUENCY Hz TPC 3 On Resistance as a Function of Vp Vs for TPC 6 Crosstalk vs Frequency Different Temperatures with 3 V Single Supplies 6 REV C ADG774 20 15 10 Figure 1 Loop Back CHARGE
12. ruction ensures ultralow power dissipa tion making the parts ideally suited for portable and battery powered instruments REV C Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use norfor any infringements of patents or other rights ofthird parties that may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners FUNCTIONAL BLOCK DIAGRAM The ADG774 operates from a single 3 3 V 5 V supply and is TTL logic compatible The control logic for each switch is shown in the Truth Table These switches conduct equally well in both directions when ON and have an input signal range that extends to the supplies In the OFF condition signal levels up to the supplies are blocked The ADG774 switches exhibit break before make switching action PRODUCT HIGHLIGHTS 1 Wide 3 dB Bandwidth 240 MHz 2 Ultralow Power Dissipation 3 Extended Signal Range The ADG774 is fabricated on a CMOS process giving an increased signal range that fully extends to the supply rails 4 Low Leakage Over Temperature 5 Break Before Make Switching This prevents channel shorting when the switches are config ured as a multiplexer 6 Crosstalk Typically 70 dB 30 MHz 7 Off Isolation Typically 60 dB

ANALOG DEVICES ADG774 Manual

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