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ANALOG DEVICES ADM2483 handbook

1. 10 POINT Figure 9 Driver Propagation Delay Rise Fall Timing Figure 10 Receiver Propagation Delay 10 POINT 04736 009 04736 010 Figure 11 Driver Enable Disable Timing RE RxD O P LOW O P HIGH RxD ov Figure 12 Receiver Enable Disable Timing Rev B Page 10 of 20 04736 011 04736 012 ADM2483 TYPICAL PERFORMANCE CHARACTERISTICS 1 6 Ipp1_RCVR_ENABLE 5 5V 1 4 12 lt s E ur 5 1 0 o E 5 0 8 o 2 gt o Ipp DE ENABLE 5 5V E gt 2 0 6 a E gt o o 04 0 2 g B 0 E 40 25 85 40 25 10 5 20 35 50 65 80 TEMPERATURE C TEMPERATURE C Figure 13 Unloaded Supply Current vs Temperature Figure 16 Receiver Output Low Voltage vs Temperature 4mA 120 4 78 100 4 76 T a E s0 ATA z z u tr a 60 o 472 o gt 9 B E 2 2 n E 40 5 440 a o o 20 4 68 g 0 4 66 0 05 1 015 20 25 30 35 40 45 5 0 40 25 10 5 20 35 50 65 80 OUTPUT VOLTAGE V TEMPERATURE C Figure 14 Output Current vs Driver Output Low Voltage Figure 17 Receiver Output High Voltage vs Temperature 4 mA 90 80 m T E Z E t z kd 3 50 X E D 2 o g 40 E E o 30 3 s o gt t 20 a 5 10 S 0 0 5 10 15 20 25 30 35 40 45 5
2. Supply Transition Threshold V Vppi Power up 2 0 Vppi Power down 1 0 Vpo2 Power up 3 3 Vpp2 Power down 24 ADM2483 THERMAL SHUTDOWN The ADM2483 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions Shorting the driver outputs to a low impedance source can result in high driver currents The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs This circuitry is designed to disable the driver outputs when a die temperature of 150 C is reached As the device cools the drivers are re enabled at a temperature of 140 C TRUE FAIL SAFE RECEIVER INPUTS The receiver inputs have a true fail safe feature which ensures that the receiver output is high when the inputs are open or shorted During line idle conditions when no driver on the bus is enabled the voltage across a terminating resistance at the receiver input decays to 0 V With traditional transceivers receiver input thresholds specified between 200 mV and 200 mV mean that external bias resistors are required on the A and B pins to ensure that the receiver outputs are in a known state The true fail safe receiver input feature eliminates the need for bias resistors by specifying the receiver input threshold between 30 mV and 200 mV The guaranteed negative threshold means that when the voltage between A and B decays to 0 V the re
3. This is an active low input Driving this input low enables the receiver and driving it high disables the receiver 5 DE Driver Enabledn put Driving the input high enables the dyiver and driving it low disables the driver 6 TxD AU D ta Mi Data to be transmitted b th drivenis applied tdithis input 7 PV PowerlvValide Used dUring pow r upiandpower down See the Applications Information section 9 15 GNDz Ground Bus Side 10 11 14 NC No Connect 12 A Noninverting Driver Output Receiver Input When the driver is disabled or when Von or Vpp is powered down Pin A is put into a high impedance state to avoid overloading the bus 13 B Inverting Driver Output Receiver Input When the driver is disabled or when Von or Vpp is powered down Pin B is put into a high impedance state to avoid overloading the bus 16 Vop2 Power Supply Bus Side Rev B Page 8 of 20 ADM2483 TEST CIRCUITS lt Q o RL A aor a S2 O CL T ovr Figure 3 Driver Voltage Measurement Figure 6 Driver Enable Disable OV OR 3VO 04736 006 04736 003 DEIN O 04736 004 04736 007 Figure 4 Driver Voltage Measurement Figure 7 Receiver Propagation Delay WY D ALI Cu 2 RLDIFF Cio Figure 5 Driver Propagation Delay Figure 8 Receiver Enable Disable 04736 005 04736 008 Rev B Page 9 of 20 ADM2483 SWITCHING CHARACTERISTICS Vppi ov tskew ItpLu ten 90 POINT 90 POINT
4. implemented with a hex inverting Schmitt trigger and a resistor and capacitor In this case values of 3 9 kQ and 1 nF generate a 364 kHz square wave A pair of discrete NMOS transistors switched by the Q Q flip flop outputs conduct current through the center tap of the primary transformer winding in an alternating fashion NAL A ISOLATION BARRIER SD103C Vppi Vpp2 ADM2483 GND GND 04736 030 Figure 30 Isolated Power Supply Circuit Rev B Page 17 of 20 ADM2483 OUTLINE DIMENSIONS 10 50 0 4134 70 10 0 3976 s i i 7 60 0 2992 7 40 0 2913 10 65 0 4193 10 00 0 3937 I d 1 27 0 0500 BSC 2 65 0 1043 0 75 0 0295 x 45 2 35 0 0925 0 25 0 0098 0 30 0 0118 0 10 0 0039 y E co 0 51 0 0201 SEATING T t e Mw PLANARITY 51 0 0 10 0 31 0 0122 PLANE 0 33 0 0130 1 27 0 0500 0 20 0 0079 0 40 0 0157 COMPLIANT TO JEDEC STANDARDS MS 013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 31 16 Lead Standard Small Outline Package SOIC Wide Body RW 16 Dimensions shown in millimeters and inches ORDERING GUIDE Model Data Rate kbps Temperature Range Package Description Package Option ADM2483BRW 500 M0 Cto 85 C 16 kead Wide Body SOIC RW 16 ADM2483BRW REEL 500 V M Morcja asc 16 Lead Wil
5. their respective ground Table 3 Parameter Rating Von 0 5 V to 7 V Vpp2 0 5 V to 6 V Digital Input Voltage DE RE TxD Digital Output Voltage RxD Driver Output Receiver Input Voltage ESD Rating Contact Human Body Model A B Pins Operating Temperature Range Storage Temperature Range Average Output Current per Pin Oja Thermal Impedance Lead Temperature Soldering 10 sec Vapor Phase 60 sec Infrared 15 sec 0 5 V to Voo 0 5 V 0 5 V to Vppi 0 5 V 9 V to 14 V 2 kV 40 C to 85 C 55 C to 150 C 35 mA to 35 mA 73 C W 260 C 215 C 220 C UM ESD CAUTION ADM2483 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability A ALI ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although this product features proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid perform
6. Output Short Circuit Current Vout High 250 250 mA 7 V lt Vout lt 12 V Output Short Circuit Current Vout Low 250 250 mA 7 V lt Vout lt 12 V Logic Inputs Input High Voltage 0 7 Vop V TxD DE RE PV Input Low Voltage 0 25 Voo V TxD DE RE PV CMOS Logic Input Current TxD DE RE PV 10 4001 10 uA TxD DE RE PV Von or 0 V RECEIVER Differential Inputs Differential Input Threshold Voltage Vru 200 125 30 mV 7 V Van lt 12 V Input Hysteresis gt 20 mV ZV amp Vc lt 12 V Input Resistance A B AYAY 96 150 AT MV Je lt 12V Input Current A B 0425 mA Vhe12 V 0 1 mA Vin 7V RxD Logic Output Output High Voltage Vopi 0 1 V lout 20 pA Va Ve 0 2 V Voo 0 4 Vppi 0 2 V lout 4 mA Va Vs 0 2 V Output Low Voltage 0 1 V lour 20 pA Va Vs 0 2V 0 4 V lout 4 mA Va Vs 0 2V Output Short Circuit Current 7 85 mA Vout GND or Vcc Three State Output Leakage Current 1 pA 0 4 V lt Vout lt 24 V POWER SUPPLY CURRENT Logic Side 2 5 mA 4 5 V lt Von lt 5 5 V outputs unloaded RE 0V 1 3 mA 2 7 V Von lt 3 3 V outputs unloaded RE 0V Bus Side 2 0 mA Outputs unloaded DE 5 V 1 7 mA Outputs unloaded DE 0 V COMMON MODE TRANSIENT IMMUNITY 25 kV us TxD Von or O V Von 1 KV transient magnitude 800 V Common mode transient immunity is the maximum common mode voltage slew rate that can be sustained while maintain
7. Temperature per VDE 0884 0 5 OUTPUT CURRENT mA 10 15 20 25 30 3 0 32 34 36 38 40 42 4 OUTPUT VOLTAGE V 04736 036 1 l 4 46 48 50 Figure 24 Output Current vs Receiver Output High Voltage Rev B Page 13 of 20 ADM2483 CIRCUIT DESCRIPTION ELECTRICAL ISOLATION In the ADM2483 electrical isolation is implemented on the logic side of the interface Therefore the part has two main sections a digital isolation section and a transceiver section see Figure 26 Driver input and data enable signals applied to the TxD and DE pins respectively and referenced to logic ground GND are coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground GND2 Similarly the receiver output referenced to isolated ground in the transceiver section is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground Vppi ISOLATION BARRIER 1 DIGITAL ISOLATION 1 iCoupler Technology The digital signals are transmitted across the isolation barrier using iCoupler technology This technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding At the secondary winding the induced waveforms are then decoded into the binary value th
8. Voltage Viorm 560 VPEak Input to Output test Voltage Method b1 Vpr 1050 Vpeak Viorm X 1 875 Ver 100 Production Tested tm 1 sec Partial Discharge lt 5 pC Input to Output Test Voltage Method a After Environmental Tests Subgroup 1 Viorm X 1 6 Ven tm 60 sec Partial Discharge lt 5 pC 896 VPEAK After Input and or Safety Test Subgroup 2 3 Viorm X 1 2 Ven tm 60 sec Partial Discharge lt 5 pC Ven 672 VPEAK Highest Allowable Overvoltage Transient Overvoltage tra 10 sec Vir 4000 VPEAK Safety Limiting Values Maximum Value AllowedjiretheEventofia Failur sSee Figure 23 J Case Temperature j Ts i 150 eC Input Current IiNPUr 265 mA Output Current ls ourPuT 335 mA Insulation Resistance at Ts Vio 500 V Rs 210 Q Rev B Page 7 of 20 ADM2483 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NC NO CONNECT 1 PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED EITHER OR BOTH MAY BE USED FOR GND PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED EITHER OR BOTH MAY BE USED FOR GND 04736 002 Figure 2 Pin Configuration Table 8 Pin Function Descriptions Pin No Mnemonic Description 1 Von Power Supply Logic Side 2 8 GND Ground Logic Side 3 RxD Receiver Output Data When enabled if A B gt 30 mV then RxD high If A B x 200 mV then RxD low This is a tristate output when the receiver is disabled that is when RE is driven high 4 RE Receiver Enable Input
9. proof tested by applying an insulation test voltage 21050 Ve for 1 sec partial discharge detection limit 5 pC INSULATION AND SAFETY RELATED SPECIFICATIONS Table 6 Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 Vrms 1 minute duration Minimum External Air Gap Clearance L 101 7 45 min mm Measured from input terminals to output terminals shortest distance through air Minimum External Tracking Creepage L 102 8 1 min mm Measured from input terminals to output terminals shortest distance along body Minimum Internal Gap Internal Clearance 0 017 min mm Insulation distance through insulation Tracking Resistance Comparative Tracking Index CTI 2175 V DIN IEC 112 VDE 0303 Part 1 Isolation Group Illa Material Group Table 1 in DIN VDE 0110 1 89 Rev B Page 6 of 20 VDE 0884 INSULATION CHARACTERISTICS ADM2483 This isolator is suitable for basic electrical isolation only within this safety limit data Maintenance of this safety data shall be ensured by means of protective circuits An asterisk on the physical package denotes VDE 0884 approval for 560 V peak working voltage Table 7 Description Symbol Characteristic Unit Installation Classification per DIN VDE 0110 for Rated Mains Voltage lt 150 V rms Ito IV lt 300 V rms I to Ill lt 400 V rms Itoll Climatic Classification 40 85 21 Pollution Degree Table 1 in DIN VDE 0110 2 Maximum Working Insulation
10. 0 0 0 5 1 0 15 20 25 30 35 40 45 50 OUTPUT VOLTAGE V DIFFERENTIAL OUTPUT VOLTAGE V Figure 15 Output Current vs Driver Output High Voltage Figure 18 Driver Output Current vs Differential Output Voltage Rev B Page 11 of 20 ADM2483 TIME ns TIME ns 460 440 lp AnL Vpp1 Vpp2 420 400 380 tp gui Vpp1 Vpp 360 Vpp2 5 0V 340 40 25 TEMPERATURE C 85 Figure 19 Driver Propagation Delay vs Temperature Reyr PROP HLVpp Vpp2 5 0V c LH Vpp1 Vppe 5 40 25 85 TEMPERATURE C Figure 20 Receiver Propagation Delay vs Temperature 04736 034 04736 035 Rev B Page 12 of 20 CH1 5 00V CH2 1 00V M200ns A CH1 3 10V CH3 1 00V CH4 5 00V H v 1 33600 s Figure 21 Driver Receiver Propagation Delay High to Low CH1 5 00V CH2 1 00V M200ns A CH1 3 10V CH3 1 00V CH4 5 00V H 360 000ns Figure 22 Driver Receiver Propagation Delay Low to High 04736 022 04736 023 ADM2483 350 gu T E 250 T i S 200 E E g 5 150 E 3 E al E 100 a m o u a 0 3 0 3 0 50 100 150 200 0 0 25 0 50 0 75 1 00 1 25 1 50 1 75 2 00 2 25 CASE TEMPERATURE C OUTPUT VOLTAGE V Figure 23 Thermal Derating Curve Dependence of Safety Limiting Values Figure 25 Output Current vs Receiver Output Low Voltage with Case
11. ABLE MAGNETIC FLUX DENSITY KGAUSS EM o e S 04736 027 k 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY Hz Figure 27 Maximum Allowable External Magnetic Flux Density For example at a magnetic field frequency of 1 MHz the maximum allowable magnetic field of 0 2 kGauss induces a voltage of 0 25 V at the receiving coil This is about 5096 of the sensing threshold and does not cause a faulty output transition Similarly if such an event occurs during a transmitted pulse and is the worst case polarity it reduces the received pulse from 1 0 V to 0 75 V This is well above tile Oy sensing threshold of the decoder j These magnetic flux density values are shown in Figure 28 using more familiar quantities such as maximum allowable current flow at given distances away from the ADM2483 transformers 10 00 1 00 0 10 04736 028 0 01 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY Hz Figure 28 Maximum Allowable Current for Various Current to ADM2483 Spacings At combinations of strong magnetic field and high frequency any loops formed by printed circuit board traces could induce large enough error voltages to trigger the thresholds of succeeding circuitry To avoid this possibility care should be taken in the layout of such traces NAL Rev B Page 16 of 20 APPLICATIONS INFORMATION POWER VALID INPUT To avoid chatter on the A and B outputs caused by slow power up and powe
12. ANALOG DEVICES Half Duplex Coupler Isolated RS 485 Transceiver ADM2483 FEATURES RS 485 transceiver with electrical data isolation Complies with ANSI TIA EIA RS 485 A and ISO 8482 1987 E 500 kbps data rate Slew rate limited driver outputs Low power operation 2 5 mA max Suitable for 5 V or 3 V operations Vpp High common mode transient immunity gt 25 kV ps True fail safe receiver inputs Chatter free power up power down protection 256 nodes on bus Thermal shutdown protection Safety and regulatory approvals UL recognition 2500 Vms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE Certificate of Conformity DIN EN 60747 5 2 VDE 0884 Rev 2 2003 01 DIN EN 60950 VDE 0805 2001 12 EN 60950 2000 Viorm 560 V peak Operating temperature range 40 C to 85 C APPLICATIONS UN Low power RS 485 RS 422 networks Isolated interfaces Building control networks Multipoint data transmission systems GENERAL DESCRIPTION The ADM2483 differential bus transceiver is an integrated galvanically isolated component designed for bidirectional data communication on balanced multipoint bus transmission lines It complies with ANSI EIA TIA 485 A and ISO 8482 1987 E Using Analog Devices iCoupler technology the ADM2483 combines a 3 channel isolator a three state differential line driver and a differential input receiver into a single package The logic side of the device is powered with either a 5 V or 3 V supp
13. ance degrada tion or loss of functionality Rev B Page 5 of 20 LE ESD SENSITIVE DEVICE ADM2483 PACKAGE CHARACTERISTICS Table 4 Parameter Symbol Min Typ Max Unit Test Conditions Resistance Input Output Rio 10 Q Capacitance Input Output Cio 3 pF f 1 MHz Input Capacitance C 4 pF Input IC Junction to Case Thermal Resistance Osa 33 C W Thermocouple located at center of package underside Output IC Junction to Case Thermal Resistance Osco 28 C W Thermocouple located at center of package underside 1 Device considered a 2 terminal device Pins 1 2 3 4 5 6 7 and 8 shorted together and Pins 9 10 11 12 13 14 15 and 16 shorted together Input capacitance is from any input data pin to ground REGULATORY INFORMATION The ADM2483 has been approved by the following organizations Table 5 UL CSA VDE Recognized under 1577 component recognition program File E214100 File 205078 Approved under CSA Component Acceptance Notice 5A Certified according to DIN EN 60747 5 2 VDE 0884 Part 2 2003 01 Complies with DIN EN 60747 5 2 VDE 0884 Part 2 2003 01 DIN EN 60950 VDE 0805 2001 12 EN 60950 2000 File 2471900 4880 0001 a In accordance with UL1577 each ADMeAaals ANY tested by applying an insulation test voltage 23000 Vrms for sec current leakage detection limit 5 pA 2 In accordance with VDE 0884 each ADM2483 is
14. at was originally transmitted Vpp2 TRANSCEIVER D A 8 Q S ge GND Figure 26 ADM2483 Digital Isolation and Transceiver Sections Rev B Page 14 of 20 TRUTH TABLES The following truth tables use these abbreviations Letter Description H High level L Low level X Irrelevant Z High impedance off NC Disconnected Table 9 Transmitting Supply Status Inputs Outputs Von Vop2 DE TxD A B On On H H H L On On H L L H On On L X Z Z On Off X X Z Z Off On X X Z Z Off Off X X Z Z Table 10 Receiving Supply Status Inputs Outputs Vooi Vop A B V RE RxD On On 0 03 LorNC H ST On On lt 0 2 HANS EOD 02 A B On On 0 03 Lor NC Indeterminate On On Inputs open L or NC H On On X H Z On Off X Lor NC H Off On X Lor NC H Off Off X L or NC L POWER UP POWER DOWN CHARACTERISTICS The power up power down characteristics of the ADM2483 are in accordance with the supply thresholds shown in Table 11 Upon power up the ADM2483 output signals A B and RxD reach their correct state once both supplies exceed their thresholds Upon power down the ADM2483 output signals retain their correct state until at least one of the supplies drops below its power down threshold When the Vp power down threshold is crossed the ADM2483 output signals reach their unpowered states within 4 us Table 11 Power Up Power Down Thresholds
15. ceiver output is guaranteed to be high MAGNETIC FIELD M Because iCouplers use a coreless technology no magnetic components are present and the problem of magnetic saturation of the core material does not exist Therefore iCouplers have essentially infinite dc field immunity The analysis that follows defines the conditions under which this might occur The ADM24835 3 V operating condition is examined because it represents the most susceptible mode of operation The limitation on the iCoupler s ac magnetic field immunity is set by the condition in which the induced error voltage in the receiving coil the bottom coil in this case is made sufficiently large either to falsely set or reset the decoder The voltage induced across the bottom coil is given by v Bgm n 1 2 N dt where if the pulses at the transformer output are greater than 1 0 V in amplitude magnetic flux density gauss N number of turns in receiving coil f radius of nth turn in receiving coil cm The decoder has a sensing threshold of about 0 5 V therefore there is a 0 5 V margin in which induced voltages can be tolerated Rev B Page 15 of 20 ADM2483 Given the geometry of the receiving coil and an imposed requirement that the induced voltage is at most 50 of the 0 5 V margin at the decoder a maximum allowable magnetic field is calculated as shown in Figure 27 100 000 E 10 000 1 000 0 100 0 010 MAXIMUM ALLOW
16. g BodySOIC i RW 16 ADM2483BRWZ 500 40 C to 85 C 16 Lead Wide Body SOIC RW 16 ADM2483BRWZ REEL 2 500 40 C to 85 C 16 Lead Wide Body SOIC RW 16 1 A REEL suffix designates a 13 inch 1 000 units tape and reel option 2 Z Pb free part Rev B Page 18 of 20 ADM2483 NOTES ww BDI C conh ALI ADM2483 NOTES VW D i AL 2005 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners www analo g com 5 5 La DEVICES Rev B Page 20 of 20
17. he receiver outputs are in a known state before communication begins and at the point when communication ends Current limiting and thermal shutdown features protect against output short circuits and bus contention situations that might cause excessive power dissipation The part is fully specified over the industrial temperature range and is available in a 16 lead wide body SOIC package One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2005 Analog Devices Inc All rights reserved ADM2483 TABLE OF CONTENTS Sp cifications M 3 Circuit Description treten titer te 14 Timing Specifications retient aE 4 Electrical Isolation E I td 14 Absolute Maximum Ratings eee 5 Truth Tables teer ee etae 15 ESD Cautiori ziii ERRORES ERROR RR 5 Power Up Power Down Characteristics eses 15 Package Characteristics t tds 6 Thermal Shutdown zer tette 15 Regulatory Information eee 6 True Fail Safe Receiver Inputs sse 15 Insulation and Safety Related Specifications 6 Magnetic Field Immunity see 15 VDE 0884 Insulation Characteristics ee 7 Applications Information seen 17 Pin Configuration and Function Descriptions 8 Powers Valid Input eee Ree ens 17 DOSE CIRCUS eco pe ei E e venen 9 Isolated Power Suppl
18. ing specification compliant operation Vcm is the common mode potential difference between the logic and bus sides The transient magnitude is the range over which the common mode is slewed The common mode voltage slew rates apply to both rising and falling common mode voltage edges Rev B Page 3 of 20 ADM2483 TIMING SPECIFICATIONS 2 7 Von 5 5 V 4 75 V Vom 5 25 V Ta Tun to Tmax unless otherwise noted Table 2 Parameter Min Typ Max Unit Test Conditions Comments DRIVER Maximum Data Rate 500 kbps Propagation Delay tein teur 250 620 ns Ripier 54 O Cui Ci 100 pF see Figure 5 and Figure 9 Skew tskew 40 ns Ripe 54 O Cii Ci 100 pF see Figure 5 and Figure 9 Rise Fall Time ta te 200 600 ns Ripier 54 O Cui Ci 100 pF see Figure 5 and Figure 9 Enable Time 1050 ns Ri 500 O C 100 pF see Figure 6 and Figure 11 Disable Time 1050 ns R 500 O C 15 pF see Figure 6 and Figure 11 RECEIVER Propagation Delay tpt teur 400 1050 ns C 15 pF see Figure 7 and Figure 10 Differential Skew tskew 250 ns C 15 pF see Figure 7 and Figure 10 Enable Time 25 70 ns R 1 kO C 15 pF see Figure 8 and Figure 12 Disable Time 40 70 ns R 2 1 kO C 15 pF see Figure 8 and Figure 12 POWER VALID INPUT Enable Time 1 2 us Disable Time 3 5 us Rev B Page 4 of 20 ABSOLUTE MAXIMUM RATINGS Ta 25 C unless otherwise noted All voltages are relative to
19. ly and the bus side uses a 5 V supply only The ADM2483 is slew limited to reduce reflections with improperly terminated transmission lines The controlled slew rate limits the data rate to 500 kbps The devices input impedance is 96 kO allowing up to 256 transceivers on the bus Its driver has an active high enable feature The driver differential outputs Rev B Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners FUNCTIONAL BLOCK DIAGRAM Vppi Vpp2 O ADM2483 z o E d o o 2 z a gt d lt o 04736 001 GND GND Figure 1 and receiver differential inputs are connected internally to form a differential I O port When the driver is disabled or when Vppi or Vom 0 V this imposes minimal loading on the bus An active high receiver disable feature which causes the receive output to enter a high impedance state is provided as well The receiver inputs have a true fail safe feature that ensures a logic high receiver output level when the inputs are open or shorted This guarantees that t
20. r down transients on Vppi 2100 us V the ADM2483 features a power valid PV digital input This pin should be driven low until Vpp exceeds 2 0 V When Vopr is greater than 2 0 V the pin should be driven high Conversely upon power down the PV should be driven low before Vor reaches 2 0 V The power valid input can be driven for example by the output of a system reset circuit such as the ADM809Z which has a threshold voltage of 2 32 V Vppi Vppi ADM2483 ADM809Z PV GND 4 m 04736029 Figure 29 Driving PV with ADM809Z ADM2483 ISOLATED POWER SUPPLY CIRCUIT The ADM2483 requires isolated power capable of 5 V at 100 mA to be supplied between the Vom and GND pins If no suitable integrated power supply is available a discrete circuit such as the one in Figure 30 can be used A center tapped transformer provides electrical isolation The primary winding is excited with a pair of square waveforms that are 180 out of phase with each other A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding The ADP667 linear voltage regulator provides a regulated power supply to the ADM2483 s bus side circuitry To create the pair of square waves a D type flip flop with complementary Q Q outputs is used The flip flop can be connected so that output Q follows the clock input signal If no local clock signal is available a simple digital oscillator can be
21. y Circuit ses 17 Switching Characteristics seen 10 Outline Dimensions eese ntes 18 Typical Performance Characteristics s 11 Ordering Guide x ce Roe RE Ret ei 18 REVISION HISTORY 3 05 Rev A to Rev B WT f Change to Features 55 UM M Y M omm LZ 1 Change to Package Characteristics see 6 Changes to Pin Function Descriptions 8 Changes to Figure 9 and Figure 11 Change to Power Valid Input Section sss 17 Changes to Figure 30 5 ote eme es 17 Changes to Ordering Guide sse 18 1 05 Rev 0 to Rev A Changes to ESD maximum rating specification 5 10 04 Revision 0 Initial Version Rev B Page 2 of 20 SPECIFICATIONS 2 7 lt Von 5 5 V 4 75 V Vom 5 25 V Ta Tmn to Tmax unless otherwise noted ADM2483 Table 1 Parameter Min Typ Max Unit Test Conditions Comments DRIVER Differential Outputs Differential Output Voltage Vop 5 V R oo see Figure 3 2 0 5 V R 50 Q RS 422 see Figure 3 1 5 5 V R 27 Q RS 485 see Figure 3 1 5 5 V Vist 7 V to 12 V Von 4 75 see Figure 4 A Vop for Complementary Output States 0 2 V R 27 O or 500 see Figure 3 Common Mode Output Voltage Voc 3 V R 2 27 Q or 50 Q see Figure 3 A Voc for Complementary Output States 0 2 V R 27 Qor 500 see Figure 3

ANALOG DEVICES ADM2483 handbook

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