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ANALOG DEVICES ADM2209E handbook

1. 0 4 1 45 V Input High Threshold Vru 1 7 2 4 V Input Hysteresis 0 25 V Input Resistance R 3 5 7 kQ Vin 15 V RECEIVER OUTPUTS High Level Output Voltage 2 4 V 40 pA Low Level Output Voltage Vor 0 2 0 4 V Io 1 6 mA Output Leakage Current Except R5A R5B 0 05 5 uA Vpp 0 V DRIVER SWITCHING CHARACTERISTICS Maximum Data Rate 460 1 kbps 3 ko 50 pF to 470 pF i i 60 kbps R 3 to KO G 50 pF to 1000 pF Pa OC td 8565 V 10 Only 920 kbps Ry 3 kQ to 7 KQ Cj 50 pF to 470 pF Vo By 25Vt 5 Vpp 12 5 Propagation Delay High to Low 1 us 3 kQ 1000 pF Figures 1 and 2 Propagation Delay Low to High 1 us 3 kQ 1000 pF Figures 1 and 2 Transition Region Slew Rate 6 16 V us Ry 3 kQ to 7 Cy 50 pF to 470 pF Transition Region Slew Rate 5 V 4 16 V us Ry 3 kQ to 7 Cj 50 pF to 1000 pF Vstpy 5 V 10 Only Measured from 3 V to 3 V or Vice Versa RECEIVER SWITCHING CHARACTERISTICS Maximum Data Rate 920 kbps C 150 pF Vergy 5 Vt 5 Only 460 kbps Cy 150 pF Propagation Delay RI R4 0 4 0 75 Us 150 pF Propagation Delay R5 1 2 us Cy 150 pF Output Rise Time t 30 ns Figures 3 and 4 Output Fall Time t 30 ns ESD AND EMC ESD Protection I O Pins t15 kV Human Body Model 15 kV IEC1000 4 2 Air Discharge 8 kV IEC1000 4 2 Contact Discharge All Other Pins t2 5 kV Human Body Model MIL STD 883B EFT Protec
2. 2 Temporary degradation or loss of function that is self recoverable when the interfering signal is removed 3 Temporary degradation or loss of function that requires operator intervention or system reset when the interfering signal is removed 4 Degradation or loss of function that is not recoverable due to damage The ADM2209E easily meets Classification 1 at the most strin gent Level 3 requirement In fact field strengths up to 30 V m showed no performance degradation and error free data trans mission continued even during irradiation Table VII Test Severity Levels IEC1000 4 3 Field Strength Level Vim 1 1 2 3 1 EMISSIONS INTERFERENCE EN55 022 CISPR22 defines the permitted limits of radiated and conducted interference from Information Technology IT equipment The objective of the standard is to minimize the level of emissions both conducted and radiated APPLICATIONS INFORMATION In a typical Data Terminal Equipment DTE to Data Circuit Terminating Equipment DCE 9 lead de facto interface imple mentation two data lines TxD and RxD and six control lines RTS DTR DSR CTS and RI are required With its six drivers and ten receivers the ADM2209E offers a single chip solution for the two RS 232 ports normally supplied as standard in a desktop or notebook personal computer as shown in Figure 28 The flow through pinout of the device allows for a very simple PCB layout and allows a g
3. DEVICES ANALOG EMI EMC Compliant 15 kV ESD Protected Dual RS 232 Port with Standby ADM2209E FEATURES Two Complete Serial Ports Six Drivers and Ten Receivers Operates with 3 V or 5 V Logic Low Power CMOS lt 5 mA Operation Low Standby Current 100 pA 460 kbit s Data Rate Guaranteed Laplink Compatible 0 1 uF Charge Pump Capacitors Single 12 V Power Supply 3 3 V 5 V Standby Supply One Receiver on Each Port Active in Standby Complies with 89 336 EEC EMC Directive ESD Protection to IEC1000 4 2 801 2 8 kV Contact Discharge 15 kV Air Gap Discharge 15 kV Human Body Model Electrical Fast Transient EFT Immunity IEC1000 4 4 Low EMI Emissions EN55022 Eliminates Costly TransZorbs Conforms to EIA TIA 232 E Specifications Fail Safe Receiver Outputs APPLICATIONS Personal Computers Printers Peripherals Modems GENERAL DESCRIPTION The ADM2209E is a complete dual RS 232 port on a single chip containing six drivers and ten receivers and fully meeting EIA 232 and V 28 specifications The device features an on board dc to dc converter to generate a 12 V power rail elimi nating the need for a negative power supply The ADM2209E is suitable for operation in harsh electrical environments and is compliant with the EU directive on EMC 89 336 EEC Both the level of emissions and immunity are in compliance EM immunity includes ESD protection in excess of 15 kV on all I O lines 1000 4 2 El
4. Figure 26 IEC1000 4 4 Fast Transient Waveform 10 Table VI V Peak kV V Peak kV Level PSU I O 1 0 5 0 25 2 1 0 5 3 2 1 4 4 2 A simplified circuit diagram of the actual EFT generator is illustrated in Figure 27 HIGH VOLTAGE SOURCE 500 OUTPUT Figure 27 IEC1000 4 4 Fast Transient Generator The transients are coupled onto the signal lines using an EFT coupling clamp The clamp is 1 meter long and it completely surrounds the cable providing maximum coupling capacitance 50 pF to 200 pF typ between the clamp and the cable High energy transients are capacitively coupled onto the signal lines Fast rise times 5 ns as specified by the standard result in very effective coupling This test is very severe since high voltages are coupled onto the signal lines The repetitive transients can often cause problems whereysingleygulses do not Destructive latch up may be KNA dleto energy content of the tearisients Not that this stresshiseapplied while the interface products are powered up and transmitting data The EFT test applies hundreds of pulses with higher energy than ESD Worst case transient current on an I O line can be as high as 40 A Test results are classified according to the following 1 Normal performance within specification limits 2 Temporary degradation or loss of performance which is self recoverable 3 Temporary degradation or loss of function or performance wh
5. mA Vpp Figure 6 V vs Load Current Figure 10 Transmitter Output Voltage Low vs Vpp 12 15 TxHI PRU g 10 5 5 al 8 r 9 rI 5 Tx OUTPUT VOLTAGE HIGH V g 5 Bg 3 x TxLO F_19 0 4 4 15 20 15 10 5 0 1 0 200 40077600 800 1000 1200 LOAD CURRENT mA LOAD CAPAGITANCE pF Figure 7 Transmitter Output Voltage High vs toad Figur 117 Transmitter Output Voltage High Low vs Current Load Capacitance 4 12 6 10 2 5 8 8 E o 1 a 5 10 Se o 12 4 14 2 5 10 15 20 0 200 400 600 800 1000 1200 LOAD CURRENT mA LOAD CAPACITANCE pF Figure 8 Transmitter Output Voltage Low vs Load Current Figure 12 Ibp vs Load Capacitance Vsrgy 5 V 14 2 9 12 1 x E 2 O 10 8 10 5 11 5 12 5 13 5 Vpp Figure 9 Transmitter Output Voltage High vs Vpp 6 REV 0 ADM2209E Typical Performance Curves Vstpy 3 3 V 6 8 Tx OUT LOW Volts 1 S CHARGE PUMP VOLTAGE V 0 10 20 30 40 50 10 T 12 13 14 LOAD CURRENT mA Vpp Figure 13 V vs Load Current Figure 17 Transmitter Output Voltage Low vs Vpp 15 TxHI i A 25 5 1 m Tx OUTPUT VOLTAGE HIGH V a8 2 5 E TxLO 10 15 15 10 ne 0 200 400 600 800 1000 1200 LOAD GURRENT m LOAD Figure 14 Transmitter WA Voltage High vs
6. 3 3 V 5 V TTL CMOS Logic Levels 3 R3outA Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 4 200 Receiver Output 3 3 5 TTL CMOS Logic Levels 5 RlourA Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 6 Driver Input 3 3 5 V TTL CMOS Logic Levels 7 T2wA Driver Input 3 3 V 5 V TTL CMOS Logic Levels 8 TlwA Driver Input 3 3 V 5 V TTL CMOS Logic Levels 9 STBY 3 3 5 V Standby Power Supply for Receiver R5 in Ports A and 10 Vpp Positive Power Supply Nominally 12 V 11 C Positive Terminal of C1 If C1 is polarized capacitor 12 Driver Input 3 3 V 5 V TTL CMOS Logic Levels 13 T2nB Driver Input 3 3 V 5 V TTL CMOS Logic Levels 14 T3nB Driver Input 3 3 V 5 V TTL CMOS Logic Levels 15 RlovurB Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 16 R2ourB Receiver Output 3 V 5 V TTL CMOS Logic Levels 17 R3ourB Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 18 R4ourB Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 19 R5ourB Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 20 R5mB Receiver Input EIA 232 Signal Levels 21 Receiver Input EIA 232 Signal Levels 22 R3mB Receiver Input EA4232 Signal Levels j 23 R2 xB Regeiver Input BIA 232 Signal Levels 24 Receiver Input EIA 232 Signal Levels 25 Driver Output EIA 232 Signal Levels 26 T2ourTB Driver Output EIA 232 Signal Levels 27 TlourB Driver Output EIA 232 Signal Levels 28 GND Ground Pin Must Be Conn
7. Load a Figure 18 Transmittem utput Voltage vs Load Ca Current pacitance 460 kBPS 10 2 8 5 gt 1 Tx OUTPUT VOLTAGE LOW V E 9 a E 2 E 4 2 0 5 10 15 0 200 400 600 800 1000 1200 LOAD CURRENT mA LOAD CAPACITANCE pF Figure 15 Transmitter Output Voltage Low vs Load Figure 19 Ipp vs Load Capacitance Current 14 g 5 12 1 x 5 O 10 E 8 10 5 11 5 12 5 13 5 Vpp Figure 16 Transmitter Output Voltage High vs Vpp REV 0 aJ ADM2209E GENERAL DESCRIPTION The ADM2209E is a rugged dual port RS 232 line driver re ceiver that operates from a single 12 V supply thus removing the need for a 12 V power supply It contains ten receivers and six drivers and provides a one chip solution for both serial ports in desktop or portable personal computers Features include low power consumption high transmission rates and compatibility with the EU directive on electromagnetic compatibility EM compatibility includes protection against radiated and conducted interference including high levels of electrostatic discharge All RS 232 inputs and outputs contain protection against electrostatic discharges up to 15 kV and electrical fast tran sients up to 2 kV This ensures compliance to IE1000 4 2 and IEC1000 4 4 requirements This device is ideally suited for operation in electrically harsh environments or where RS 232 cables are frequently being plugged unplugged They are also immune to high R
8. as an internal 400 kQ pull up resistor pulls them high forcing the outputs into a low state The input pull up resistors typically source 10 uA when grounded so unused inputs should either be connected to Vsrgy or left unconnected in order to minimize power consumption Receiver Section The receivers are inverting level shifters that accept EIA 232 input levels and translate them into 5 V logic output levels The inputs have internal 5 kO pull down resistors to ground and are also protected against overvoltages of up to 30 V The guaran teed switching thresholds are 0 4 V minimum and 2 4 V maxi mum Unconnected inputs are pulled to 0 V by the internal 5 kQ pull down resistor This therefore results in a Logic 1 output level for unconnected inputs or for inputs connected to GND The receivers have Schmitt trigger input with a hysteresis level of 0 25 V This ensures error free reception for both noisy in puts and for inputs with slow transition times HIGH BAUD RATE The ADM2209E features high slew rates permitting data trans mission at rates well in excess of the EIA 232 E specifications RS 232 levels are maintained at data rates up to 920 kb s This allows for high speed data links between two terminals and indeed is suitable for the new generation modem standards ESD EFT TRANSIENT PROTECTION SCHEME The ADM2209E uses protective clamping structures on all in puts and outputs which clamps the voltage to a safe level and
9. dissipates the energy present in ESD Electrostatic and EFT REV 0 ADM2209E Electrical Fast Transient discharges A simplified schematic of the protection structure is shown in Figures 22a and 22b Each input and output contains two back to back high speed clamping diodes During normal operation with maximum RS 232 signal levels the diodes have no effect as one or the other is reverse biased depending on the polarity of the signal If however the voltage exceeds about 50 V reverse breakdown occurs and the voltage is clamped at this level The diodes are large p n junctions designed to handle the instantaneous current surge which can exceed several amperes The transmitter outputs and receiver inputs have a similar pro tection structure The receiver inputs can also dissipate some of the energy through the internal 5 kQ resistor to GND as well as through the protection diodes The protection structure achieves ESD protection up to 15 kV and EFT protection up to 2 kV on all RS 232 I O lines The methods used to test the protection scheme are discussed later RECEIVER INPUT m 1 ue dd p OUTPUT Figure 22b Transmitter Output Protection Scheme ESD TESTING IEC1000 4 2 IEC1000 4 2 previously 801 2 specifies compliance testing using two coupling methods contact discharge and air gap discharge Contact discharge calls for a direct connection to the unit being tested Air gap discharge uses a higher
10. other pins There are some important differences between the tradi tional test and the IEC test a The IEC test is much more stringent in terms of discharge energy The peak current injected is over four times greater b The current rise time is significantly faster in the IEC test c The IEC test is carried out while power is applied to the device It is possible that the ESD discharge could induce latch up in the device under test This test is therefore more representative of a real world I O discharge where the equipment is operating nor mally with power applied For maximum peace of mind however both tests should be performed to ensure maximum protection both during handling and later during field service HIGH VOLTAGE GENERATOR DEVICE UNDER TEST ESD TEST METHOD R2 C1 H BODY MIL STD 883B 1 5kQ 100pF IEC1000 4 2 3300 150pF Figure 23 ESD Test Standards a Ipeak 0 1 TO 1ns Figure 25 IEC1000 4 2 ESD Current Waveform ADM2209E The ADM2209E is tested using both of the above mentioned test methods All pins are tested with respect to all other pins as per the MIL STD 883B specification In addition all I O pins are tested as per the IEC test specification The products were tested under the following conditions a Power On Normal Operation b Power Off There are four levels of compliance defined by IEC1000 4 2 The ADM2209E meets th
11. F field strengths without special shielding precautions Emissions are also controlled to within very strict limits A novel feature of this device is that one receiver R5 in each port can be kept active by a low current 3 V 5 V power supply while the rest of the system is powered down This al lows the system to be awakened when peripheral devices begin to communicate with it CIRCUIT DESCRIPTION The internal circuitry consists of four main sectiohs are 1 A charge pump dc to dc conye 2 Logic 3 V 5 V to EIA 232 transmitters 3 EIA 232 to logic receivers i 4 Transient protection circuit on all I O lines Charge Pump DC DC Converter The dc dc converter generates a negative supply voltage from the 12 V supply thus removing the need for a separate 12 V rail It consists of an on chip 200 kHz oscillator switching ma trix and two external capacitors as shown in Figure 20 INTERNAL Do l OSCILLATOR Figure 20 Charge Pump DC DC Converter When S1 and S2 are closed S3 and S4 are open and C1 charges to 12 V S1 and S2 are then opened while S3 and S4 are closed to connect C1 across C2 dumping charge into C2 Since the positive terminal of C2 is at ground a negative voltage will be built up on its negative terminal with each cycle of the oscil lator This voltage depends on the current drawn from C2 If the current is small the voltage will be close to 12 V but will fall as the curr
12. Receiver Outputs 0 3 V to 0 3 V R3ourA 56 Short Circuit Duration R2gyrA 4 55 R2yyA ThovpAMDB sexe vs EA TAI I SN Continuous RioyrA 5 31 Power Dissipation TAA 5 TSourA RU 38 TSSOP Derate 12 mW C Above 70 C 1488 mW TAA 32 T29u1A Operating Temperature Range Tina 5 TtourA Industrial A Version 40 C to 85 C 9 v Storage Temperature Range 65 C to 150 C Voo 19 23 c Lead Temperature Soldering 10 sec 300 C C ra Not to Scale 28 ESD Rating MIL STD 883B I O Pins 15 kV Typ 12 TourB Except I O 2 5 kV TB 15 2s T2oy7B IEC1000 4 2 Air I O Pins t15 kV 14 25 T3qu7B IEC1000 4 2 Contact I O Pins 8 kV 1 75 21 RiB EFT Rating IEC1000 4 4 I O Pins t2kV R2ourB 16 R2iyB This is a stress rating only functional operation of the device at these or any other 22 R3 yB conditions above those indicated in the operation sections of this specification is R4gyrB 16 21 not implied Exposure to absolute maximum rating conditions for extended periods of time may affect reliability Jl AL REV 0 3 ADM2209E PIN FUNCTION DESCRIPTION Pin Number Mnemonic Function 1 R5outA Receiver Output 3 3 V 5 V TTL CMOS Logic Levels 2 R4outA Receiver Output
13. e most stringent compliance level for both contact and air gap discharge This means that the products are able to withstand contact discharges in excess of 8 kV and air gap discharges in excess of 15 kV Table IV IEC1000 4 2 Compliance Levels Contact Discharge Air Discharge Level kV kV 1 2 2 2 4 4 3 6 8 4 8 15 Table V ADM2209E ESD Test Results ESD Test Method I O Pins Other Pins MIL STD 883B 15 kV 2 5 kV IEC1000 4 2 Contact 8 kV Air 15 kV ST VV FAST TRANSIENT BURST TESTING IEC1000 4 4 IEC1000 4 4 previously 801 4 covers electrical fast transient burst EFT immunity Electrical fast transients occur as a result of arcing contacts in switches and relays The tests simu late the interference generated when for example a power relay disconnects an inductive load A spark is generated due to the well known back EMF effect In fact the spark consists of a burst of sparks as the relay contacts separate The voltage appearing on the line therefore consists of a burst of extremely fast tran sient impulses A similar effect occurs when switching on fluo rescent lights The fast transient burst test defined in IEC1000 4 4 simulates this arcing and its waveform is illustrated in Figure 26 It con sists of a burst of 2 5 kHz to 5 kHz transients repeating at 300 ms intervals It is specified for both power and data lines 300ms gt lt 15ms gt 4 0 2 0 4ms
14. ected to 0 V 29 C Negative Terminal of C1 If is polarized capacitor 30 V Inverter Output 12 V Nominal Terminal of C2 If C2 is polarized capacitor 31 TlourA Driver Output EIA 232 Signal Levels 32 T2outA Driver Output EIA 232 Signal Levels 33 Driver Output EIA 232 Signal Levels 34 RlpA Receiver Input EIA 232 Signal Levels 35 2 Receiver Input EIA 232 Signal Levels 36 Receiver Input EIA 232 Signal Levels 37 RANA Receiver Input EIA 232 Signal Levels 38 R5mA Receiver Input EIA 232 Signal Levels 4 REV 0 Test Circuits PULSE GENERATOR Figure 1 Test Circuit for Driver Propagation Delay and Transition Time Figure 2 Driver Propagation Delay and Transition Time Waveforms PULSE GENERATOR KN Figure 3 Test Circuit for Receiver Propagation Delay and Transition Time REV 0 ADM2209E Figure 4 Receiver Propagation Delay and Transition Time Waveforms DRIVER INPUT 200ns 200ns 10V RECEIVER INPUT 10V 3V Figure 5 Input Waveforms Used in AC Performance Tests ADM2209E Typical Performance Curves Vstay 5 V 6 6 a 8 5 gt p l e 10 10 5 o F 12 12 14 14 0 10 20 30 40 50 10 5 11 5 12 5 13 5 LOAD CURRENT
15. ectrical Fast Transient protection 1000 4 4 and Radiated Immunity 1000 4 3 EM emissions include radiated and conducted emissions as required by Information Technology Equipment EN55022 CISPR22 The ADM2209E conforms to the EIA 232E and CCITT V 28 specifications and operates at data rates up to 460 kbps Laplink is a registered trademark of Traveling Software Inc TransZorb is a registered trademark of General Semiconductor Industries Inc REV 0 Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices FUNCTIONAL BLOCK DIAGRAM STBY 412V 3 3V 5V 0 1pF 0 1pF m CHARGE PUMP F 01 VOLTAGE INVERTER O 1pF GND c TINA TloutA cmos T2o 7A EIA TIA 232 INPUTS 2iNA 9UT OUTPUTS Is E RigurA 5 20 R2inA cmos EIA TIA 232 outputs P3ourA GAA R3w INPUTS 4 87 4 RANA 5 38 4 R5iyA ADM2209E TtinB Q2 D 27 TiourB CMOS EIA TIA 232 e i cl ie D QUE 108 200 4 16 23 4 R2iyB CMOS MEN NE EIA TIA 232 outputs P3ourB 4 07 of INPUTS 2 gt S w pe z w In standby mode one receiver on each port R5 remains active t
16. ent drawn increases Standby Operation The ADM2209E automatically enters a standby or shutdown mode when the Vpp power supply is removed An on chip com parator circuit generates an internal shutdown signal This sig nal disables the internal oscillator and hence the charge pump The inverted output V goes to GND All transmitter outputs are disabled and receivers R1 through R4 on each port are three stated The remaining receiver on each port R5 remains fully active The standby current Isrgy remains less than 200 in this mode 7 SHUTDOWN SIGNAL Figure 21 Standby Detection Circuit Vpp 12V O Vsrey 5V Charge Pump Capacitors And Supply Decoupling For proper operation of the charge pump the capacitors should have an equivalent series resistance ESR less than 1 O As the charge pump draws current pulses from Vpp the Vpp decou pling capacitor should also have low ESR The V decoupling capacitor and reservoir capacitor should also have low ESR because they determine how effectively ESD pulses are clamped to Vpp or V by the on chip clamp diodes Tantalum or mono lithic ceramic capacitors are suitable for these components If using tantalum capacitors do not forget to observe polarity Transmitter Driver Section drivers convert 5 logie inputdevels into EIA 232 output levels With Vp E 12V and Es an EIA 232 load the output voltage swing ds typically z 9 Unused inputs may be left unconnected
17. ich requires operator intervention or system reset 4 Degradation or loss of function which is not recoverable due to damage The ADM2209E has been tested under worst case conditions using unshielded cables and meets Classification 2 Data trans mission during the transient condition is corrupted but it may be resumed immediately following the EFT event without user intervention IEC1000 4 3 RADIATED IMMUNITY IEC1000 4 3 previously IEC801 3 describes the measure ment method and defines the levels of immunity to radiated electromagnetic fields It was originally intended to simulate the electromagnetic fields generated by portable radio transceivers or any other device that generates continuous wave radiated electromagnetic energy Its scope has since been broadened to include spurious EM energy which can be radiated from fluores cent lights thyristor drives inductive loads etc REV 0 ADM2209E Testing for immunity involves irradiating the device with an EM field There are various methods of achieving this including use of an echoic chamber stripline cell TEM cell GTEM cell A stripline cell consists of two parallel plates with an electric field developed between them The device under test is placed within the cell and exposed to the electric field There are three severity levels having field strengths ranging from 1 V to 10 V m Results are classified in a fashion similar to those for IEC1000 4 4 1 Normal operation
18. o allow monitoring of peripheral devices while the rest of the system is in power saving mode This feature allows the ADM2209E to wake up the system when a peripheral device begins communication The ADM2209E is available in a 38 lead TSSOP package One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1999 ADM2209E SPECIFICATION Von 10 8 V to 13 2 V Vsrgy 3 3 V 5 or 5 V 10 C1 C2 0 1 pF All specifications Tmn to Tmax unless otherwise noted Parameter Min Typ Max Units Test Conditions Comments OPERATING CONDITIONS Operating Voltage Range 10 8 12 13 2 V Standby Voltage Range Vstpy 3 15 5 5 V Vpp Power Supply Current 5 mA No Load All Driver Inputs at 0 8 V or 2 V All Receiver Inputs at 15 V or 15 V Vsrgy Supply Current 100 200 pA No Load All Tx IN at Vsrgy or Open TRANSMITTER DRIVER CMOS INPUTS Input Pull Up Current 10 25 uA Transmitter Input at GND High Level Input Voltage Ving 2 1 V Low Level Input Voltage Vint 0 4 V TRANSMITTER DRIVER EIA 232 OUTPUTS Output Voltage Swing t5 0 9 0 V All Transmitter Outputs Loaded with 3 kO to GND Output Short Circuit Current Ios t5 15 30 mA Vo 20 V 0 8 V Output Resistance 300 Q Vpp 0 V 0 V Vin 2V RECEIVER EIA 232 INPUTS Input Voltage Range 15 15 V Input Low Threshold
19. round plane to be placed beneath the IC and ground lines to be inserted between the REV 0 signal lines to minimize crosstalk without the complication of multilayer PCBs Note that the two receivers kept active by the standby supply R5mA and 5 should be connected to the Ring In RI line so that the system can be awakened when a peripheral device begins to communicate FAIL SAFE RECEIVER OUTPUTS The ADM2209E has fail safe receiver outputs that assume a high output level if the receiver input is zero or open circuit LAPLINK COMPATIBILITY The ADM2209E can operate up to 460 kbps data rate under maximum driver load conditions of 1000 pF and Ri 3 kQ at minimum power supply voltages 9 WAY D CONNECTOR COM1 SUPER I O CHIP 9 WAY D CONNECTOR COM2 Figure 28 Typical Application for a Dual Serial Port 11 ADM2209E OUTLINE DIMENSIONS Dimensions shown in inches and mm 38 Lead TSSOP Package RU 38 0 386 9 80 F 0 378 9 60 D 0 177 4 50 0 169 4 30 0 256 6 50 0 246 6 25 0433 1 10 MAX 0 006 0 15 0 002 0 05 gt lt gt 4 8 SEATING 0 0200 0 50 20108027 0 0079 0 20 0 PLANE 0067 0 17 0 0035 0 090 UM 12 ae 0 028 0 70 0 020 0 50 REV 0 C3642 8 7 99 PRINTED IN U S A
20. test voltage but does not make direct contact with the unit under test With air discharge the discharge gun is moved towards the unit un der test developing an arc across the air gap hence the term air discharge This method is influenced by humidity temperature barometric pressure distance and rate of closure of the discharge gun The contact discharge method while less realistic is more repeatable and is gaining acceptance in preference to the air gap method Although very little energy is contained within an ESD pulse the extremely fast rise time coupled with high voltages can cause failures in unprotected semiconductors Catastrophic destruc tion can occur immediately as a result of arcing or heating Even if catastrophic failure does not occur immediately the device may suffer from parametric degradation which may result in degraded performance The cumulative effects of continuous exposure can eventually lead to complete failure I O lines are particularly vulnerable to ESD damage Simply touching or plugging in an I O cable can result in a static dis charge that can damage or completely destroy the interface REV 0 _9_ product connected to the I O port Traditional ESD test meth ods such as the MIL STD 883B method 3015 7 do not fully test a product s susceptibility to this type of discharge This test was intended to test a product s susceptibility to ESD damage during handling Each pin is tested with respect to all
21. tion I O Pins 2 kV IEC1000 4 4 EMI Immunity 10 V m IEC1000 4 3 NOTES 1 All typicals are given for Vpp 12 V 5 V Ta 25 Current into device pins is defined as positive Current out of device pins is defined as negative All voltages are referred to ground unless otherwise specified For current minimum and maximum values are specified as an absolute value and the sign is used to indicate direction For voltage logic levels the more positive value is designated as maximum For example if 6 V is a maximum the typical value 6 8 V is more negative 3Only one driver output shorted at a time Tf receiver inputs are unconnected receiver output is a logic high gt Refer to typical curves Driver output slew rate is measured from the 3 0 V to the 3 0 V level on the output waveform Slew rate is determined by load capacitance Specifications subject to change without notice ae REV 0 ADM2209E ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE T4 25 C unless otherwise noted VsTBY carga ELS Pu TA S at OE ater VO ROC SED E 0 UR 0 3 V to 7 V Model Temperature Range Package Option bane ILS 14V ADM2209EARU 40 to 85 C RU 38 Input Voltages Driver Inputs TmyA B 0 3 V to 0 3 V PIN CONFIGURATION Receiver Inputs RaqNA B t25V Output Voltages N Driver Outputs t15V js

ANALOG DEVICES ADM2209E handbook

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