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ANALOG DEVICES ADuC814 user guide

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1. A source XCHD A Ri exchange bytes exchg low digits amp oe Boolean Variable Manipulation call subroutine clear bit to zero return from sub set bit to one return from int addr11 complement bit AND bit with C NOTbit with C OR bit with C NOTbit with C A DPTR rel jump if A 0 rel jump if A notO A direct rel move bit to bit compare and A data rel jump if not Rn data rel equal Ri data rel Rn rel jump if C set decrement and jump if not zero direct rel JNB _ bit rel bit rel jmp if bit not set no operation JBC ASSEMBLER DIRECTIVES define symbol define internal memory symbol define indirect addressing symbol define external memory symbol define internal bit memory symbol define program memory symbol reserve bytes of data memory reserve bits of bit memory store byte values in program memory BSEG jmp amp clear if set store word values in program memory set segment location counter end of assembly source file select program memory space select external data memory space select internal data memory space select indirectly addressed internal data memory space select bit addressable memory space TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP PIN FUNCTIONS mm lt pin 1 identifier ADuC814 28pin TSSOP TOP VIEW not to scale P3 0 RxD P3 1 TxD P3 2 INTO P3 3 INT1 P3
2. TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP INSTRUCTION SET Arithmetic Operations wv PF Legend ADD A source ADD A data AADDC A source ADDC A data SUBB A source SUBB A data Rn register addressing using RO R7 8bit internal address OOh FFh Ri indirect addressing using RO or R1 source any of Rn direct Ri dest any of Rn direct Ri data data16 16bit constant included in instruction bit 8bit direct address of bit increment rel dd toA add source to ditet add with carry subtract from A with borrow 8bit constant included in instruction INC source signed 8bit offset addr11 11bit address in current 2K page addr16_ 16bit address decrement multiply A by B F e oS Logical Operations X PE divide A by B decimal adjust A source 2 logical AND Data Transfer Operations a ie direct A A source direct data A source A data direct A direct data move source to destination logical OR dest source dest data MOV DPTR data16 MOVC A A DPTR move from code memory MOVC A A PC MOVX A Ri MOVX A DPTR A source A data direct A direct data logical XOR move to from clear A to zero data memory complement A rotate A left through C rotate A right through C swap nibbles direct push onto stack direct pop from stack
3. reserved reserved reserved reserved EADRL C6h 00h EDATA3 reserved INTVAL 00h not used not used reserved DACCON 00h BEh 00h A6h 04h 00h 00h reserved reserved reserved reserved reserved EDATA2 reserved HOUR not used not used TH1 DAC1H DAC1L 00h FDh 00h CDh 00h BDh 00h A5h 00h 8Dh 20h F5h 04h MIN 00h FCh reserved reserved reserved reserved 00h CCh not used EDATA1 10h BCh reserved 00h A4h CFG814 9Ch not used 00h 8Ch 00h 00h F4h reserved reserved reserved reserved RCAP2H reserved reserved reserved SEC reserved not used DPH DACOH lower RAM details 9Fh 00h 00h DATA MEMORY SPACE read write area 00h FBh 20h F3h 00h 00h CBh 20h BBh 00h A3h 00h 8Bh 00h 83h reserved reserved reserved RCAP2L CAh reserved ETIM1 reserved reserved reserved not used TLO SSOP TSSOP TSSOP SFR DESCRIPTIONS ADCCON1 ADC Control register 1 PSMCON Power Supply Monitor control register ADCCON1 7 ADC mode 0 off 1 on PSMCON 7 reserved ADCCON1 6 external Vref select bit 0 on chip Vref PSMCON 6 PSM status bit 1 normal 0 fault ADCCON1 5 conversion time 16 ADCclk PSMCON 5 PSM interrupt bit ADCCON1 4 ADCclk 16 777 216
4. serial port interrupt ADCCON3 1 calibration type 0 offset cal 1 gain cal PT1 priority of TF1 Timer1 overflow interrupt ADCCON3 0 _ start calibration bit set to 1 to begin cal PX1 priority of IE1 external INT1 PTO priority of TFO Timer0 overflow interrupt ADCDATAH ADC Data registers PXO __ priority of IEO external INTO ADCDATAL IEIP2 Interrupt Enable Priority register 2 7 IEIP2 7 priority of LOCK interrupt PLL lock ADCGAINH ADC Gain IEIP2 6 priority of TII interrupt time interval ADCGAINL calibration coefficients IEIP2 5 priority of PSMI interrupt power supply monitor IEIP2 4 priority of ISPI interrupt serial interface IEIP2 3 enable LOCK interrupt PLL lock ADCOFSH ADC Offset IEIP2 2 enable TII interrupt time interval ADCOFSL calibration coefficients IEIP2 4 enable PSMI power supply monitor interrupt IEIP2 0__ enable ISPI interrupt serial interface DACCON DAC Control register TMOD Timer Mode register DACCON 7 ModeSelect 0 12bit 1 8bit TMOD 3 7 gate control bit 0 ignore INTx DACCON 6 DAC1 RangeSelect 0 2 5V 1 Vpo TMOD 2 6 counter timer select bit 0 timer DACCON 5 DACO RangeSelect 0 2 5V 1 Vop TMOD 1 5 timer mode selecton bits DACCON 4 Clear DAC1 0 0V 1 normal operation TMOD 0 4 13bitT 16bitT C 8bitT Creload 2x8bitT DACCON 3 Clear DACO 0 0V 1 normal operation upper nibble Timer1 lower nibble Timer0 DACCON 2 SynchronousUpdate 1 asynchronous i x DACCON 1 PowerDown DAC1 TCON Timer Control
5. 4 TO CONVST P1 0 T2 P1 1 T2EX SCLOCK DO P3 7 MOSI D1 P3 6 MISO P3 5 T1 55 EXTCLK P1 7 ADC5 DAC1 P1 6 ADC4 DACO P1 5 ADC3 P1 2 ADCO P1 4 ADC2 P1 3 ADC1 PROGRAM MEMORY SPACE read only 1FFFh internal 8K bytes 8K bytes Flash EE addressable 0000h no parallel external memory interface i INTERRUPT VECTOR ADDRESSES Priority within Level Vector Interrupt Address Bit PSMCON 5 Interrupt Name ak Power Supply Monitor Interrupt 43h PLLCON 6 PLL Lock Interrupt 4Bh WDS WatchDog Timer Interrupt 5Bh IEO External Interrupt 0 03h ADCI End of ADC Conversion Interrupt 33h TFO TimerO Overflow Interrupt OBh IE1 External Interrupt 1 13h TF1 Timer1 Overflow Interrupt 1Bh ISPI SPI Interrupt 3Bh RI TI UART Interrupt 23h TF2 EXF2 Timer2 Interrupt 2Bh TIMECON 2 Time Interval Counter Interrupt 53h 10 IN A jv N TSSOP TSSOP TSSOP TSSOP G02945 1 4 02 0 PRINTED IN U S A ANALOG DEVICES SSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP ADuC814 MicroConverter Quick Reference Guide a Data Acquisition System on a Chip the ADuC814 is ADC DAC Flash EEPROM microcontroller other on chip features 12bit 5us 6channel self calibrating guaranteed no missing codes high speed data capture mode dual 12bit 15ys voltage output lt 1LSB DNL 8K byte
6. DACOL DACO data registers PLLCON PLLCON 7 PLL Control register oscillator powerdown control bit 0 normal PLLCON 6 PLL lock indicator flag O out of lock PLLCON 5 this bit must contain zero PLLCON 4 this bit must contain zero PLLCON 3 fast interrupt control bit 0 normal PLLCON 2 3 bit clock divider value CD default 3 PLLCON 1 200 PLLCON O fcore 16 777 216Hz 2 TIMECON Time Interval Counter Control Register TIMECON 6 24hour select bit 0 255hour TIMECON 5 INTVAL timebase select bits TIMECON 4 128th sec seconds minutes hours TIMECON 3 single time interval control bit 0 reload amp restart TIMECON 2 time interval interrupt bit TII TIMECON 1 time interval enable bit 0 disable amp clear TIMECON 0_ time clock enable bit 0 disable INTVAL TIC Interval Register HTHSEC TIC Elapsed 128th Second Registe SEC TIC Elapsed Seconds Register MIN TIC Elapsed Minutes Register HOUR TIC Elapsed Hours Register CFG814 ADuC814 Configuration Register CFG814 0 SPI enable 0 disabled CFG814 1 PLL bypas 0 XTAL PLL 1 P3 5 ECON Data Flash EE comand register Oih READ page 05h ERASE page 02h PROGRAM page 06h ERASE ALL 04h VERIFY page _othersreserved EADRL Data Flash EE address register EDATA1 EDATA2 EDATA3 EDATA4 Data Flash EE data registers ETIM1 ETIM2 Data Flash EE timing registers SPICON SPI Control register ISPI SPI inturrupt set at end of SPI trans
7. digital input T2EX _timer counter 2 capture reload trigger T2 timer counter 2 external input P3 Port3 register RD external data memory read strobe WR external data memory write strobe 1 timer counter 1 external input To timer counter 0 external input INT1 external interrupt 1 INTO external interrupt 0 TxD serial port transmit data line RxD serial port receive data line SCON Serial communications Control register SMO UART mode control bits baud rate SM1 00 8bit shift register Fosc 12 01 8bit UART TimerOverflowRate 32 x2 10 9bit UART Fosc 64 x2 11 9bit UART TimerOverflowRate 32 x2 SM2 in modes 2 amp 3 enables multiprocessor communication REN receive enable control bit TB8 in modes 2 amp 3 Sth bit transmitted RB8 in modes 2 amp 3 9th bit received TI transmit interrupt flag RI __ receive interrupt flag SBUF Serial port Buffer register PCON Power Control register PCON 7 PCON 6 double baud rate control enable serial interrupt ISI from power down mode PRE3 watchdog timeout selection bits PRE2 0 7 15 6 31 2 62 5 125 250 500 1000 2000 ms PRE1 8 0ms immediate reset PREO gt 8 reserved WDIR watchdog interrupt response bit WDS watchdog status flag 1 indicates watchdog timeout WDE watchdog enable control 0 disabled WDWR __ watchdog write enable bit set to enable write PCON 5 enable interrupt 0 INTO from power down mode PCON 4 ALE disable 0 normal 1
8. forces ALE high PCON 3 general purpose flag PCON 2 general purpose flag PCON 1 power down control bit recoverable with hard reset PCON 0_idle mode control recoverable with enabled interrupt PSW Program Status Word cy carry flag AC auxiliary carry flag FO general purpose flag 0 RS1 register bank select control bits RSO active register bank 0 1 2 3 ov overflow flag F1 general purpose flag 1 P parity of ACC DPH DPL DPTR Data Pointer ACC Accumulator B auxiliary math register SSOP TSSOP
9. Hz 8 4 16 32 PSMCON 4 trip point select bits ADCCON1 3 acquisition time select bits PSMCON 3 4 63V 3 08V 2 93V 2 63V ADCCON1 2 acq time 1 2 3 4 ADCclk PSMCON 2 reserved ADCCON1 1 Timer2 convert enable PSMCON 1 reserved ADCCON1 0 __ external CONVST enable PSMCON 0 PSM enable control 0 off 1 on ADCCON2 ADC Control register 2 SP Stack Pointer ADCI ADC interrupt flag 7 ADCSPI enables ADC to SPI high speed data capture mode IE Interrupt Enable register 1 CCONV continuous conversion enable bit EA enable inturrupts O all inturrupts disabled SCONV single conversion start bit EADC enable ADCI ADC interrupt cs3 input channel select bits ET2 enable TF2 EXF2 Timer overflow interrupt cs2 0 5 ADCO ADCS ES enable RI TI serial port interrupt cs1 8 temperature sensor ET1 enable TF1 Timer1 overflow interrupt cso 9 DACO0 A DAC1 B AGND C VREF EX1 enable IE1 external interrupt 1 ADCCON3 ADC Control register 3 ETO enable TFO Timer0 overflow interrupt EXO enable IEO external_interrupt 0 ADCCON3 7 busy indicator flag 0 ADC not active a ADCCON3 6 gain calibration disable bit 0 gain cal enabled IP Interrupt Priority register ADCCON3 5 number of averages selection bits IP7 not used ADCCON3 4 15 1 31 63 averages PADC priority of ADCI ADC interrupt ADCCON3 3 offset calibration disable bit 0 offset cal enabled pr2 priority of TF2 EXF2 Timer2 overflow interrupt ADCCON3 2 this bit must contain 1 PS priority of RI TI
10. fer WCOL write collision error flag SPE SPI enable 0 DCON enable 1 SPI enable SPIM master mode select 0 slave CPOL clock polarity select 0 SCLK idles low CPHA clock phase select 0 leading edge latch SPRI SPI bitrate select bits SPRO bitrate Fcore 2 4 8 16 slave SPRO SS SPIDAT SPI Data register DCON DO amp D1 Control register enabled if SPE 0 see SPICON register above D1 D1 output bit DIEN D1 output enable 0 disable Do DO output bit DOEN _D0 output enable 0 disable WDCON Watchdog Timer control register TRI Timert run control 0 off 1 run TFO Timer0 overflow flag auto cleared on vector to ISR TRO Timer0 run control O off 1 run IE1 external INT1 flag auto cleared on vector to ISR T1 IE1 type O level trig 1 edge trig 1E0 external INTO flag auto cleared on vector to ISR ITO IEO type O level trig 1 edge trig THO TLO Timer0 registers TH1 TL1 Timer1 registers T2CON Timer2 Control register TF2 overflow flag EXF2 external flag RCLK receive clock enable 0 Timert used for RxD clk TCLK transmit clock enable 0 Timer1 used for TxD cik EXEN2 external enable O ignore T2EX 1 cap rid on T2EX TR2 run control O stop 1 run CNT2 _ timer counter select 0 timer 1 counter CAP2__capture reload select 0 reload 1 capture TH2 TL2 Timer2 register RCAP2H RCAP2L_ Timer2 Reload Capture P1 Port1 register P1 2 1 7 analog digital pins 1 analog function O
11. register DACCON 0 PowerDown DACO 0 off 1 0n TF1 Timer1 overflow flag auto cleared on vector to ISR DAC1H DAC1L DAC1 data registers DACOL 00h FAh 00h F2h 00h DAh 00h BAh 00h A2h 00h 00h 8Ah 07h 82h AOh TIMECON HTHSEC reserved reserved reserved reserved reserved ECON reserved IEIP2 Ath SBUF ADCOFSL ADCOFSH ADCGAINL JADCGAINH ADCCON3 not used TMOD SP 81h SPICON F8h 04h F9h 00h Fth DCON 00h ACC 001 00h D9h 00h 00h B9h 00h A9h 00h 99h 00h 89h PSW T2CON C8h 00h 10h FFh FFh ADCCON2Z2 ADCDATAL JADCDATAH TCON not used WDCON P3 not used SCON P E8h D8h DOh COh BOh 98h 90h 88h E page 159 3 7 AS i a N 640 bytes E o 160 pages OS og Flash EE z E ae accessible a through Os oO 5 5 SFRs 2 lt E paged 5 Of 3 Le ae Zz 3 2 a OS O XE oaae SS rig Wo 128 bytes gt gt gt upper RAM 2 gt indirect A Og Os addressing 2 na 8 ig o 5 o x o 128 bytes e Q On lower RAM R oa rg direct or indirect D i aoe q addressing O O X 26 ag ng im qa o gt gt ISPI FFh SFR details SOP TSSOP ADCI TF2 SPICON F8h 00h SPR1 SPRO jo Laat DACOH
12. s Flash EE program memory 640 bytes Flash EE data memory industry standard 8052 16 I O lines programmable PLL clock 131KHz to 16MHz from 32KHz crystal temperature monitor power supply monitor watchdog timer flexible serial interface ports FUNCTIONAL BLOCK DIAGRAM hardware CONVST CD ADCO T0 CONVST P3 5 T1 SS EXTCLK P3 0 RxD P3 6 MISO P3 7 MOSI D1 0 DACO ADC1 ADC2 ADC3 ADC4 ADC5 DAC1 2mvrc 640 bytes data Flash EE user RAM 8Kx8 program Flash EE cy p as 3 PE 5 DVoo 28 RESET C10 www analog com microconverter DLOAD C2 REV 0 TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP a xe us Is Area Bit Addressable Area Register Bank 3 Register Bank 2 Register Bank 1 Register Bank 0 SOP _ TSSOP DATA MEMORY RAM SFRs user Flash EE all read write LOWER RAM General Purpose bit addresses reserved SSOP TSSOP _ TSSOP SPIDAT F7h 00h ADCCON1 00h reserved DEh 53h reserved EDATA4 00h not used not used not used not used reserved EFh PSMCON DFh PLLCON D7h address reserved 00h BFh reserved

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