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ANALOG DEVICES AD8073 handbook

1. Specifications subject to change without notice REV D AD8072 AD8073 ELECTRICAL CHARACTERISTICS T 25 C V 5 V 150 to 2 5 V unless otherwise noted AD8072 AD8073 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE Rg 1 3 dB Bandwidth Small Signal No Peaking G 2 78 100 MHz 0 1 dB Bandwidth Small Signal No Peaking G 2 7 8 10 MHz Slew Rate Vo 2 V Step 350 V s Settling Time to 0 1 Vo 2 V Step 25 ns DISTORTION NOISE PERFORMANCE Rg 1 Differential Gain 3 58 MHz 2 to 1 5 V 0 1 Differential Phase f 3 58 MHz 2 to 1 5 V 0 1 Degrees Crosstalk f 5 MHz 60 dB Input Voltage Noise f 10 kHz 3 nV VHz Input Current Noise f 10 kHz 6 DC PERFORMANCE Transimpedance 0 25 MQ Input Offset Voltage 1 5 4 mV Twin to Tax 6 mV Offset Drift 9 Input Bias Current 3 10 uA Input Bias Current Drift 10 nA C INPUT CHARACTERISTICS Input Resistance 120 Q Input Resistance 1 MQ Input Capacitance 1 6 pF Ratio 1 to V dB Input C Ra C D V OUTPUT S Output Voltage Swing 1500 1 5 3 5 1 3 to 3 7 V Output Voltage Swing 1 kQ to Tmax 1 3 to 3 7 1 1 to 3 9 V Output Current 100 20 mA Short Circuit Current 60 mA POWER SUPPLY Operating Range 2 5 to 6 V Power Supply Rejection Ratio Vs 4Vto6V 64 dB Quiescent Current per Amplifier 3 4 5 mA OPERATING T
2. o n Vg 5V 8 Vo 2V 1 1500 2 54 9 2 0 1 1 10 100 500 FREQUENCY MHz TPC 12 Large Signal Frequency Response REV D AD8072 AD8073 100 2 1 o o 4 2 60 5 o o E tr E 40 8 2 amp Z 20 0 0 1 1 10 100 500 1 10 100 1k 10k 100k FREQUENCY MHz FREQUENCY Hz TPC 13 Output Resistance vs Frequency 5 TPC 15 Noise vs Frequency 5 10 Vg 5V 0 R 1500 10H 2 100mV ON PSRR 1 20 OF Vs ul m a 5 9 30 8 9 40 8 9 R E 2 0 70 1 10 100 1k 10k 100k 0 02 0 1 1 10 100 500 FREQUENCY Hz FREQUENCY MHz TPC 14 Noise vs Frequency VS 5 V TPC 16 PSRR vs Frequency CMRR dB FREQUENCY MHz TPC 17 CMRR vs Frequency Vg 5 REV D 7 AD8072 AD8073 IE RUM d m 5 tans samy 5 TPC 20 200 mV Step Response G 2 5 TPC 23 200 mV Step Response 2 Vs 2 5 EBENE GENES EE emer AEN A KG EET
3. 5 6 1500 29 Vo 0 2V J M 5 5 1 Rp 200 54 0 0 1 1 10 100 500 FREQUENCY MHz Figure 5 Frequency Response vs Rr REV D On the other hand the bandwidth of a current feedback ampli fier can be decreased by increasing the feedback resistance This can sometimes be useful where it is desired to reduce the noise bandwidth of a system As a practical matter the maximum value of feedback resistor was found to be 2 Figure 5 shows the frequency response of an AD8072 AD8073 at a gain of two with both feedback and gain resistors equal to 2 Capacitive Load Drive When an op amp output drives a capacitive load extra phase shift due to the pole formed by the op amp s output impedance and the capacitor can cause peaking or even oscillation The top trace of Figure 6 Rs 0 Q shows the output of one of the amplifiers of the AD8072 AD8073 when driving a 50 pF capacitor as shown in the schematic of Figure 7 The amount of peaking can be significantly reduced by adding a resistor in series with the capacitor The lower trace of Figure 6 shows the same capacitor being driven with a 25 resistor in series with it In general the resistor value will have to be experimentally determined but 10 Q to 50 Q is a practical range of values to experiment with for capacitive loads of up to a few hundred pF Figure 6 Capacitive Low Drive Vin 100mV 500 Figure 7 Capacit
4. ARR MAA A 11117 N o NI TPC 21 Sine Response G 42 5 TPC 24 Sine Response 2 Vs 2 5 Vs 2 5 V operation is identical to Vs 5 V single supply operation 8 REV D AD8072 AD8073 APPLICATIONS Overdrive Recovery Overdrive of an amplifier occurs when the output and or input range are exceeded The amplifier must recover from this overdrive condition and resume normal operation As shown in Figure 4 the AD8072 and AD8073 recover within 75 ns from positive overdrive and 30 ns from negative overdrive Figure 4 Overload Recovery Vs 5 V 8 V p p Re 1 1500 G 2 Bandwidth vs Feedback Resistor Value The closed loop frequency response of a current feedback amplifier is a function of the feedback resistor A smaller feedback resistor will produce a wider bandwidth resp back resis all affected A ratio feedback resista or A 649 For resistances below this value the gain flatness will be affected and more significant lot to lot variations in device per formance will be noticed Figure 5 shows a plot of the frequency response of an AD8072 AD8073 at a gain of two with both feed back and gain resistors equal to 649 Q 6 1 7 6 0 6 m m 59 6490 5 1 o 58 46 0 1 dB 5 gd 57 34 z Vs 5V lt 2 A
5. cen ee 8 Lead Plastic SOIC 14 Lead SOIC R 8 R 14 0 1968 5 00 0 3444 8 7 7 2440 0 1497 3 80 71 7 0 2284 5 80 PIN 1 0 0688 1 75 0 0196 0 50 PIN 1 0 0688 1 75 0 0196 0 50 0 0098 0 25 0 0532 1 35 0 0099 0 25 0 0098 0 25 0 0532 1 35 0 0099 0 25 X45 0 0040 0 10 0 0040 0 10 FM c e lt M e ote 0 0500 0 0192 0 49 0 0 0500 0 0192 0 49 0 SEATING 127 e 0 0098 0 25 0 0 0500 1 27 SEATING 127 55158 035 0 0099 0 25 0 0500 1 27 PLANE psc 9 0 0075 0 19 0 0160 0 41 PLANE psc 0 0075 0 19 0 0160 0 41 8 Lead pSOIC RM 8 0 122 3 10 fa LI 0 122 3 10 0 199 5 05 0 114 2 90 0 187 4 75 PIN 1 0 0256 0 65 BSC 0 120 3 05 0 120 3 05 era jos EE 0 002 0 FA gt i e 33 0 018 0 46 27 SEATING 9 008 0 20 0 011 0 28 0 028 0 71 PLAN 0 003 0 08 0 016 0 41 REV D 11 AD8072 AD8073 Revision History Location Page 3 02 Data Sheet changed from REV C to REV D Edits to Package Outline 224 RR Re ce dp 1 10 01 Data Sheet changed from REV B to REV C Edits to ELECTRICAL CHARACTERISTICS Ra ree debe gos ede d due bea 3 12 REV D C01066 0 3 02 D PRINTED IN U S A
6. swing to within 1 3 volts of either sup ply rail to accommodate video signals on a single 5 V supply The high bandwidth of 100 MHz 500 V us of slew rate along with settling to 0 1 in 25 ns make the AD8072 and AD8073 useful in many general purpose high speed applications where a single 5 V or dual power supplies up to 6 V are needed The AD8072 is available in 8 lead plastic DIP SOIC and uSOIC packages while the AD8073 is available in 14 lead plastic DIP and SOIC packages Both operate over the commercial temperature range of 0 C to 70 C Additionally the AD8072ARM operates over the industrial temperature range of 40 C to 85 C REV D Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices PIN CONFIGURATIONS 8 Lead Plastic SOIC and SOIC RM Packages 1 5 2 OUT2 3 m IN2 Vs 1 IN2 4 AD8072 TOP VIEW Not to Scale 14 Lead Plastic N and SOIC R Packages GAIN FLATNESS dB CLOSED LOOP GAIN dB 10 FREQUENCY MHz 100 500 Figure 1 Large Signal Frequency Response One Technology Way P O Box 910
7. 6 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 Analog Devices Inc 2002 AD8072 AD8073 SPECIFICATIONS ELECTRICAL CHARACTERISTICS T 25 C Vs 5 V 150 unless otherwise noted AD8072 AD8073 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE Rg 1 3 dB Bandwidth Small Signal No Peaking G 2 80 100 MHz 0 1 dB Bandwidth Small Signal No Peaking G 2 8 10 MHz Slew Rate Vo 4 V Step 500 V us Settling Time to 0 1 Vo 2 V Step 25 ns DISTORTION NOISE PERFORMANCE Rg 1 Differential Gain f 3 58 MHz G 2 0 05 0 15 Differential Phase f 3 58 MHz G 2 0 1 0 3 Degrees Crosstalk f 5 MHz 60 dB Input Voltage Noise f 10 kHz 3 nV VHz Input Current Noise f 10 kHz 6 pA VHz DC PERFORMANCE Transimpedance 0 3 MQ Input Offset Voltage 2 6 mV Tax 8 mV Offset Drift 11 Input Bias Current 4 12 Input Bias Current Drift 12 nA C INPUT CHARACTERISTICS Input Resistance 120 Q Input Resistance 1 MQ Input Capacitance 1 6 pF Common Mode Rejection Ratio 3 56 dB Input Commn ge Output Voltage Swing 3 V Output Voltage Swing 2 25 3 V Output Current 10Q 30 mA Short Circuit Current 80 mA POWER SUPPLY Operating Range 2 5 to 6 V Power Supply Rejection Ratio Vs 4 V to 6 V 70 dB Quiescent Current per Amplifier 3 5 5 mA OPERATING TEMPERATURE RANGE 0 70 C
8. ANALOG DEVICES Low Cost Dual Triple Video Amplifiers AD8072 AD8073 FEATURES Very Low Cost Good Video Specifications 150 Gain Flatness of 0 1 dB to 10 MHz 0 05 Differential Gain Error 0 1 Differential Phase Error Low Power 3 5 mA Amplifier Supply Current Operates on Single 5 V to 12 V Supply High Speed 100 MHz 3 dB Bandwidth G 2 500 V ps Slew Rate Fast Settling Time of 25 ns 0 1 Easy to Use 30 mA Output Current Output Swing to 1 3 V of Rails on Single 5 V Supply APPLICATIONS Video Line Driver Computer Video Plug In Boards RGB or S Video Amplifier in Component Systems PRODUCT DESCRIPTION deliver solid video performance into a 150 Q load while consuming only 3 5 mA per amplifier of supply current Furthermore the AD8073 is three amplifiers in a single 14 lead narrow body SOIC package This makes it ideal for applications where small size is essential Each amplifier s inputs and output are acces sible providing added gain setting flexibility These devices provide 30 mA of output current per amplifier and are optimized for driving one back terminated video load 150 Q each These current feedback amplifiers feature gain flatness of 0 1 dB to 10 MHz while offering differential gain and phase error of 0 05 and 0 1 This makes the AD8072 and AD8073 ideal for business and consumer video electronics Both will operate from a single 5 V to 12 V power supply The outputs of each amplifier
9. EMPERATURE RANGE 0 70 C Specifications subject to change without notice REV D AD8072 AD8073 ABSOLUTE MAXIMUM RATINGS Supply 13 2 V Internal Power Dissipation AD8072 8 Lead Plastic N 1 3 Watts AD8072 8 Lead Small Outline SO 8 0 9 Watts AD8072 8 Lead uSOIC RM 0 6 Watts AD8073 14 Lead Plastic N 1 6 Watts AD8073 14 Lead Small Outline R 1 0 Watts Input Voltage Common Mode Differential Input Voltage t1 25 V Output Short Circuit Duration Observe Power Derating Curves Storage Temperature Range N R RM Packages 65 to 125 C Lead Temperature Range Soldering 10 sec 300 C NOTES Stresses above those listed under Absolute Maximum Ratings may cause perma nent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Specification is for device in free air 8 Lead Plastic Package 90 C W 8 Lead SOIC Package 140 C W 8 Lead USOIC Package 0 214 C W 14 Lead Plastic Package 0j4 75 C W 14 Lead SOIC Package 120 C W ORD
10. ERING GUIDE Temperature ackage Model esc AD8072ARM Lea AD8072ARM REEL 40 to 85 C 13 Reel 8 Lead uSOIC RM 8 AD8072ARM REEL7 40 to 85 C 7 Reel 8 Lead RM 8 AD8072JN 0 to 70 C 8 Lead Plastic DIP N 8 AD8072JR 0 to 70 C 8 Lead SOIC SO 8 AD8072JR REEL 0 to 70 C 13 Reel 8 Lead SOIC SO 8 AD8072JR REEL7 0 C to 70 C 7 Reel 8 Lead SOIC 50 8 AD8073JN 0 C to 70 C 14 Lead Plastic DIP N 14 AD8073JR 0 C to 70 C 14 Lead Narrow SOIC R 14 AD8073JR REEL 0 to 70 C 13 Reel 14 Lead SOIC R 14 AD8073JR REEL7 0 to 70 C 7 Reel 14 Lead SOIC R 14 Brand Code HLA CAUTION MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD8072 and AD8073 is limited by the associated rise in junction tem perature The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition tem perature of the plastic approximately 150 C Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package Exceeding a junction temperature of 175 C for an extended period can result in device failure While the AD8072 and AD8073 are internally short circuit pro tected this may not be sufficient to guarantee that the maximum junction temperature 150 C is not exceeded under all condi tions To ensure proper op
11. EVEL IRE TPC 3 0 1 Flatness vs Frequency Over Temperature TPC 6 Differential Gain and Phase 5 V Vs 5 V REV D 5 AD8072 AD8073 SOIC PACKAGE DRIVE AMP 2 RECEIVE AMPS 1 3 AD8073 RECEIVE AMP 1 AD8072 Vg 5V 5V Rf 1k 1500 Ay 22 Vin 1V CROSSTALK dB 1 0 10 FREQUENCY MHz 100 500 TPC 7 Crosstalk vs Frequency Vout 2V DISTORTION dBc FREQUENCY MHz TPC 8 Distortion vs Frequency Vs 5 Vg 5V 1k 1500 2 5V Ay 2 Vout 2V p p DISTORTION dBc FREQUENCY MHz TPC 9 Distortion vs Frequency Vs 5 V Tz 1M 20 100k zin 60 10k a 2 ul tc 100 1k a 120 ib 140 160 10 180 1k 10k 100k 1M 10M FREQUENCY Hz 100M 1G TPC 10 Open Loop Transimpedance vs Frequency CLOSED LOOP GAIN dB RMALI Ay 21 1 0 1 d Vs 5V PET _ Reo 10 Y 1500 4 200m 5 6 0 1 1 10 100 1k FREQUENCY MHz TPC 11 Normalized Frequency Response Vs 5 GAIN FLATNESS dB a
12. FREQUENCY MHz FREQUENCY MHz Frequency Response Over Temperature 5 TPC 4 0 1 dB Flatness vs Frequency Over Temperature Vs 5 V MIN 0 00 MAX 0 09 p p MAX 0 09 7 0 00 0 03 0 07 0 08 0 08 0 08 0 09 0 08 0 08 0 07 0 06 6 Vg 5V Re 1kQ 1500 1 51 Ay 2 o 5 lt 8 5 4 5 a 3 o 9 MIN 0 00 MAX 0 10 0 10 4 2l Ve 25 3 0 05 0 04 0 02 8 8 9 4 1 lt a Vin 100mV E 0 00 2 0 1 _0 02 0 1 1 0 10 100 1000 1ST 2ND 4TH 1 5TH 7TH 8TH 9TH 10TH 11TH FREQUENCY MHz a MODULATING RAMP LEVEL IRE TPC 2 Frequency Response Over Temperature Vs 5 TPC 5 Differential Gain and Phase Vs 5 V MIN 0 03 MAX 0 00 p p MAX 0 03 0 00 0 00 0 00 0 00 0 00 0 01 0 01 0 02 0 03 0 03 0 03 0 00 0 01 0 02 0 03 25V Rez 1500 2 5V Ay 22 Vin 100mV MIN 0 10 MAX 0 00 0 10 0 00 0 00 0 00 0 02 0 03 0 05 0 07 0 08 0 10 0 10 0 10 GAIN FLATNESS dB DIFFERENTIAL PHASE deg DIFFERENTIAL GAIN 0 1 1 0 10 100 500 1ST 2ND 3RD 4TH 5TH 7TH 8TH 9TH 10TH 11TH FREQUENCY MHz MODULATING RAMP L
13. eration it is necessary to observe the maximum power derating curves shown in Figures 2 and 3 2 0 8 LEAD MINI DIP PACKAGE T 1 m a e a MAXIMUM POWER DISSIPATION W Figure 2 AD8072 Maxi Temperature um Power Dissipation vs 2 5 P 14 LEAD DIP PACKAGE 14 LEAD SOIC MAXIMUM POWER DISSIPATION W a 9 550 40 30 20 10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE C Figure 3 AD8073 Maximum Power Dissipation vs Temperature ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the AD8072 AD8073 feature proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality WARNING er aa ESD SENSITIVE DEVICE 4 REV D Typical Performance Characteristics AD8072 AD8073 Vs 5V 1 1500 TO 2 5V Ay 2 Vin 100 GAIN FLATNESS dB CLOSED LOOP GAIN dB Vin 100mV 0 1 1 0 10 100 1000 0 1 1 0 10 100 500
14. ive Load Drive Circuit AD8072 AD8073 Crosstalk Crosstalk between internal amplifiers may vary depending on which amplifier is being driven and how many amplifiers are being driven This variation typically stems from pin location on the package and the internal layout of the IC itself Table I illustrates the typical crosstalk results for a combination of conditions Table I AD8073JR Crosstalk Table dB Receive Amplifier AD8073JR 1 2 3 1 X 60 56 Drive 2 60 X 60 Amplifier 3 54 60 xX All Hostile 53 55 54 CONDITIONS Vs 5 Rp 1 1500 2 Vout 2 V on Drive Amplifier Layout Considerations The specified high speed performance of the AD8072 and AD8073 require careful attention to board layout and compo nent selection Proper RF design techniques and low parasitic component selection are mandatory The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance ground path The ground plane should be removed from the area near the input pins to reduce stray capacitance Chip capacitors should be used for supply bypassing One end of the capacitor should be connected to the ground plane and the other within 1 8 inches of each power pin An additional large 4 7 uF 10 tantalum electrolytic capacitor should be connected in parallel but not necessarily as close to the supply pin
15. s to provide current for fast large signal changes at the device s output The feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum Capacitance variations of less than 1 pF at the invert ing input will affect high speed performance Stripline design techniques should be used for long signal traces greater than approximately 1 inch These should be designed with a characteristic impedance of 50 Q or 75 Q and be properly terminated at each end ww comi 10 REV D AD8072 AD8073 OUTLINE DIMENSIONS Dimensions shown in inches and mm 8 Lead Plastic DIP N 8 0 430 10 92 0 348 8 84 _ 14 Lead Plastic DIP N 14 0 795 20 19 0 725 18 42 0 280 7 11 0 280 7 11 0 240 6 10 0 240 6 10 0 325 8 25 0 325 8 25 v 0 300 7 62 0 195 4 95 0 060 1 52 2060 6 52 d 9 115 2 99 0 015 0 38 0 210 5 33 0 38 M oS 4 95 T ds 115 2 93 0 130 150 0 160 4 06 3 30 0 160 4 06 kun 30 E MIN 0 115 2 93 0 015 0 381 SEATING 0 015 0 381 SEATING 0 022 0 558 0 100 0 070 1 77 0 008 0 204 0 022 0 558 0 100 i s 1 77 0 008 0 204 PLANE LANE 014 0 356 2 54 0 045 1 15 0 014 0 356 55 0 045 1 15

ANALOG DEVICES AD8073 handbook

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