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ANALOG DEVICES ADA4528-1 handbook

1. 09437 003 TCVos nV C Figure 4 Input Offset Voltage Drift Distribution V Figure 5 Input Offset Voltage vs Common Mode Voltage 09437 004 NUMBER OF AMPLIFIERS Vos HV Rev A Page 6 of 20 NUMBER OF AMPLIFIERS Vos HV Figure 6 Input Offset Voltage Distribution 09437 006 TCVos Figure 7 Input Offset Voltage Drift Distribution Vem V Figure 8 Input Offset Voltage vs Common Mode Voltage 09437 005 09437 007 ADA4528 1 Ip pA Ip pA 09437 008 09437 110 TEMPERATURE C TEMPERATURE C Figure 9 Input Bias Current vs Temperature Figure 12 Input Bias Current vs Temperature F 125 0 0 5 1 0 1 5 2 0 25 8 3 V i Figure 10 Input Bias Current vs Common Mod
2. TIME 10us DIV Figure 41 Positive Settling Time to 0 196 E ul z 4 o gt E 5 2 amp al o gt E 5 a E 5 og z 8 ul z o gt E gt 2 ul z gt E gt a E 5 o 09437 039 VOLTAGE 2V DIV 09437 044 Rev A Page 12 of 20 1 a a INPUT LL LL LA IJ Vey 2 5V Ay 10 Vin 375 10k 100 OUTPUT TIME 10us DIV Figure 42 Positive Overload Recovery Vsy 2 5V Ay 7 10 Vin 375mV RL 10 C 100pF TIME 10ps DIV Figure 43 Negative Overload Recovery TIME 10us DIV Figure 44 Positive Settling Time to 0 196 OUTPUT VOLTAGE V 09437 043 OUTPUT VOLTAGE V 09437 047 09437 042 VOLTAGE 1V DIV VOLTAGE NOISE DENSITY nV VHz CURRENT NOISE DENSITY pA VHz 100 7 10 0 1 Figure 45 Negative Settling Time to 0 1 TIME 10us DIV 10 100 1k 10k FREQUENCY Hz Figure 46 Voltage Noise Density vs Frequency Vsy 2 5V Ay 100 Vom Vsy 2 10 100 1k 10k 100k FREQUENCY Hz Figure 47 Current Noise Density vs Frequen
3. Figure 34 Small Signal Transient Response Vsy 2 5V Vin 100mV p p Ay 1 Ri 10 TIME 1us DIV LOAD CAPACITANCE pF Figure 35 Small Signal Overshoot vs Load Capacitance 09437 034 09437 038 1000 09437 033 Rev A Page 11 of 20 OVERSHOOT VOLTAGE 1V DIV VOLTAGE 50mV DIV ADA4528 1 Vsy 2 5V Vin 4V p p Ay 1 10kQ C 100pF TIME 20us DIV 09437 037 Figure 36 Large Signal Transient Response Vsy 2 5V Vin 100mV p p Ay 1 R 10 C 100pF TIME 1us DIV 09437 041 Figure 37 Small Signal Transient Response Vsy 5V Vin 100mV p p Ay 1 RL 10kQ LOAD CAPACITANCE pF 1000 09437 036 Figure 38 Small Signal Overshoot vs Load Capacitance ADA4528 1 INPUT VOLTAGE V INPUT VOLTAGE V VOLTAGE 1V DIV Vsy 1 25V Ay 7 10 Vin 187 5mV R 10kQ C 100pF Figure 39 Positive Overload Recovery Figure 40 Negative Overload Recovery TIME 10ps DIV Vey 1 25V Vin 187 5mV Ay 7 10 RL 10kQ C 100pF TIME 10ps DIV INPUT ERROR BAND POST GAIN 57
4. With a low source resistance of Rs lt 1 the voltage noise of the amplifier dominates As source resistance increases the thermal noise of Rs dominates As the source resistance further 1 increases where Rs gt 100 the current noise becomes the main contributor of the total input noise A good selection table for low noise op amps can be found in the AN 940 Application Note Low Noise Amplifier Selection Guide for Optimal Noise Residual Ripple Performance Although the ACFB suppresses the chopping related ripples there exists higher noise spectrum at the chopping frequency and its harmonics due to the remaining ripples Figure 60 shows the voltage noise density of the ADA4528 1 configured in unity gain A noise spike of 50 nV VHz can be seen at the chopping frequency of 200 kHz This noise spike is significant when the op amp has a closed loop frequency that is higher than the chopping frequency To further suppress the noise to a desired level it is recommended to have a post filter at the output of the 1 10 100 1k 10k FREQUENCY Hz 09437 062 Figure 59 Voltage Noise Density vs Frequency Voltage Noise Density with Different Gain Configurations Figure 58 shows the voltage noise density vs closed loop gain of a zero drift amplifier from Competitor A The voltage noise density of the amplifier increases from 11 nV VHz to 21 nV VHz as c
5. 09437 010 Rev A Page 8 of 20 OUTPUT VOLTAGE Von TO SUPPLY RAIL V OUTPUT VOLTAGE VoL TO SUPPLY RAIL mV OUTPUT VOLTAGE TO SUPPLY RAIL mV 10 Vsy 5V 1 100m 40 C 25 85 125 10 1 0 1 0 001 0 01 0 1 1 10 100 LOAD CURRENT mA Figure 18 Output Voltage Vox to Supply Rail vs Load Current 50 25 0 25 50 75 100 125 TEMPERATURE C Figure 19 Output Voltage to Supply Rail vs Temperature 50 25 0 25 50 75 100 125 TEMPERATURE C Figure 20 Output Voltage Von to Supply Rail vs Temperature 09437 013 09437 019 09437 117 OPEN LOOP GAIN dB Isy PER AMPLIFIER mA 120 90 e CLOSED LOOP GAIN dB 0 05 10 15 20 25 30 35 40 45 50 55 Vsy V Figure 21 Supply Current vs Supply Voltage 135 90 45 1k 10k 100k 1M 10M FREQUENCY Hz Figure 22 Open Loop Gain and Phase vs Frequency 1k 10k 100k FREQUENCY Hz Figure 23 Closed Loop Gain vs Freque
6. 127 dB Supply Current Amplifier Isy lo OmA 1 5 1 8 mA 40 C lt TA lt 125 C 2 2 mA DYNAMIC PERFORMANCE Slew Rate SR C 100 pF Av 1 0 5 V us Settling Time to 0 196 ts Vin AV step Ri 10 kO 100 pF Av 1 10 us Gain Bandwidth Product GBP Ri C 100 pF Av 1 4 MHz Phase Margin 10 100 pF Av 1 57 Degrees Overload Recovery Time Ri C 100 pF Av 10 50 us NOISE PERFORMANCE Voltage Noise en p p 0 1 Hz 10 Hz Av 100 99 nV p p Voltage Noise Density en f 1 kHz Av 100 5 9 nV 4Hz f 1 kHz Ay 4100 Vom 4 5 V 5 3 nV 4Hz Current Noise in p p 0 1 Hz to 10 Hz Av 100 10 pA p p Current Noise Density in f 1kHz Av 100 0 5 pA VHz Rev A Page 4 of 20 ABSOLUTE MAXIMUM RATINGS Table 4 Parameter Rating Supply Voltage 6V Input Voltage Vsy 0 3V Input Current 10 mA Differential Input Voltage tVsy Output Short Circuit Duration to GND Indefinite Storage Temperature Range 65 C to 150 Operating Temperature Range 40 C to 125 C Junction Temperature Range 65 C to 150 C Lead Temperature Soldering 60 sec 300 C ADA4528 1 THERMAL RESISTANCE is specified for the worst case conditions that is a device soldered in a circuit board for surface mount packages This was measured using a 4 layer JEDEC thermal board with the exposed pad soldered to the PCB Table 5 Thermal
7. 1 3113 2011 Analog Devices Inc All rights reserved ADA4528 1 TABLE OF CONTENTS Features ore LL uer 1 Applications io rettet Re RIP URN I 1 Pin Configurations eerte rehenes 1 General Description icio eee o e RE I IDE 1 R vision HistOEy secessus este ue e D duse 2 Sp cifications oret ettet e eere 3 Electrical Characteristics 2 5 V Operation 3 Electrical Characteristics 5 V 4 Absolute Maximum Ratings essent 5 Thermal Resistance RETE RETE Tiene 5 REVISION HISTORY 9 11 Rev 0 to Rev A Added 8 Lead LFCSP WD Changes to General Description Section Added Figure 2 Renumbered Sequentially Changes to Offset Voltage Offset Voltage Drift Power Supply Rejection Ratio and Settling Time to 0 196 Parameters ange nodeute eden eU RU T 3 Changes to Thermal Resistance Section and Table 5 5 Changes to Figure 41 and Figure 44 sse 12 Changes to Figure 45 and Figure 48 sss 13 Updated Outline Dimensions seen 18 Changes to Ordering Guide sse 18 1 11 Revision 0 Initial Version oeste eset ts ev T AE 5 Typical Performance Characteristics sse 6 Applications Information 15 Input Protection ee eee ees 15
8. 100 80 Fy 60 x PSRR te 9 40 0 PSRR 20 0 20 2 100 1k 10k 100k 1M 10M 2 FREQUENCY Hz Figure 28 PSRR vs Frequency 1k Voy 2 5V 100 10 m Ay 100 amp Ay 10 amp 5 1 E 3 3 N Ay 1 N EG 0 01 0 001 100 1k 10k 100k 1M 10M 5 FREQUENCY Hz E Figure 29 Output Impedance vs Frequency Rev A Page 10 of 20 140 120 100 80 60 40 20 120 FREQUENCY Hz Figure 30 CMRR vs Frequency Vey 5V 100 80 60 PSRR 40 20 PSRR 1k 100 10 0 1 0 01 0 001 1k 10k 100k 1M FREQUENCY Hz Figure 31 PSRR vs Frequency 10M 100 1k 10k 100k 1M FREQUENCY Hz Figure 32 Output Impedance vs Frequency 10M 09437 031 09437 035 09437 030 OVERSHOOT VOLTAGE 0 5V DIV VOLTAGE 50mV DIV Vey 1 25V Vin 2V Ay 1 Figure 33 Large Signal Transient Response RL 10k 100pF TIME 20us DIV Vsy 1 25V Vin 100mV p p Ay 1 10kQ C 100pF
9. 5 6 nV VHz at f 1 kHz Ay 100 Vsy 2 5 V and no 1 f noise component These features are ideal for amplification of low level signals in dc or subhertz high precision applications INPUT PROTECTION The ADA4528 1 has internal ESD protection diodes that are connected between the inputs and each supply rail These diodes protect the input transistors in the event of electrostatic dis charge and are reverse biased during normal operation This protection scheme allows voltages as high as approximately 300 mV beyond the rails to be applied at the input of either terminal without causing permanent damage Refer to Table 4 in the Absolute Maximum Ratings section When either input exceeds one of the supply rails by more than 300 mV these ESD diodes become forward biased and large amounts of current begin to flow through them Without current limiting this excessive fault current causes permanent damage to the device If the inputs are expected to be subject to overvoltage conditions insert a resistor in series with each input to limit the input current to 10 mA maximum However consider the resistor thermal noise effect on the entire circuit Ata5 V supply voltage the broadband voltage noise of the ADA4528 1 is approximately 6 nV VHz at unity gain 1 resistor has thermal noise of 4 nV VHz Adding a 1 resistor increases the total noise by 3096 root sum square rss RAIL TO RAIL INPUT AND OUTPUT The ADA4528 1
10. ANALOG Precision Ultralow Noise RRIO DEVICES Zero Drift Op Amp ADA4528 1 FEATURES PIN CONFIGURATIONS Low offset 2 5 pV maximum Nc 1 8 NC Low offset voltage drift 0 015 pV C maximum n 2 ADA4528 1 7 v TOP VIEW Low noise 3 Not to Scale 9 OUT 5 6 nV 4 Hz at f 1 kHz Av 100 viy jelne 97 nV p p atf 0 1 Hz to 10 Hz Av 100 NC NO CONNECT DO NOT CONNECT TO THIS PIN Open loop voltage gain 130 dB minimum CMRR 135 dB minimum 09437 001 Figure 1 8 Lead MSOP PSRR 130 dB minimum NC 1 Gain bandwidth product 4 MHz 2 5 ADA4528 1 lt Single supply operation 2 2 V to 5 5 V MUI Sa VIEW Dual supply operation 1 1 V to 2 75 V v 4D Rail to rail input and output NOTES 1 NC NO CONNECT DO NOT CONNECT Unity gain stable THIS PIN 2 IT IS RECOMMENDED THAT THE 5 APPLICATIONS EXPOSED PAD BE CONNECTED TO V 3 Figure 2 8 Lead LFCSP Thermocouple thermopile 9 Load cell and bridge transducer Precision instrumentation Electronic scales Medical instrumentation Handheld test equipment GENERAL DESCRIPTION Table 1 Analog Devices Inc Zero Drift Op Amp Portfolio The ADA4528 1 is an ultralow noise zero drift operational am Low 16V plifier featuring rail to rail input and output swing With an d offset voltage of 2 5 uV offset voltage drift of 0 015 uV C and lt 20 pA lt 1 mA otage typical n
11. Mode Cincm 30 pF OUTPUT CHARACTERISTICS Output Voltage High 10 to Vem 2 49 2 495 V 40 C lt Ta lt 125 2 485 V Ri 2 kO to Vem 2 46 2 48 V 40 C lt Ta lt 125 2 44 V Output Voltage Low Vo 10 to Vem 5 10 mV 40 C lt TA lt 125 15 mV Ri 2 to Vem 20 40 mV 40 C lt Ta lt 125 60 mV Short Circuit Current Isc 30 mA Closed Loop Output Impedance Zout f 1 kHz Av 10 0 1 Q POWER SUPPLY Power Supply Rejection Ratio PSRR 2 2 V to 5 5 V 130 150 dB 40 lt Ta lt 125 127 dB Supply Current Amplifier lo OmA 1 4 1 7 mA 40 C lt Ta 125 C 2 1 mA DYNAMIC PERFORMANCE Slew Rate SR 10 100 pF Av 1 0 45 V us Settling Time to 0 196 ts Vin 1 5 V step Ri 10 100 pF Av 1 7 us Gain Bandwidth Product GBP R 10 C 100 pF Av 1 4 MHz Phase Margin 10 C 100 pF Av 1 57 Degrees Overload Recovery Time Ri 10 C 100 pF Av 10 50 us NOISE PERFORMANCE Voltage Noise e p p 0 1 Hz to 10 Hz Av 100 97 nV p p Voltage Noise Density en f 1 kHz 100 5 6 nV VHz f 1 kHz Av 100 Vem 2 0 V 55 nV 4Hz Current Noise in p p 0 1 Hz to 10 Hz Av 100 10 pA p p Current Noise Density in f 1 kHz Ay 100 0 7 pA VHz Rev A Page 3 of 20 ADA4528 1 ELECTRICAL CHARACTERISTICS 5 V OPERATION Vs 5 V Vem Vsy 2 V Ta 25 C unless otherwise s
12. Rail to Rail Input and Output ses 15 Noise Considerations senten 15 Printed Circuit Board Layout sse 17 Outline Dimensions eee ntes 18 Ordering Guide oe Nested ect iore et e 18 Rev A Page 2 of 20 SPECIFICATIONS ELECTRICAL CHARACTERISTICS 2 5 V OPERATION Vs 2 5 V Vem Vsy 2 V Ta 25 C unless otherwise specified ADA4528 1 Table 2 Parameter Symbol Test Conditions Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage Vos Vem 0 Vto 2 5 V 0 3 2 5 uV 40 C lt Ta lt 125 MSOP package 4 uV 40 C lt Ta lt 125 C LFCSP package 4 3 uV Offset Voltage Drift AVos AT 40 C lt Ta lt 125 MSOP package 0 002 0 015 pV C 40 C lt Ta lt 125 C LFCSP package 0 018 Input Bias Current 220 400 40 lt Ta 125 C 600 Input Offset Current los 440 800 pA 40 C lt Ta lt 125 C 1 nA Input Voltage Range 0 2 5 V Common Mode Rejection Ratio CMRR 2 OV to 2 5 V 135 158 dB 40 C lt Ta lt 125 116 dB Open Loop Gain Avo Ri 10 Vo 0 1 V to 2 4 V 130 140 dB 40 C lt Ta 125 126 dB R 2 Vo 0 1 V to 2 4 V 125 132 dB 40 C lt Ta lt 125 C 121 dB Input Resistance Differential Mode Rinom 225 kQ Input Resistance Common Mode Rincm 1 GO Input Capacitance Differential Mode 15 Input Capacitance Common
13. Resistance The input pins have clamp diodes to the power supply pins Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0 5 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Package Type Unit 8 Lead MSOP RM 8 142 45 C W 8 Lead LFCSP CP 8 12 80 14 C W ESD CAUTION ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge without detection Although this product features patented or proprietary protection circuitry damage dy A may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Rev A Page 5 of 20 ADA4528 1 TYPICAL PERFORMANCE CHARACTERISTICS Ta 25 C unless otherwise noted NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS Vos HV 100 90 80 70 60 50 40 30 20 10 0 1 0 0 8 0 6 0 4 0 2 0 02 0 4 06 08 1 0 Vos HV Figure 3 Input Offset Voltage Distribution 09437 002
14. cy 09437 045 09437 046 CURRENT NOISE DENSITY pA VHz 09437 150 Rev A Page 13 of 20 VOLTAGE 2V DIV VOLTAGE NOISE DENSITY nV VHz ADA4528 1 Vsy 5V R 10k C 100pF DUT Ay 1 1 INPUT OUTPUT Figure 48 Negative Settling Time to 0 1 TIME 10ys DIV 100 Vsy 5V Ay 100 Vom Vsy 2 10 1 1 10 100 1k 10k FREQUENCY Hz Figure 49 Voltage Noise Density vs Frequency 10 Vsy 5V Ay 100 Vom Vsy 2 1 0 1 1 10 100 1k 10k 100k FREQUENCY Hz Figure 50 Current Noise Density vs Frequency 09437 048 09437 049 09437 153 ADA4528 1 INPUT VOLTAGE 20nV DIV TIME 1s DIV Figure 51 0 1 10 Hz to 10 Hz Noise 0 01 Vsy 2 5V Ay 1 f 1kHz RL 10kQ 0 001 0 001 0 01 0 1 1 AMPLITUDE V p p Figure 52 THD Noise vs Amplitude 09437 050 FRE QUENCY Hz Figure 53 THD Noise vs Freq
15. density of the amplifier with no 1 f noise Source Resistance The ADA4528 1 is one of the lowest noise zero drift amplifiers with 5 6 nV VHz of broadband noise at 1 KHz Vsy 2 5 V and Av 100 currently available in the industry Therefore it is important to consider the input source resistance of choice to maintain a total low noise The total input referred broadband noise ex total from any amplifier is primarily a function of three types of noise input voltage noise input current noise and thermal Johnson noise from the external resistors These uncorrelated noise sources can be summed up in a root sum squared rss manner by using the following equation en total e 4 KTRs in x Rs where n is the input voltage noise of the amplifier V VHz I is the input current noise of the amplifier A VHz Rs is the total input source resistance Q k is the Boltzmann s constant 1 38 x 107 J K T is the temperature in Kelvin K Rev A Page 15 of 20 ADA4528 1 100 The total equivalent rms noise over a specific bandwidth is expressed as enms en total VBW where BW is the bandwidth in hertz This analysis is valid for broadband noise calculation If the bandwidth of concern includes the chopping frequency more complicated calculations must be made to include the effect of the noise spike at the chopping frequency see Figure 60 VOLTAGE NOISE DENSITY nV VHz
16. e Voltage Figure 13 Input Bias Current vs Common Mode Voltage 10 10 Vsy 2 5V Vs 5V 1 S 1 7 amp amp 8 i o 100m 100 A 40 C 40 o 25 o 25 gt gt 85 C 85 C 10m 25 10m _ 25 d n E 1m 4m E E E E 8 3 0 1m 0 1m 0 001 0 01 0 1 1 10 100 2 0 001 0 01 0 1 1 10 100 7 LOAD CURRENT mA LOAD CURRENT Figure 11 Output Voltage Vo to Supply Rail vs Load Current Figure 14 Output Voltage to Supply Rail vs Load Current Rev A Page 7 of 20 ADA4528 1 OUTPUT VOLTAGE VoL TO SUPPLY RAIL mV OUTPUT VOLTAGE Voy TO SUPPLY RAIL V OUTPUT VOLTAGE TO SUPPLY RAIL mV 10 Vsy 2 5V 1 100m 40 C 25 10m Ez 85 125 C 1m 0 1m 0 001 0 01 0 1 1 10 100 LOAD CURRENT mA Figure 15 Output Voltage Vox to Supply Rail vs Load Current TEMPERATURE C Figure 16 Output Voltage to Supply Rail vs Temperature 25 Vey 2 5V 2kQ 20 15 10 R 10kQ 5 0 50 25 0 25 50 75 100 125 TEMPERATURE C Figure 17 Output Voltage Von to Supply Rail vs Temperature 09437 016 09437 015
17. ead Lead Frame Chip Scale Package LFCSP_WD 3mm x 3 mm Body Very Very Thin Dual Lead CP 8 12 Dimensions shown in millimeters 07 06 2011 A ORDERING GUIDE Model Temperature Range Package Description Package Option Branding ADA4528 1ARMZ 40 C to 125 C 8 Lead Mini Small Outline Package MSOP RM 8 A2R ADA4528 1ARMZ R7 40 C to 125 C 8 Lead Mini Small Outline Package MSOP RM 8 A2R ADA4528 1ARMZ RL 40 C to 125 C 8 Lead Mini Small Outline Package MSOP RM 8 A2R ADA4528 1ACPZ R7 40 C to 125 8 Lead Lead Frame Chip Scale Package LFCSP WD CP 8 12 A2R ADA4528 1ACPZ RL 40 C to 125 C 8 Lead Lead Frame Chip Scale Package LFCSP_WD CP 8 12 A2R 17 RoHS Compliant Part Rev A Page 18 of 20 ADA4528 1 NOTES Rev A Page 19 of 20 ADA4528 1 NOTES 2011 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners DEVICES isi du debi Rev A Page 20 of 20
18. features rail to rail input and output with a supply voltage from 2 2 V to 5 5 V Figure 57 shows the input and output waveforms of the ADA4528 1 configured as a unity gain buffer with a supply voltage of 2 5 V and a resistive load of 10 With an input voltage of 2 5 V the ADA4528 1 allows the output to swing very close to both rails Additionally it does not exhibit phase reversal ADA4528 1 ap AL VOLTAGE V Vey 2 5 1 R 10 09437 059 TIME 200ys DIV Figure 57 Rail to Rail Input and Output NOISE CONSIDERATIONS 1 f noise 1 f noise also known as pink noise or flicker noise is inherent in semiconductor devices and increases as frequency decreases At low frequency 1 f noise is a major noise contributor and causes a significant output voltage offset when amplified by the noise gain of the circuit However the ADA4528 1 eliminates the 1 f noise internally thus making it an excellent choice for dc or subhertz high precision applications The 0 1 Hz to 10 Hz am plifier voltage noise is only 97 nV p p Av 100 at 2 5 V of supply voltage The low frequency 1 f noise appears as a slow varying offset to the ADA4528 1 and is greatly reduced by the chopping technique This allows the ADA4528 1 to have a much lower noise at dc and low frequency in comparison to standard low noise amplifiers that are susceptible to 1 f noise Figure 46 and Figure 49 show the voltage noise
19. losed loop gain decreases from 1000 to 1 Figure 59 shows the voltage noise density vs frequency of the ADA4528 1 for three different gain configurations The ADA4528 1 offers lower input voltage noise density of 6 nV VHz to 7 nV VHz regardless of gain amplifier configurations ic 24 Vsy 5V Ay 2 Vom Vsy 2 20 E E 16 5 2 a A 40 A 12 2 o a z 2 g E 8 d gt 9 4 a 1 amp 1 10 100 1k 10k 1400k 1M 10M 0 09437 063 1 10 100 100 CLOSED LOOP GAIN V V FREQUENCY Hz Figure 60 Voltage Noise Density Figure 58 Competitor A Voltage Noise Density vs Closed Loop Gain Rev A Page 16 of 20 PRINTED CIRCUIT BOARD LAYOUT The ADA4528 1 is a high precision device with ultralow offset voltage and noise Therefore care must be taken in the design of the printed circuit board PCB layout to achieve optimum performance of the ADA4528 1 at board level To avoid leakage currents keep the surface of the board clean and free of moisture Coating the board surface creates a barrier to moisture accumulation and reduces parasitic resistance on the board Properly bypassing the power supplies and keeping the supply traces short minimizes power supply disturba
20. nces caused by output current variation Connect bypass capacitors as close as possible to the device supply pins Stray capacitances are a concern at the outputs and the inputs of the amplifier It is recommended that signal traces be kept at a distance of at least 5 mm from supply lines to minimize coupling A potential source of offset error is the Seebeck voltage on the circuit board The Seebeck voltage occurs at the junction of two dissimilar metals and is a function of the temperature of the junction The most common metallic junctions on a circuit board are solder to board trace and solder to component lead Figure 61 shows a cross section of a surface mount component soldered to a PCB A variation in temperature across the board where Ta Taz causes a mismatch in the Seebeck voltages at the solder joints thereby resulting in thermal voltage errors that degrade the per formance of the ultralow offset voltage of the ADA4528 1 ADA4528 1 COMPONENT LEAD 2 SOLDER SURFACE MOUNT COMPONENT aA PC BOARD Ta COPPER IF Taq Taz THEN 2 TRACE Vrs4 Vsci Vrs2 Vsc2 Ej Figure 61 Mismatch in Seebeck Voltages Causes Seebeck Voltage Error To minimize these thermocouple effects orient resistors so that heat sources warm both ends equally Where possible the input signal paths should contain matching numbers and types of com ponents to match the number and type of thermocouple junctions For e
21. ncy 09437 021 PHASE Degrees 09437 026 Isy PER AMPLIFIER mA 120 90 OPEN LOOP GAIN dB e 09437 022 CLOSED LOOP GAIN dB Rev A Page 9 of 20 ADA4528 1 2 0 1 8 1 6 P 14 12 1 0 50 25 0 25 50 75 100 125 TEMPERATURE C Figure 24 Supply Current vs Temperature 135 PHASE 90 45 GAIN 0 Vsy 5V 10kQ 45 C 100pF 90 1k 10k 100k 1M 10M FREQUENCY Hz Figure 25 Open Loop Gain and Phase vs Frequency 10 100 1k 10k 100k 1M FREQUENCY Hz Figure 26 Closed Loop Gain vs Frequency 09437 024 PHASE Degrees 09437 029 09437 025 ADA4528 1 160 Voy 2 5V 140 120 100 _ g amp 5 80 x 60 Q 40 Vem Vsy 2 Vem 1 1 0 100 1k 10k 100k 1M 10M FREQUENCY Hz Figure 27 CMRR vs Frequency 120 Voy 2 5V
22. oise of 97 nV p p 0 1 Hz to 10 Hz Av 100 the Single ANAN AAEN AE ADA4528 1 is well suited for applications in which error sources ADA4051 2 AD8629 AD8639 cannot be tolerated AD8539 The ADA4528 1 has a wide operating supply range of 2 2 V to Quad AD8630 5 5 V high gain and excellent CMRR and PSRR specifications that make it ideal for precision amplification of low level signals 1 www analog com for a selection of zero drift operational amplifiers such as position and pressure sensors strain gages and medical instrumentation The ADA4528 1 is specified over the extended industrial temperature range 40 C to 125 C and is available in an 8 lead MSOP and an 8 lead LFCSP package For more information on the ADA4528 1 refer to AN 1114 Lowest Noise Zero Drift Amplifier Has 5 6 nV VHz Voltage Noise Density Rev A Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result fromits use Specifications subject to change without notice No One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A license is granted by implication or otherwise under any patent or patent rights of Analog Devices Tel 781 329 4700 www analog com Trademarks and registered trademarks are the property of their respective owners Fax 781 46
23. pecified Table 3 Parameter Symbol Test Conditions Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage Vos Vem OV to 5V 0 3 2 5 uV 40 C lt Ta lt 125 C 4 uV Offset Voltage Drift AVos AT 40 C lt Ta lt 125 C 0 002 0 015 Input Bias Current ls 90 200 pA 40 C lt Ta lt 125 C 300 pA Input Offset Current los 180 400 pA 40 C lt Ta lt 125 C 500 pA Input Voltage Range 0 5 V Common Mode Rejection Ratio CMRR Vcn 2 OVto 5V 137 160 dB 40 C lt TA lt 125 122 dB Open Loop Gain Avo Ri 10 kO Vo 2 0 1 V to 4 9 V 127 139 dB 40 C x TA lt 125 125 dB 2 Vo 0 1 V to 4 9 V 121 131 dB 40 C x TA lt 125 120 dB Input Resistance Differential Mode Rinom 190 kQ Input Resistance Common Mode Rincm 1 GO Input Capacitance Differential Mode Cinom 16 5 pF Input Capacitance Common Mode Cincm 33 pF OUTPUT CHARACTERISTICS Output Voltage High Vou Ri 10 to Vem 4 99 4 995 V 40 C lt TA lt 125 4 98 V 2 to Vem 4 96 498 V 40 C lt TA lt 125 4 94 V Output Voltage Low VoL Ri 10 to Vem 5 10 mV 40 C lt Ta lt 125 C 20 mV 2 to Vem 20 40 mV 40 C lt Ta lt 125 C 60 mV Short Circuit Current Isc 40 mA Closed Loop Output Impedance Zout 1 2 Av 10 0 1 Q POWER SUPPLY Power Supply Rejection Ratio PSRR 2 2 V to 5 5 V 130 150 dB 40 C lt TA lt 125
24. uency 10 09437 152 THD N 09437 056 Rev A Page 14 of 20 Vey 5V Ay 100 Vom Vsy 2 INPUT VOLTAGE 20nV DIV TIME 1s DIV Figure 54 0 1 Hz to 10 Hz Noise 09437 053 10 1 0 1 Vsy 5V 0 01 Ay 1 f 1kHz 10kQ 0 001 0 001 0 01 0 1 1 10 AMPLITUDE V p p Figure 55 THD Noise vs Amplitude 1 Vsy 5V 10kQ Ay 1 80kHz LOW PASS FILTER Vin 2V p p 0 1 0 01 0 001 10 100 1k 10k 100k FREQUENCY Hz Figure 56 THD Noise vs Frequency 09437 155 09437 057 APPLICATIONS INFORMATION The ADA4528 1 is a precision ultralow noise zero drift opera tional amplifier that features a patented chopping technique This chopping technique offers ultralow input offset voltage of 0 3 uV typical and input offset voltage drift of 0 002 uV C typical Offset voltage errors due to common mode voltage swings and power supply variations are also corrected by the chopping tech nique resulting in a typical CMRR figure of 158 dB and a PSRR figure of 150 dB at 2 5 V supply voltage The ADA4528 1 has low broadband noise of
25. xample dummy components such as zero value resistors can be used to match the thermoelectric error source real resistors in the opposite input path Place matching components in close proximity and orient them in the same manner to ensure equal Seebeck voltages thus cancelling thermal errors Additionally use leads that are of equal length to keep thermal conduction in equilibrium Keep heat sources on the PCB as far away from amplifier input circuitry as is practical It is highly recommended to use a ground plane A ground plane helps distribute heat throughout the board maintains a constant temperature across the board and reduces EMI noise pickup Rev A Page 17 of 20 ADA4528 1 OUTLINE DIMENSIONS 3 20 3 00 2 80 1 IDENTIFIER p 0 65 BSC 0 95 15 MAX 0 85 1 10 MAX us SS L L 0 80 o15 E ef 1 023 oss 0 05 525 0 09 0 40 COPLANARITY 0 10 PIN 1 INDEX AREA 10 07 2009 B COMPLIANT TO JEDEC STANDARDS MO 187 AA Figure 62 8 Lead Mini Small Outline Package MSOP RM 8 Dimensions shown in millimeters 0 50 0 40 0 30 PIN TOP VIEW BOTTOM VIEW INDICATOR R 0 15 0 80 FOR PROPER CONNECTION OF 0 75 0 05 MAX THE EXPOSED PAD REFER TO 0 02 NOM THE PIN CONFIGURATION AND 0 70 FUNCTION DESCRIPTIONS HOH COPLANARITY SECTION OF THIS DATA SHEET SEATING 0 30 PLANE 0 25 gt 203 0 20 COMPLIANT TO JEDEC STANDARDS MO 229 WEED Figure 63 8 L

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