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ANALOG DEVICES AD8226 English handbook

1. 100 to 1000 0 6 0 6 uV Current Noise f 1 kHz 100 100 fA VHz 0 1 Hz to 10 Hz 3 3 pA p p VOLTAGE OFFSET Total offset voltage Vos Voso G Input Offset Vos a a 500 uV Over Temp uV Average Output Offset Voso VTE 0 15 uV Over Temperature Tun tO Tmax mV Average temperature coefficient Ta tO 2 15 2 7 uV C Offset RTI vs Supply PSR Vs 5Vto 15 V G 1 80 90 dB G 10 100 105 dB G 100 105 105 dB 1000 105 105 dB INPUT CURRENT Input Bias Current 10 20 30 10 20 30 nA Over Temperature tO Tmax 5 40 5 40 nA Average temperature coefficient tO 100 100 Input Offset Current 3 2 nA Over Temperature Tum tO Tmax 5 5 nA Average temperature coefficient tO Tmax 5 5 pA C REFERENCE INPUT Ry 100 100 lin 7 7 Voltage Range Vs V Vs Vs V Reference Gain to Output 1 1 VV Reference Gain Error 0 01 0 01 Rev PrA Page 3 of 16 AD8226 A C Grade B Grade Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC RESPONSE Small Signal 3 dB Bandwidth G 1 1000 1000 kHz G 10 150 150 kHz G 100 15 15 kHz 1000 1 5 1 5 kHz Settling Time 0 01 10 V step G 1 22 22 us G 10 22 22 us G 100 50 50 us G 1000 600 600 us Slew Rate G 1 0 5 0 5 V us G 5to 100 1 1 V us GAIN G 1 49 4kO R Gain Range 1 1000 1 1000 V V Gain Error 10 V G 1
2. 3 Simplified Schematic ARCHITECTURE The AD8226 is based on the classic three op amp topology This topology has two stages a preamplifier to provide differential amplification followed by a difference amplifier to remove the common mode voltage Figure 3 shows a simplified schematic of the AD8226 The first stage works as follows in order to maintain a constant voltage across the Bi istor Ry A Node 3 ac Similarly above the negative input voltage Therefore a replica of the differential input voltage is placed across the gain setting resistor The current that flows across this resistance must also flow through the R1 and R2 resistors creating a gained differential signal between the A2 and A1 outputs Note that in addition to a gained differential signal the original common mode signal shifted a diode drop down is also still present The second stage is a difference amplifier composed of A3 and four 50 resistors The purpose of this stage is to remove the common mode signal from the amplified differential signal Because the input amplifiers employ a current feedback architecture the gain bandwidth product of the AD8226 increases with gain resulting in a system that does not suffer from the expected bandwidth loss of voltage feedback architectures at higher gains The transfer function of the AD8226 is Vour G Vins Vi where 49 4 kO G G 1 GAIN SELECTION Placing a resistor a
3. TC Tun tO Tmax 5 5 pA C REFERENCE INPUT 100 100 lin 7 7 Voltage Range Vs V Vs Vs V Reference Gain to Output 1 1 VV Reference Gain Error 0 01 0 01 DYNAMIC RESPONSE Small Signal 3 dB Bandwidth G 1 1000 1000 kHz G 10 150 150 kHz G 100 15 15 kHz 1000 1 5 1 5 kHz Rev PrA Page 5 of 16 AD8226 A C Grade B Grade Parameter Conditions Min Typ Max Min Unit Settling Time 0 01 2V step G 1 22 22 us G 10 22 22 us 100 50 50 us G 1000 600 600 us Slew Rate G 1 0 5 0 5 V us G 5to 100 1 1 V us GAIN G 1 49 4 Gain Range 1 1000 1 1000 VV Gain Error Vout 0 V to 1 7 V G 1 0 07 0 02 G 10 0 3 0 1 G 100 0 3 0 1 1000 0 3 0 1 Gain Nonlinearity Vout 0 V to 1 7 V G 1 10kO ppm G 100 10kO ppm G 1000 10kO ppm 1 100 2kO Gain vs Temperature G 1 Tun tO Tmax 2 10 2 5 ppm C G 1 tO Tmax 50 50 ppm C INPUT OV V 2 7 V to 36V Input Impedance Differential 2 2 GO pF Common Mode gt 2112 Input Operatin T4 C 0 1 V aoed B 0 15 C V T 105 C 0 05 V 0 6 V Input Overvoltage Range tO Tmax V 40 40 OUTPUT OV V 2 7 V to 36V Output Swing 10 to opposite supply 0 2 V 0 2 0 2 Vs 02 V Over Temperature tO Tmax 0 3 V 0 3 0 3 03 V Output Swing R 100 kQ to opposit
4. the boundaries where the part operates with best performance GAIN V 04V lt Voy lt V 09V The common mode input range shifts upwards with temper ature At cold temperatures the part requires an extra 200 mV of headroom from the positive supply and operation near the negative supply has more margin Conversely hot temperatures require less headroom from the positive supply but are the worst case conditions for input voltages near the negative supply LAYOUT To ensure optimum performance of the AD8226 at the PCB level care must be taken in the design of the board layout The AD8226 pins are arranged in a logical manner to aid in this task TOP VIEW Not to Scale 07036 005 Figure 5 Pinout Diagram Common Mode Rejection Ratio over Frequency converted to differe Such frequency esponse 1s d RR across frequency high input source impedance and capacitance of each path should be closely matched Additional source resistance in the input path for example for input protection should be placed close to the in amp inputs which minimizes their interaction with parasitic capacitance from the PCB traces Parasitic capacitance at the gain setting pins can also affect CMRR over frequency If the board design has a component at the gain setting pins for example a switch or jumper the part should be chosen so that the parasitic capacitance is as small as possi
5. the higher performance version and is specified from 40 C to 85 C The C grade version is the higher temperature version and is specified from 40 C to 105 C All models are operational from 40 C to 125 C behavior at these temperatures is shown in the typical performance curves The AD8226 is available in MSOP and SOIC packages Rev PrA Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners Table 1 Instrumentation Amplifiers by Category General Zero Military Low High Speed Purpose Drift Grade Power PGA AD8220 AD8231 AD620 AD627 AD8250 AD8221 AD8290 AD621 AD623 AD8251 AD8222 AD8293 AD524 AD8226 AD8253 AD8224 AD8553 AD526 AD8228 AD8556 AD624 AD8557 1 Rail to rail output One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2008 Analog Devices Inc All rights reserved AD8226 TABLE OF CONTENTS Features aap yawa aa aha ss 1 Architecture a enn rr D qa ua 9 Appl
6. 0 07 0 02 G 10 0 3 0 1 G 100 0 3 0 1 G 1000 0 3 0 1 Gain Nonlinearity Vout 10 V to 10 V G 1 10 kO G 100 R 10 G 1000 R 10 G 1 100 200 Gain vs Temperature G 1 2 10 G 1 T to 50 INPUT V 1 35 V to 36 V Input Impedance Differential 2 2 2 2 GO pF Common Mode 2 2 2 2 GO pF Input Operating Voltage Range 25 C 0 1 Vs 0 7 Vs 0 1 V 0 7 V T 40 C V 0 15 41V 09 V 0 15 4V 09 V T 105 C V 0 05 0 6 0 05 4V 06 V Input Overvoltage Range tO Tmax V 40 40 V 40 40 V OUTPUT Vs 1 35 V to 36 V Output Swing 10 kO to ground 0 2 V 0 2 V 0 2 0 2 V Over Temperature tO Tmax Vs 0 3 V 0 3 0 3 V 0 3 V Output Swing 100 to ground 0 1 1V 0 1 0 1 Vs 0 1 V Over Temperature tO Tmax Vs 0 1 V 01 V 0 1 0 1 V Short Circuit Current 13 13 mA POWER SUPPLY Operating Range Dual supply operation 213 218 213 218 V Quiescent Current 350 400 350 400 Over Temperature to Tmax TEMPERATURE RANGE Specified Performance Tmn to Tmax and grades 40 85 40 85 grade 40 105 Operational 40 125 40 125 C Does not include the effects of external resistor 2 Input voltage range of the AD8226 input stage Inp
7. ANALOG DEVICES Wide Supply Range Rail to Rail Output Instrumentation Amplifier AD8226 FEATURES Gain set with 1 external resistor Gain range 1 to 1000 Input voltage goes to ground Input overdrive protection Very wide power supply range Dual supply 1 3 V to 18 V Single supply 2 6 V to 36 V Bandwidth G 1 800 kHz CMRR G 1 78 dB minimum Input noise 22 nV rt Hz Typical supply current 350 pA SOIC 8 and MSOP 8 packages APPLICATIONS Industrial process controls Bridge amplifiers Medical instrumentation Portable data acquisition Multichannel systems PIN CONFIGURATION TOP VIEW Not to Scale 07036 001 Figure 1 co AWAY C com The AD8226 is a low cost instrumentation amplifier that requires only one external resistor to set any gain between 1 and 1000 The AD8226 is designed to work with a very wide range of voltages It can operate on supplies ranging from 1 2 V to 18 V 2 4 V to 36 V single supply The AD8226 comes with rail to rail output and a wide input range that includes the ability to go slightly below the negative supply In addition the AD8226 inputs can withstand voltages beyond the rail The AD8226 is perfect for multichannel space constrained applications Being a low power and low cost amplifier allows multiple channels to be used The AD8226 has three grades The A grade is the lower cost version and is specified for temperatures from 40 C to 85 C The B grade is
8. IONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 10 8 Lead Standard Small Outline Package SOIC_N Narrow Body R 8 Dimensions shown in millimeters and inches Rev PrA Page 12 of 16 012407 A AD8226 ORDERING GUIDE Model Temperature Range Package Description PackageOption Branding AD8226ARMZ 40 to 85 C 8 Lead MSOP RM 8 Y16 AD8226ARMZ RL 40 to 85 C 8 Lead MSOP 13 Tape and Reel RM 8 Y16 AD8226ARMZ R7 40 to 85 C 8 Lead MSOP 7 Tape and Reel RM 8 Y16 AD8226ARZ 40 to 85 C 8 Lead SOIC_N R 8 AD8226ARZ RL 40 to 85 C 8 Lead SOIC_N 13 Tape and Reel R 8 AD8226ARZ R7 40 to 85 C 8 Lead SOIC_N 7 Tape and Reel R 8 AD8226BRMZ 40 to 85 C 8 Lead MSOP 8 YIM AD8226BRMZ RL 40 to 85 C 8 Lead MSOP 13 Tape and Reel RM 8 AD8226BRMZ R7 40 to 85 C 8 Lead MSOP 7 Tape and Reel RM 8 YIM AD8226BRZ 40 to 85 C 8 Lead SOIC_N R 8 AD8226BRZ RL 40 to 85 C 8 Lead SOIC_N 13 Tape and Reel R 8 AD8226ARZ R7 40 to 85 C 8 Lead SOIC_N 7 Tape and Reel R 8 AD8226CRMZ 40 to 105 C 8 Lead MSOP 8 Y1Y AD8226CRMZ RL 40 to 105 C 8 Lead MSOP 13 Tape and Reel RM 8 Y1Y AD8226CRMZ R7 40 to 105 C 8 Lead MSOP 7 Tape and Reel RM 8 Y1Y AD8226CRZ 40 to 105 C 8 Lead SOIC_N R 8 AD8226CRZ RL 40 to 105 C 8 Le
9. ad SOIC_N 13 Tape and Reel R 8 AD8226CRZ R7 40 to 105 C 8 Lead SOIC_N 7 Tape and Reel R 8 17 RoHS Compliant Part ww C com Rev PrA Page 13 of 16 AD8226 NOTES ww com ALI AD8226 NOTES ww com ALI AD8226 NOTES ww com ALI 2008 Analog Devices Inc All rights reserved Trademarks and AN ALOG registered trademarks are the property of their respective owners PRO7036 0 10 08 PrA DEVICES www analog com Rev PrA Page 16 of 16
10. ards can discharge ESD without detection Although this product features patented or proprietary protection circuitry damage Human Body Model 2 kV may occur on devices subjected to high energy ESD Charge Device Model 1kV Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Temperature range for specified performance is either 40 to 85 C or 40 to 105 C depending on grade Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for C AU device reliabili Rev PrA Page 7 of 16 AD8226 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TOP VIEW Not to Scale 07036 002 Figure 2 Pin Configuration Table 6 Pin Function Descriptions Pin No Mnemonic Description 1 IN Negative Input 2 3 Re Gain Setting Pins Place gain resistor between these two pins 4 IN Positive Input 5 V Negative Supply 6 REF Reference Must be driven by low impedance 7 Vour Output 8 V Positive Supply ww C com Rev PrA Page 8 of 16 THEORY OF OPERATION GAIN STAGE AD8226 DIFFERENCE AMPLIFIER STAGE 07036 003 Figure
11. ble Power Supplies A stable dc voltage should be used to power the instrumenta tion amplifier Noise on the supply pins can adversely affect performance 0 1 uF capacitor should be placed as close as possible to each supply pin As shown in Figure 6 a 10 tantalum capacitor can be used farther away from the part In most cases it can be shared by other precision integrated circuits Rev PrA Page 10 of 16 AD8226 RADIO FREQUENCY INTERFERENCE RFI RF rectification is often a problem when amplifiers are used in applications having strong RF signals The disturbance can appear as a small dc offset voltage High frequency signals can be filtered with a low pass RC network placed at the input of the instru mentation amplifier as shown in Figure 8 The filter limits the input signal bandwidth according to the following relationship 1 FilterFrequenc CO 0 1 5 1 Vs 5 2nRCc Figure 6 Supply Decoupling REF and Output Referred to Local Ground References where Cp gt 10 Cc Vs The output voltage of the AD8226 is developed with respect to the potential on the reference terminal Care should be taken to tie REF to the appropriate local ground INPUT BIAS CURRENT RETURN PATH The input bias current of the AD8226 must have a return path to ground When the source such as a thermocouple cannot provide a return current
12. cross the terminals sets the gain of the AD8226 which can be calculated by referring to Table 7 or by using the following gain equation Tabl 1 100 49 9 The AD8226 defaults to G 1 when no gain resistor is used The tolerance and gain drift of the R resistor should be added to the AD8226 s specifications to determine the total gain accuracy of the system When the gain resistor is not used gain error and gain drift are minimal INPUT PROTECTION The input terminals of the AD8226 have input protection that allows the input voltage to go beyond the rails without damaging the part Maximum voltage is Vs 40 V and minimum voltage is Vs 40 V For example with 15 V supplies the part can withstand input voltages of 25 V with a 5 V single supply maximum input voltage is 40 V and minimum input voltage is 35 V Rev PrA Page 9 of 16 AD8226 REFERENCE TERMINAL The output voltage of the AD8226 is developed with respect to the potential on the reference terminal This is useful when the output signal needs to be offset to a precise midsupply level For example a voltage source can be tied to the REF pin to level shift the output so that the AD8226 can drive a single supply ADC The REF pin is protected with ESD diodes and should not exceed either V or by more than 0 3 V For the best performance source impedance to the REF terminal should be kept below 2 As shown in Figure 3 the refer
13. e supply 0 1 V 0 1 0 1 Vs 0 1 V Over Temperature tO Tmax 0 1 tV 0 1 0 1 Vs 0 1 V Short Circuit Current 13 13 mA POWER SUPPLY Operating Range Single supply operation 2 6 36 2 6 36 V Quiescent Current 300 350 300 350 Over Temperature tO Tmax Specified Performance Tmn to Tmax and grades 40 85 40 85 C grade 40 4105 Operational 40 125 40 4125 Does not include the effects of external resistor 2 Input voltage range of the AD8226 input stage Input range depends on common mode voltage differential voltage gain and reference voltage See the Input Voltage Range section in the Theory of Operation for more information Rev PrA Page 6 of 16 AD8226 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4 Rating is specified for a device in free air Supply Voltage 18V Table 5 Output Short Circuit Current Indefinite Package M Unit MaximumValtageat IN or IN NSE AOV 8 Lead MSOP 4 Layer JEDEC Board 135 Minimum Voltage at IN or IN 8 Lead SOIC 4 Layer Board 121 C W REF Voltage Vs Differential Input Voltage 40V Storage Temperature Range 65 to 150 C ESD CAUTION Operating Temperature Range 40 to 125 C ESD electrostatic discharge sensitive device Maximum Junction Temperature 140 C Charged devices and circuit bo
14. ence terminal REF is at one end ofa 50 resistor Additional impedance at the REF terminal adds to this 50 resistor and results in amplification of the signal connected to the positive input The amplification from the additional Ray be computed by 2 50 Rger 100 Ry Only the positive signal path is amplified the negative path is unaffected This uneven amplification degrades CMRR INCORRECT CORRECT AD82 RE 26 F Figure 4 Driving the Reference Pin INPUT VOLTAGE RANGE The three op amp architecture of the AD8226 applies gain in the first stage before removing common mode voltage in the difference amplifier stage In addition the input transistors in the first stage shift the common mode voltage up one diode drop about 650 mV Therefore internal nodes between the first and second stages nodes 1 and 2 in Figure 3 experience a combination of gained signal common mode signal and 650 mV This combined signal can be limited by the voltage supplies even when the individual input and output signals are not Figure XX through Figure XX show the allowable common mode input voltage ranges for various output voltages and supply voltages The following formulas can also be used to understand how the reference voltage pgr common mode input voltage V and differential input voltage V pirr interact These two formulas along with the input range specifications in Table 1 and Table 3 set
15. ications pu pa u S aa R shua usa 1 Gain Selectiond s es ene D RN 9 Pin Configurationi ceti e 1 Input Protectio iesiri 9 General Description ananassa G ha 1 Reference Terminal e teinte 10 Specificationis ice ENDE KKE E 3 Input Voltage Range eerte tentent 10 Absolute Maximum Ratings eerte 7 Layouts atau E 10 Thermal Resistance irridet ties 7 Input Bias Current Return Path sss 11 ESD Caution i ERE cake Glance 7 Radio Frequency Interference RFI sss 11 Pin Configuration and Function Descriptions 8 Outline 12 Theory of Operation 9 Ordering Guide uqa eee 13 ww C comi Rev PrA Page 2 of 16 SPECIFICATIONS V 15 15 V 0 V T 25 C G 1 10 unless otherwise noted AD8226 Table 2 A C Grade B Grade Parameter Conditions Min Typ Max Min Typ Max Unit COMMON MODE REJECTION RATIO CMRR CMRR DC to 60 Hz Vom 10 V to 10 V G 1 76 86 dB G 10 90 100 dB G 100 105 105 dB G 1000 105 105 dB NOISE Total Noise ey Ven evo G2 Voltage Noise 1 kHz Input Voltage Noise ey Viner Vins Veer 0 22 22 nV 4Hz Output Voltage Noise 120 120 nV 4Hz RTI 0 1 Hzto 10 Hz Gz1 3 3 LV G 10 0 8 0 8 uV p p
16. path one should be created as shown in Figure 7 INCORRECT CORRECT 07036 008 C affects the difference signal and affects the common mode signal Values of R and should be chosen to minimize RFI Mismatch between the R x Cc at the positive input and the R x at the negative input degrades the CMRR of the AD8226 By using a value of one magnitude larger than the effect of the TRANSFORMER ng mismatch is reduced and performance is improved Vs AD8226 REF V Vs THERMOCOUPLE THERMOCOUPLE Vs Vs c 1 AD8226 1 276 c REF V Vs CAPACITIVELY COUPLED CAPACITIVELY COUPLED Figure 7 Creating Path Rev PrA Page 11 of 16 AD8226 OUTLINE DIMENSIONS 0 85 1 10 MAX 0 75 t Y 015 oss 0 23 1 f E gt 000 022 0 08 9 0 40 COPLANARITY SEATING 0 10 PLANE COMPLIANT TO JEDEC STANDARDS MO 187 AA Figure 9 8 Lead Mini Small Outline Package MSOP RM 8 Dimensions shown in millimeters 5 00 0 1968 4 80 0 1890 4 8 5 4 00 0 1574 6 20 0 2441 3 80 0 228 1 2740 0500 5 1 75 0 0 25 0 0098 1 35 0 0532 0 10 0 0040 COPLANARITY 0 51 0 0201 lhe 0 10 0 31 0 0122 0 25 0 0098 1 27 0 0500 SEATING 29 59 0 40 0 0157 PLANE 0 17 0 0067 COMPLIANT TO JEDEC STANDARDS MS 012 AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENS
17. ut range depends on common mode voltage differential voltage gain and reference voltage See the Input Voltage Range section in the Theory of Operation for more information Rev PrA Page 4 of 16 AD8226 V 2 7 V 20V Vg 0 V Ty 25 C G 1 10 unless otherwise noted Table 3 A C Grade B Grade Parameter Conditions Min Typ Max Min Typ Unit COMMON MODE REJECTION RATIO CMRR CMRR DC to 60 Hz Vom 0Vto 1 7 V G 1 76 86 dB G 10 90 100 dB G 100 105 105 dB 1000 105 105 Total Noise y Ven evo G2 Voltage Noise 1 kHz Input Voltage Noise ey Viner Vins Vrer 0 22 22 nV 4Hz Output Voltage Noise euo 120 120 nV VHz RTI 0 1 Hz to 10 Hz G 1 3 3 uV G 10 0 8 0 8 uV 100 to 1000 0 6 0 6 uV Current Noise f 1kHz 100 100 fA VHz 0 1 Hz to 10 Hz 3 3 pA VOLTAGE OFFSET Total offset voltage Vos Voso G Input Offset Vos V 20Vto 17V 300 150 uV Over Temperature tO Tmax uV Average TC 0 1 4 2 uV C Output Offset 750 uV Average A 7 uV C Offset RTI vs Supply PSR V 20Vto 17V Gz1 80 90 dB G 10 100 105 dB G 100 105 105 dB G 1000 105 105 dB INPUT CURRENT Input Bias Current 10 20 30 10 20 30 nA Over Temperature tO Tmax 5 40 5 40 nA Average TC tO Tmax 100 100 pA C Input Offset Current 3 2 nA Over Temperature tO Tmax 5 5 nA Average

ANALOG DEVICES AD8226 English handbook

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