Home

ANALOG DEVICES ADA4960-1 handbook

1. 40 35 o A 3 z D o 30 E g tc o g o a 25 20 g x 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz E FREQUENCY MHz Figure 11 OIP3 vs Frequency at Av 6 dB Av 12 dB and Av 18 dB Figure 14 Two Tone IMD3 vs Frequency at Ta 40 C Ta 25 C and Vour 0 45 V p p Tone 2 MHz Spacing Ta 85 C Av 6 dB Vovr 0 45 V p p Tone 2 MHz Spacing 40 35 Ta 40 C Ta 25 C S kJ 2 S 2 30 Ta 85 C E 5 o a 25 20 E 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz E FREQUENCY MHz 3 Figure 12 OIP3 vs Frequency at Av 6 dB Ta 40 C Ta 25 C and Figure 15 HD2 vs Frequency at Av 6 dB Av 12 dB and Av 18 dB Ta 85 C Vour 0 45 V p p Tone 2 MHz Spacing Vour 0 9 V p p 60 65 Ay 6dB A g 7 kJ iJ z g 75 E E tc o fe 5 5 Ay 12dB a a 80 Ay 18dB 85 S 90 S 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 10007 FREQUENCY MHz FREQUENCY MHz Figure 13 Two Tone IMD3 vs Frequency Av 6 dB Av 12 dB and Av 18 dB Figure 16 HD3 vs Frequency at Av 6 dB Av 12 dB and Av 18 dB Vour 0 9 V p p Tone 2 MHz Spacing Vour 0 9 V p p Rev 0 Page 9 of 20 ADA4960 1 DISTORTION dBc THIRD HARMONIC DISTORTION 65 L j 22 24 d at deepse
2. 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_WQ CP 16 27 1 500 H23 Z RoHS Compliant Part Rev 0 Page 19 of 20 ADA4960 1 NOTES 2010 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners Berea DEVICES TT Rev 0 Page 20 of 20
3. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4 Pin Function Descriptions NOTES 13 VOCM TOP VIEW Not to Scale 1 NC NO CONNECT 2 EXPOSED PAD MUST BE CONNECTED TO GND Figure 4 Pin Configuration 08458 003 ADA4960 1 Pin No Mnemonic 1 VIP Balanced Differential Input This pin is internally biased to VCC 2 2 IIP Gain Setting Resistor Connect RG between this pin and IIN 3 IIN Gain Setting Resistor Connect RG between this pin and IIP 4 VIN Balanced Differential Input This pin is internally biased to VCC 2 5 6 NC Leave these pins unconnected 7 8 9 12 VCC Positive 5 V Supply Pins 10 VON Balanced Differential Output This pin is biased to the VOCM input voltage 11 VOP Balanced Differential Output This pin is biased to the VOCM input voltage 13 VOCM This pin is internally biased at VCC 2 As an input this pin sets the dc VOP and VON voltages 14 15 GND Ground Connect this pin to a low impedance ground 16 PD This pin grounded disables the part and at 5 V this pin turns the part on EPAD The exposed pad must be connected to GND Rev 0 Page 7 of 20 ADA4960 1 TYPICAL PERFORMANCE CHARACTERISTICS VCC 5 V VOCM 2 5 V Ri 100 Q differential Av 6 dB Ci 1 pF differential f 140 MHz T 25 C Ay dB 08458 004 FREQUENCY GHz Figure 5 Small Signal Frequency Response Gain vs Fr
4. 1 V to OV step Av 12 GB Vout lt 1 6 7 ns Vin 1 V to OV step Av 12 GB Vout x 0 5 9 3 ns Reverse Isolation S12 f lt 1 GHz 68 dB INPUT OUTPUT CHARACTERISTICS Output Common Mode Vs 2 V VOCM Adjustment Range 1 2 75 V Input Common Mode Range 2 25 2 75 V Maximum Output Voltage Swing 1 dB compressed 3 5 V p p Output Common Mode Offset Referenced to VCC 2 20 10 mV Output Common Mode Drift 40 C to 85 C 0 05 mV C Output Differential Offset Voltage 36 422 mV Common Mode Rejection Ratio CMRR 60 dB Output Differential Offset Drift 40 C to 85 C 0 05 mV C Input Bias Current 40 C to 85 C 20 uA Input Resistance Differential Av all gains 10 kQ Input Capacitance Differential Av all gains 0 4 pF Input Resistance Single Ended Av all gains 5 kQ Input Capacitance Single Ended Av all gains 0 8 pF Output Resistance Differential 150 Q Output Capacitance Differential 1 2 pF POWER INTERFACE Supply Voltage 4 75 5 0 5 25 V ENB Threshold Low to high 2 2 V High to low 1 3 V ENB Input Bias Current ENB high 30 pA ENBL low 180 UA Quiescent Current ENB high 56 60 64 mA ENBL low 2 9 mA Rev 0 Page 3 of 20 ADA4960 1 Parameter Conditions Min Typ Max Unit NOISE HARMONIC PERFORMANCE 140 MHz Second Third Harmonic Distortion Av 6 dB Vour 0 9 V p p 91 73 dBc Av 12 dB Vout 0 9 V p p 86 73 dBc Av 18 dB Vout 0 9 V p p 82 72 dBc OIP3 IMD3 Av 6 GB Vout 0
5. Av 6 dB 11 6 dBm Av 12 dB 11 4 dBm Av 18 dB 11 0 dBm 750 MHz Second Third Harmonic Distortion Av 6 dB Vour 0 9 V p p 70 68 dBc Av 12 dB Vout 0 9 V p p 67 69 dBc Av 18 dB Vout 0 9 V p p 64 69 dBc OIP3 IMD3 Av 6 GB Vour 0 9 V p p composite 2 MHz spacing 128 3 67 dBm dBc Av 12 dB Vout 0 9 V p p composite 2 MHz spacing 27 7 67 dBm dBc Av 18 dB Vout 0 9 V p p composite 2 MHz spacing 26 9 65 dBm dBc Noise Spectral Density RTI Av 6dB 5 0 nV 4Hz Av 12 dB 3 0 nV 4Hz Av 18 dB 1 8 nV 4Hz 1 dB Compression Point RTO Av 6 dB 9 7 dBm Av 12 dB 9 5 dBm Av 18 dB 9 5 dBm Rev 0 Page 4 of 20 ADA4960 1 Parameter Conditions Min Typ Max Unit 1000 MHz Second Third Harmonic Distortion Av 6 dB Vour 0 9 V p p 73 72 dBc Av 12 dB Vout 0 9 V p p 69 78 dBc Av 18 dB Vout 0 9 V p p 67 85 dBc OIP3 IMD3 Av 6 GB Vout 0 9 V p p composite 2 MHz spacing 26 2 63 dBm dBc Av 12 dB Vout 0 9 V p p composite 2 MHz spacing 26 0 63 dBm dBc Av 18 dB Vout 0 9 V p p composite 2 MHz spacing 25 0 61 dBm dBc Noise Spectral Density RTI Av 6dB 4 8 nV 4Hz Av 12 dB 2 7 nV 4Hz Av 18 dB 1 6 nV 4Hz 1 dB Compression Point RTO Av 6 dB 8 0 dBm Av 12 dB 7 7 dBm Av 18 dB 7 6 dBm Rev 0 Page 5 of 20 ADA4960 1 ABSOLUTE MAXIMUM RATINGS Table 2 Parameter Rating Supply Voltage VCC 5 25V VIP VIN VC
6. Bandwidth Extension Figure 36 shows the bandwidth extension for 6 dB and 12 dB gains Figure 37 shows the recommended Cs values for most gains dB Cg 2 2pF 12 10 B 3 C z s 0 1pF 1 6 4 2 0 10 100 1k 10k 08458 031 FREQUENCY MHz Figure 36 Bandwidth Extension for 6 dB and 12 dB Gains 14 12 10 Ay dB 0 05 10 15 20 25 30 35 40 45 50 Cs pF Figure 37 Recommended Cs Values for Most Gains 08458 032 Rev 0 Page 15 of 20 ADA4960 1 ADC INTERFACING The ADA4960 1 is a high speed amplifier with linearity performance to drive high speed ADCs up to 1 GHz Several options are available to the designer to interface with an ADC The ADA4960 1 in Figure 38 is a differential input configuration using an input balun to provide the differential input signal The 25 Q resistors provide the input source match The ADA4960 1 outputs can be directly connected to the ADC inputs as long as the ADC input common mode is within the output common mode range of the ADA4960 1 The ADC Vc output pin is connected to the ADA4960 1 VOCM input pin to align the ADA4960 1 output voltages with the ADC inputs A 100 Q resistor across the outputs of the ADA4960 1 enhances system bandwidth and distortion performance when the ADA4960 1 is driving an ADC with high input impedance Lighter load resistance improves disto
7. MHz f 250 MHz f 500 MHz f 750 MHz f 1 GHz 08458 018 08458 019 ADA4960 1 60 65 1GHz 70 8 Ej kJ kJ z z 75 o o E E 6 S 80 E E o 500MHz a a 85 250MHz 90 0 95 05 06 07 08 09 10 11 12 13 14 1579 05 0 6 07 08 09 10 11 12 13 14 15 i Vout V p p E Vour V p p i Figure 23 HD3 vs Output Amplitude 250 MHz 500 MHz 1 GHz Figure 25 HD2 vs Vour 250 MHz 500 MHz and 1 GHz Av 6 dB Vout 0 9 V p p Av 6 dB Vour 0 9 V p p 0 096 0 072 _ 0 048 5 Z 0 024 0 g 0 024 2 3 6 8 3 TIME ns 3 TIME ns E Figure 24 Output Overdrive Vour vs Time Vw 1 V p p Av 12 dB Figure 26 Output Overdrive Recovery Vour vs Time Vin 1 Vp p Av 12 dB VOCM 24V Rev 0 Page 11 of 20 ADA4960 1 TEST CIRCUITS SINE WAVE BAND PASS ETC1 1 13 37 50 ETC1 1 13 GENERATOR FILTER 250 250 500 37 50 SPECTRUM ANALYZER 250 250 8 ETC1 1 13 00 leog l 250 l5o9 I I PULSE i 00 SOURCE l osciLLoscopE H 250 500 I I 08458 023 NETWORK NETWORK ANALYZER i ANALYZER 08458 024 Figure 29 S Parameter Test Circuit Rev 0 Page 12 of 20 CIRCUIT DESCRIPTION BASIC STRUCTURE The ADA4960 1 is a low noise fully differential amplifier ADC driver that uses a single 5 V supply at 60 mA This amplifier has buffered inputs that isolate the g
8. The ADA4960 1 has a nominal 150 Q differential output impedance The ADA4960 1 is optimized for wideband low distortion performance for frequencies up to and beyond 1 GHz These attributes together with its adjustable gain capability make this device the amplifier of choice for general purpose IF and broad band applications where low distortion noise and power are critical Rev 0 Information fumished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners FUNCTIONAL BLOCK DIAGRAM GND Q Q Q ADA4960 1 08458 001 Ay dB SLEW RATE V s 6 8700 12 7700 18 6600 Vout V 10 2 0 0 2 0 4 0 6 0 8 1 0 TIME ns Figure 2 Rise Time Vour 2 V p p Ta 25 C For Av 6 dB Av 12 dB and Av 18 dB 08458 047 The device is optimized for the best combination of slew rate bandwidth and broadband distortion These attributes allow it to drive a wide variety of ADCs It is ideally suited for driving mixers pin diode attenuators SAW filters and multi element discrete devices The user accessible
9. close to the device as possible Use 0 1 uF high frequency ceramic chip capacitors Provide low frequency bulk bypassing using 10 uF tantalum capacitors from each supply to ground Stray transmission line capacitance in combination with package parasitics can potentially form a resonant circuit at high frequencies resulting in excessive gain peaking or possible oscillation Signal routing should be short and direct to avoid such parasitic effects Provide symmetrical layout for complementary signals to maximize balanced performance Use radio frequency transmission lines to connect the driver and receiver to the amplifier Minimize stray capacitance at the input output pins by clearing the underlying ground and low impedance planes near these pins LLL A 6 E NT E V Yv ttt AP GROUND PLANE N POWER PLANE g Vtt MO W LUGE IK V Figure 45 Cross Section of a mem PCB Showing Thermal Via Connection to Buried Ground Plane WA NK ZZ SSS SSS S go gt 7771 E SN A SS SSSSSSSSSSSSSSSSSSSSSINNN NS If the driver receiver is more than one eighth of the wavelength from the amplifier the signal trace widths should be minimal This nontransmission line configuration requires the underlying and adjacent ground and low impedance planes to be cleared near the signal lines The exposed thermal paddle is internally connected to the ground pin of the amplifier Solder the paddle to the low im
10. package P is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive The quiescent power is the voltage between the supply pins Vs times the quiescent current Is The power dissipated due to the load drive depends upon the particular application The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device RMS voltages and currents must be used in these calculations Airflow increases heat dissipation effectively reducing 074 In addition more metal directly in contact with the package leads exposed pad from metal traces through holes ground and power planes reduce 9ja Figure 3 shows the maximum safe power dissipation of the ADA4960 1 vs the ambient temperature on a JEDEC standard 4 layer board 2 5 MAXIMUM POWER DISSIPATION 40 20 0 20 40 60 80 100 AMBIENT TEMPERATURE C 08458 002 Figure 3 Maximum Power Dissipation vs Ambient Temperature for 4 Layer Board ESD CAUTION ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge y Y without detection Although this product features patented or proprietary protection circuitry damage dy A may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Rev 0 Page 6 of 20
11. 9 V p p composite 2 MHz spacing 33 2 79 dBm dBc Av 12 dB Vout 0 9 V p p composite 2 MHz spacing 33 4 78 dBm dBc Av 18 dB Vout 0 9 V p p composite 2 MHz spacing 33 3 78 dBm dBc Noise Spectral Density RTI Av 6dB 54 nV 4Hz Av 12 dB 32 nV 4Hz Av 18 dB 2 1 nV 4Hz 1 dB Compression Point RTO Av 6 dB 12 0 dBm Av 12 dB 12 0 dBm Av 18 dB 11 9 dBm 250 MHz Second Third Harmonic Distortion Av 6 dB Vour 0 9 V p p 88 69 dBc Av 12 dB Vout 0 9 V p p 81 68 dBc Av 18 dB Vout 0 9 V p p 77 68 dBc OIP3 IMD3 Av 6 GB Vout 0 9 V p p composite 2 MHz spacing 32 5 77 dBm dBc Av 12 dB Vout 0 9 V p p composite 2 MHz spacing 32 6 77 dBm dBc Av 18 dB Vout 0 9 V p p composite 2 MHz spacing 32 1 76 dBm dBc Noise Spectral Density RTI Av 6dB 54 nV 4Hz Av 12 dB 3 1 nV 4Hz Av 18 dB 2 0 nV 4Hz 1 dB Compression Point RTO Av 6 dB 12 0 dBm Av 12 dB 11 9 dBm Av 18 dB 11 7 dBm 500 MHz Second Third Harmonic Distortion Av 6 dB Vour 0 9 V p p 77 66 dBc Av 12 dB Vout 0 9 V p p 71 66 dBc Av 18 dB Vout 0 9 V p p 68 65 dBc OIP3 IMD3 Av 6 GB Vout 0 9 V p p composite 2 MHz spacing 30 2 72 dBm dBc Av 12 dB Vout 0 9 V p p composite 2 MHz spacing 29 9 71 dBm dBc Av 18 dB Vout 0 9 V p p composite 2 MHz spacing 29 1 70 dBm dBc Noise Spectral Density RTI Av 6dB 5 2 nV 4Hz Av 12 dB 3 0 nV 4Hz Av 18 dB 1 9 nV 4Hz 1 dB Compression Point RTO
12. ANALOG DEVICES 5 GHz Low Distortion ADC Driver Line Driver ADA4960 1 FEATURES 3 dB bandwidth of 5 GHz Av 6 dB Single resistor programmable gain 0 dB to 18 dB Differential or single ended input to differential output Low harmonic distortion HD2 HD3 Av 6 dB 88 69 dBc 250 MHz 77 66 dBc 500 MHz 73 72 dBc e 1 GHz IMD3 1 GHz 63 dBc Slew rate 8700 V ps Av 6 dB 2 V step 6600 V ps Av 18 dB 2 V step Fast settling 1 ns to 196 1 4 ns to 0 196 Fast overdrive recovery 6 7 ns to 196 9 3 ns to 0 596 Single supply operation 5 V 0 1 dB gain flatness to 300 MHz DC level translation Available in 16 lead LFCSP APPLICATIONS Differential ADC drivers for giga sample ADCs GBPS line drivers with pre emphasis High speed data acquisition Electronic surveillance countermeasures Pulse capture and conditioning Oscilloscopes Satellite communications Single ended to differential converters RF IF gain blocks GENERAL DESCRIPTION The ADA4960 1 is a high performance differential amplifier optimized for RF and IF applications It achieves better than 63 dB IMD3 performance for frequencies up to and beyond 1 GHz making it an ideal driver for 8 bit to 10 bit giga sample analog to digital converters ADCs The buffered inputs of the ADA4960 1 isolate the gain setting resistor Rc from the signal inputs maintaining a constant 10 KQ input resistance easing matching and input drive requirements
13. C 0 5 V Internal Power Dissipation See Figure 3 Maximum Junction Temperature 150 C Operating Temperature Range 40 C to 85 C Storage Temperature Range 65 C to 150 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability THERMAL RESISTANCE n is specified for the device including the exposed pad soldered to a high thermal conductivity 4 layer circuit board as described in EIA JESD 51 7 Table 3 Thermal Resistance Package Type Osa Unit 16 Lead LFCSP Exposed Pad 89 5 C W MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the ADA4960 1 package is limited by the associated rise in junction temperature Tj on the die At approximately 150 C which is the glass transition temperature the plastic changes its properties Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die permanently shifting the parametric performance of the ADA4960 1 Exceeding a junction temperature of 150 C for an extended period can result in changes in the silicon devices potentially causing failure The power dissipated in the
14. The VOP and VON outputs are internally biased at VCC 2 with no external source The output common mode range can be adjusted in the range of 1 V to 2 75 V by applying an external source voltage to the VCOM pin INPUT AND OUTPUT INTERFACING The ADA4960 1 can be configured as a differential input to differential output driver as shown in Figure 31 The differential broadband input is provided by the ETC1 1 13 balun transformer The two 25 Q resistors R1 and R2 provide the 50 Q match to the 50 Q ac source The 0 1 uF capacitors connected in series with the inputs and outputs isolate the source and balanced load from the internal bias Rc is the gain setting resistor Load Ri should equal 100 Q to provide the expected ac performance see the Specifications section Different loads can be applied with the gain value described by the gain adjust equation see the Gain Adjust section IIP BALANCED SOURCE IIN ADA4960 1 9 NC NC VCC VCC pe L 0 1uP NC lt NO CONNECT 5V ETC1 1 13 0 1pF R1 RL 500 250 2 G RL AC T R2 0 1pF 250 E 08458 030 Figure 31 Differential Input to Differential Output Configuration The ADA4960 1 can also be configured as a single ended input to differential output driver as shown in Figure 32 R1 provides the input source match and R2 balances the input source impedances The 0 1 uF capacitors connected in series with the inputs and outputs isolate the source and balanced loa
15. a i RERUM 70 W 22i T oe 75 80 SECOND HARMONIC DISTORTION 85 90 95 Ty 85 C Ty 25 C Th 40 C 100 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz CMRR dB N D a eo N eo eo e e eo e e e 08458 017 08458 046 Figure 17 HD2 and HD3 vs Frequency at Ta 40 C 25 C 85 C Vour V DISTORTION dBc 1 5 1 0 Av 6 dB Vour 0 9 V p p 0 5 0 5 2 4 6 8 10 12 14 16 18 20 TIME ns Figure 18 Large Signal Pulse Response Av 18 dB f 140MHz f 250MHz f 500MHz f 750MHz f 1GHz VOCM V Figure 19 HD2 vs VOCM Av 6 dB Vour 0 9 V p p f 140 MHz f 250 MHz f 500 MHz f 750 MHz f 1 GHz 08458 042 08458 016 DISTORTION dBc DISTORTION dBc Rev 0 Page 10 of 20 e o 0 1 1 10 FREQUENCY GHz Figure 20 CMRR vs Frequency Av 6 dB Vovr 0 9 V p p 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz Figure 21 HD2 HD3 vs Frequency Single Ended Input Av 6 dB Vout 0 9 V p p f 140MHz f 250MHz f 500MHz f 750MHz f 1GHz 0 5 1 0 1 5 2 0 2 5 3 0 VOCM V Figure 22 HD3 vs VOCM Av 6 dB Vout 0 9 V p p f 140
16. ain setting resistor Rc from the input signals keeping a constant 10 kO differential input impedance for all gains The differential output impedance is 150 Q The gain range is 0 dB to 18 dB and is set using a single resistor Rc ADA4960 1 Rs 2 VOP AC Rs Q VON 08458 025 Figure 30 Basic Structure of the ADA4960 1 ADM960 1 The ADA4960 1 can be ac coupled or dc coupled at the inputs and or outputs within the specified input and output common mode range The inputs VIP and VIN have a common mode voltage range of 2 25 V to 2 75 V and are internally set at VCC 2 The outputs VOP and VON have a common mode voltage range of 1 0 V to 2 75 V that can be set externally using the VOCM pin The VOCM pin is internally set to VCC 2 with no external connection The input of the device can be configured as single ended or differential with similar HD3 distortion results Rev 0 Page 13 of 20 ADA4960 1 APPLICATIONS INFORMATION BASIC CONNECTIONS The basic connections for operating the ADA4960 1 are shown in Figure 33 Connect VCC to 5 V and decouple each supply pin with a low inductance surface mount ceramic capacitor of 0 1 uF placed as close to the device as possible In addition decouple the VOCM pin and the VCI pin by using a 0 1 uF capacitor whether or not they are used as inputs For normal operation the enable pin PD should be tied to VCC When the ADA4960 1 is pulled low it goes into power down mode
17. d from the internal bias Rc is the gain setting resistor R should equal 100 Q to provide the expected ac performance see the Specifications section R2 0 1uP 500 08458 028 Figure 32 Single Ended Input to Differential Output Configuration A BL BALANCED LOAD vcc e E m 08458 026 Figure 33 Basic Connections of the ADA4960 1 Rev 0 Page 14 of 20 GAIN ADJUST The gain of the ADA4960 1 is set with a single resistor Re connected across the IIP and IIN pins Because the output impedance is 150 Q the load affects the gain The voltage gain can be calculated for both differential and single ended inputs as follows Ay 747 150R 150 R 35 5 R where Ri and Rc are the load and gain setting resistors 100 Rg Q 200 Figure 34 Av vs Re for R 100 Q R 200 O Ri 500 O and R 1 kQ o ES 8 E S 8 Table 5 Ay vs Re for Ri 100 Q R 200 Q Ri 500 O and R 1kQ Rc Av dB R 100Q RL 200Q0 R 500Q RL 1kQ 0 246 370 505 576 6 106 167 237 271 12 35 2 65 7 101 118 18 0 152 32 8 41 7 ADA4960 1 BANDWIDTH EXTENSION The bandwidth of the ADA4960 1 can be extended for both differential and single ended input configurations by connecting a capacitor Cs in parallel with the gain setting resistor Rc as shown in Figure 35 ETC1 1 13 500 AC 08458 027 Figure 35 ADA4960 1 with
18. eive equalization and transmit pre emphasis The ADA4960 1 unidirectional signal path is protocol and encoding agnostic supporting myriad signaling types such as NRZ and PAM2 4 8 N coded 8b 10b uncoded and out of band SATA OOB data Rev 0 Page 16 of 20 ADA4960 1 OVERDRIVE AND RECOVERY Recovery from overdrive is 6 7 ns to 1 9 3 ns to 0 5 and When overdriven the ADA4960 1 limits its outputs to 3 4 V typical with no overshoot as shown in Figure 42 This feature protects the ADC from transients eliminating the need for additional external clamping at the inputs of the ADC 4 0 3 5 5 o gt 3 0 5 2 5 o gt 2 0 1 5 1 0 8 6 4 2 0 2 4 6 8 10 12 14 TIME ns Figure 42 Output Overdrive Vi 1 V p p Av 12 dB 08458 051 Rev 0 Page 17 of 20 0 096 12 6 ns to 0 2596 of the final output voltage see Figure 43 UTP VouTN 0 072 0 048 0 024 2 4 6 8 10 12 14 TIME ns Figure 43 Output Overdrive Recovery 08458 052 ADA4960 1 LAYOUT GROUNDING AND BYPASSING The ADA4960 1 is a high speed device Realizing its superior performance requires attention to the details of high speed printed circuit board PCB design The first requirement is to use a multilayer PCB with solid ground and power planes that cover as much of the board area as possible Bypass each power supply pin directly to a nearby ground plane as
19. equency at Av 0 dB Av 6 dB Av 12 dB and Av 18 dB Cem di ia RUMP e Ay 18dB 0 6 0 2 Vout V eo Ay dB SLEW RATE V ps 6 7200 0 2 12 4900 3700 0 2 0 0 2 0 4 0 6 TIME ns Figure 6 Rise Time Vour vs Time Vour 1 V p p 12dB LL L NOISE FIGURE dB 0 200 400 600 800 1000 1200 FREQUENCY MHz 08458 053 08458 038 Figure 7 Noise Figure vs Frequency at Av 6 dB Av 12 dB and Av 18 dB Rev 0 Page 8 of 20 18 Ay 6dB R T 16 gt E Q 14 u Ay 12dB WW o 9 12 a Ay 18dB x rc D E 10 o 8 50 100 1000 FREQUENCY MHz Figure 8 RTO Noise Spectral Density vs Frequency at Av 6 dB Av 12 dB and Av 18 dB 5 o gt 0 2 0 0 2 0 4 0 6 0 8 1 0 TIME ns Figure 9 Rise Time Vour vs Time Vour 2 V p p 13 12 Ay 6dB Ay 18dB 11 m 10 Ay 12dB n 9 8 7 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz Figure 10 P1dB vs Frequency at Av 6 dB Av 12 dB and Av 18 08458 039 08458 054 08458 007 a ivs ADA4960 1
20. gain adjust and bandwidth extension features allow configuration of the ADA4960 1 for line driver and channel equalization applications The quiescent current of the ADA4960 1 is typically 60 mA When disabled it consumes less than 3 mA offering excellent input to output isolation Fabricated on an Analog Devices Inc high speed SiGe process the ADA4960 1 is available in a compact 3 mm x 3 mm 16 lead LFCSP It operates over the temperature range of 40 C to 85 C One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2010 Analog Devices Inc All rights reserved ADA4960 1 TABLE OF CONTENTS FOAtUTCS aeaaea 1 Circuit DescriptiOnz eee ete tee ee Ree ree RS 13 Applications esistere e Mate ie re eerie re E 1 Basic Structure s ccscscsecssesiiscssecsisatoocsdesteccsiestosedoosdeosigenssesieesecs 13 Functional Block Diagram eren 1 Applications Information eerte 14 General Description oc eerte eti e I E aidera 1 Basic Connections e i etre es 14 REVISION HistOEy 2er e REESE NER ern 2 Input and Output Interfacing eee 14 Sp cifications ostrea E Re RU E e 3 GalnicAdIuSt occorre eta etis 15 Absolute Maximum Ratings essere 6 Bandwidth Extension seen 15 Th rmal Resistance eet e E tee e res 6 ADC Interfacing oi et het etaient 16 Maximum Power Dissipation sss 6 Line D
21. pedance ground plane on the PCB to ensure the specified electrical performance and to provide thermal relief To reduce thermal impedance further it is recommended that the ground planes on all layers under the paddle be connected together with vias a 1 5mm a 1 2mm 1 5mm 08458 036 0 3mm DIAMETER VIAS Figure 44 Recommended PCB Thermal Attach Pad WW LLLI ILLI L P ASS SSSSSSSSSSSSSSSSSSSSSNSNSSN JL 08458 037 BS LLLLL Rev 0 Page 18 of 20 OUTLINE DIMENSIONS PIN 1 INDICATOR eo eo o NIN a S 0 05 MAX E R E EST 0 02 NOM PIN 1 INDICATOR 1 65 1 50 sq 1 45 0 20 MIN TOP VIEW FOR PROPER CONNECTION OF 0 SEATING 3 PLANE 1 COPLANARITY 0 08 0 20 REF COMPLIANT TO JEDEC STANDARDS MO 229 Figure 46 16 Lead Lead Frame Chip Scale Package LFCSP_WQ 3mm x 3 mm Body Very Very Thin Quad CP 16 27 Dimensions shown in millimeters THE EXPOSED PAD REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET 091609 A ADA4960 1 ORDERING GUIDE Package Ordering 1 M c Branding Model Temperature Range Package Description Option Quantity ADA4960 1ACPZ R2 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_WQ CP 16 27 250 H23 ADAA4960 1ACPZ RL 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_WQ CP 16 27 5 000 H23 ADAA4960 1ACPZ R7
22. river Applications seen 16 ESD Caution icio pape CERERI 6 Overdrive and Recovery seen 17 Pin Configuration and Function Descriptions eee 7 Layout Grounding and Bypassing sss 18 Typical Performance Characteristics sse 8 Outline Dimensions eite eer ttis ans 19 Test CITIES ee Cre eno debe Ie ee Ey 12 Ordering Guide eee eee ee 19 REVISION HISTORY 4 10 Revision 0 Initial Version Rev 0 Page 2 of 20 SPECIFICATIONS ADA4960 1 VCC 5 V VOCM 2 5 V Ri 100 Q differential Av 6 dB Ci 1 pF differential f 140 MHz T 25 C Inputs and outputs are ac coupled Table 1 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE 3 dB Bandwidth Av 6 dB Vour 1 0 V p p 5000 MHz Av 12 dB Vour lt 1 0 V p p 2000 MHz Av 18 dB Vour lt 1 0 V p p 1200 MHz Bandwidth for 0 1 dB Flatness Vour 1 0V p p 300 MHz Gain Accuracy Re 95 3 Q 0 5 dB Gain Supply Sensitivity Vs 5 0 2 dB V Gain Temperature Sensitivity 40 C to 85 C 2 5 mdB C Slew Rate Av 6 GB Vout 2 V step 20 to 80 8700 V us Av 12 dB Vout 2 V step 20 to 80 7700 V us Av 18 dB Vout 2 V step 20 to 80 6600 V us Av 6 GB Vout 1 V step 20 to 8096 7200 V us Av 12 dB Vout 1 V step 20 to 80 4900 V us Av 18 dB Vout 1 V step 20 to 80 3700 V us Settling Time 1V step to 196 1 ns 1 V step to 0 196 14 ns Overdrive Recovery Time Vin
23. rtion performance and lowers the overall bandwidth ETC1 1 13 500 250 08458 033 Figure 38 Differential Input Configuration Directly Driving the ADC The ADA4960 1 in Figure 39 is a single ended input configuration The input is matched to the source with 50 Q resistors The ADAA960 1 outputs can be directly connected to the ADC inputs as long as the ADC input common mode is within the output common mode range of the ADA4960 1 08458 034 Figure 39 Single Ended Input Configuration Directly Driving the ADC The signal source can be directly connected to the ADA4960 1 inputs as long as the source dc level is within the common mode input range of the ADA4960 1 as shown in Figure 40 08458 050 Figure 40 Single Ended Input Configuration DC Coupled Inputs and Outputs When the ADC input common mode is outside the output common mode range of the ADA4960 1 the outputs can be ac coupled to provide coupling as shown in Figure 41 08458 035 Figure 41 Single Ended Input Configuration AC Coupled to the ADC LINE DRIVER APPLICATIONS The user accessible gain adjust and bandwidth extension features allow configuration of the ADA4960 1 for line driver and channel equalization applications from dc to 6 5 Gbps Because of its extremely low distortion performance and high linearity the ADA4960 1 can be deployed in cable and backplane channels to extend channel length and improve signaling margin for serial links using rec

ANALOG DEVICES ADA4960-1 handbook

Contents

Download Pdf Manuals

Related Search

Related Contents