Home

Intel Desktop Board D810E2CB Technical Product Specification Manual

1. 6 50 165 10 i i 6 10 154 94 D e D m c 5 20 132 08 0 00 EN 1 00 25 40 Hh L 8 25 209 55 0 75 19 05 S 1 80 45 72 8 00 203 20 OM11026 Figure 10 Board Dimensions 63 Intel Desktop Board D810E2CB Technical Product Specification 2 10 2 Shield The back panel I O shield for the D810E2CB board must meet specific dimensional requirements Systems based on this board need the back panel I O shield to pass emissions EMI certification testing Figure 11 shows the critical dimensions of the I O shield Dimensions are given in inches and millimeters to a tolerance of 0 02 inches 5 09 millimeters The figure indicates the position of each cutout Additional design considerations for I O shields relative to chassis requirements are described in the ATX specification See Section 1 3 for information about the ATX specification 6 39 162 301 Q Q a 0 061 Ref 1 55 0 94 Ref 0387 8 3x Dia 0 33 8 53 0 039 Dia 1 0 8x R 02 Min 64 22 45 0 00 0 1 0 78 01 Typ 20 0 30 25 6 26 159 20 0 52 13 19 1 89 Ref 48 00 0 28 7 01 0 27 0 46 0 69 11 81 0 718 18 24 0 46 11 81
2. 54 8 External COnnecions e 58 9 Location of the BIOS Setup Jumper 61 10 Board Bei co Ecc 63 11 Shield ead ert era e d dani edi 64 12 Migh Temperature 2 pae teta eene 67 Tables 1 Feature SUMMary o RR DD amicum ee RE 12 2 Manubactorng goi tute dote Doreen qe e so dette Doe ear rer genua 13 SDOGIICAOIIS 16 4 SSUDDOHGd PIOCGSSOLS 19 5 System Memory 20 6 Supported Graphics Refresh Rates uie Den eae 27 7 LAN Connector LED States 7 ceo Ro horret rper ayes ch ceases sagas ree UR E 30 8 Effects of Pressing the Power Switch oon Gani eee Se GHA 31 9 Power States and Targeted System 32 10 ACPI Wake up Devices and 33 11 Wake up Devices and nennen 34 12 Fan Connector ea baee ptus ce ee penat dd 35 13 Wake on Ring Support for 36 vii Intel Desktop Board D810E2CB Technical Product Specificatio
3. 31 NACE LU rM 33 1 12 3 Hardware Support ote et erae date td edic 34 Technical Reference 2 1 een ee e ite a er Re bere eene 39 22 Memory Map rettet tam ena antis 39 2 3 40 24 Channels e a a Deu bee 42 25 PCI Configuration Space Map ecrit rend d reine RR FER 42 20 RC EE 43 2 7 PCI Interrupt Routing Map on eh e Pr b eee c an eus 44 Intel Desktop Board D810E2CB Technical Product Specification vi 2 8 GODS CIONS is hea RE E Smee Nb duel aud Deseo e BR dro ende 45 2 8 1 Back Panel GOFIng6IOre xo exc uia e FOND E POR D RR E dE 46 2 8 2 Internal CONMMGCHONS e ipee ihe aere petes Weare Pondus 50 2 8 3 External lo Connectors so eno Vue ie Hr vesc s 58 2 J mper icio c d Er 61 2 10 Mechanical 63 FlexXATX Form PACION uc ende Dodson tee Rp tieniti repe bred 63 23 0 2 IA SITIBIO tuenda tein 64 211 Electrical COMSIG OT ALONG ss sco erede 65 2 11 1 Power Consumption eese tete core Dau A i M dM e 65 2 11 2 Power Supply Considerations despite indeed Duce 66 2 11 3 Standby
4. 24 1 6 5 SST 49LF004A 4 Mbit Firmware Hub 24 AMD 25 1 7 1 ui ge Mr EQ 25 1 7 2 Parallel Port tea eder eile benc teta tuv Rec ve e E P Tener Ra 25 1 7 3 Diskette Drive Controller ce t bred pest Re ettet tipo Er ed 26 1 7 4 Keyboard and Mouse 26 1 8 Graphics SUDSVSIOIIG term ir tes naf o por aes 27 1 9 lt Audio rea xe cer a 28 1 9 1 694201 Analod DOGB6 cho ned 28 1 9 2 Audio rire ct tod e creer de me du e 28 1 10 Hardware Management 29 1 10 1 Hardware Monitor Component 29 1 10 2 Fan Control and Monitoring ees cocotte tbe o Lt eben 29 1 11 LAN Subsystem Optlonal onte ee puce du ex teste cl UR TURNS 30 1 11 1 Intel 82562ET Platform LAN Connect 30 1 11 2 RJ 45 LAN Connector with Integrated LEDs 30 1 12 Power Management Features sc ue ee eorr eoe ra De ERE REO EA RUE 31 I UNE c m
5. 77 929 So ES ERR 78 3 8 1 CD ROM and Network 78 3 8 2 Booting Without Attached 78 3 9 Fast Booting Systems with Intel Rapid BIOS 78 3 9 1 Peripheral Selection and 78 3 9 2 Intel Bapid BIOS BOOL oett Ri mati eu 79 JU gt Operating SY SIEM arcto reste biet Qtr ev see Meare ie 79 3 10 BIOS Security FOalureS uice ep on eet tee hte rae 80 BIOS Setup Program 4 1 Introduction en 81 42 Maintenance Men iiie ce eL eee 82 4 2 1 Extended Configuration 83 4 93 Menu es eee Ene PR Er bebe bete oe Ubi 84 4 4 Advanced MU hdc edat rentes ap ate bab cca ss nae 85 Contents 4 4 1 PCI Configuration SBDITIBPIE soot 1 uode e Dy Spider arbore EL apis 86 4 4 2 Boot Configuration 87 4 4 3 Peripheral Configuration 88 4 4 4 IDE Configuration Submenu sssseeeeeeeeeeeeeeeeeeennennn nnn 90 4 4 5 Diskette Configuration
6. Q OM11025 Figure 9 Location of the BIOS Setup Jumper Block 61 Intel Desktop Board D810E2CB Technical Product Specification Table 42 BIOS Setup Configuration Jumper Settings J4A1 Function Mode Jumper Setting Configuration Normal The BIOS uses current configuration information and passwords for booting 1 2 3 Configure 1 After the POST runs Setup runs automatically The 2 3 E maintenance menu is displayed 1 3 Recovery The BIOS attempts to recover the BIOS configuration A None O recovery diskette 1 44 MB or CD ROM is required 30 For information about Refer to How to access the BIOS Setup program Section 4 1 page 81 The maintenance menu of the BIOS Setup program Section 4 2 page 82 BIOS recovery Section 3 7 page 77 62 2 10 Mechanical Considerations 2 10 1 FlexATX Form Factor The D810E2CB board is designed to fit into an ATX or microATX form factor chassis Figure 10 illustrates the mechanical form factor for the board Dimensions are given in inches millimeters The outer dimensions are 9 00 inches by 7 50 inches 228 60 millimeters by 190 50 millimeters Location of the I O connectors and mounting holes are in compliance with the FlexATX addendum to the microATX specification see Section 1 3 Technical Reference
7. soft off mode e Requires two calls to access the computer First call restores the computer from an ACPI S5 state or powers up the computer from APM soft off mode Second call enables access when the appropriate software is loaded e Detects incoming calls for external USB modems The USB bus is monitored for the RING DETECT signal Table 13 outlines wake on ring support for modems Table 13 Wake on Ring Support for Modems State USB Modem Serial Port Modem PCI Bus Modem via PMEZ Product Description 1 12 3 6 Resume on Ring The operation of Resume on Ring can be summarized as follows Resumes operation from ACPI 51 state or APM suspend mode Requires only one call to access the computer Detects incoming call similarly for external and internal modems 1 12 3 7 Wake from USB USB bus activity wakes the computer from an ACPI 51 or S3 state or APM suspend mode gt NOTE Wake from USB requires the use of a USB peripheral that supports Wake from USB Wake from USB is not supported in APM soft off mode 1 12 3 8 PME Wakeup Support When the PME signal on the PCI bus is asserted the computer wakes from an ACPI 51 or S3 state 37 Intel Desktop Board D810E2CB Technical Product Specification 38 2 Technical Reference What This Chapter Contains 2 1 39 2 2 Memon Mapis 39 2 8 ON Ma peisea EU 40 2 4 Channels iso recte eas hints Ase lock Macht eed
8. View Only Full default Unattended Start Disabled default Enabled allows system to complete the boot Note 1 Enabled process without a password The keyboard remains locked until a password is entered A password is required to boot from a diskette Notes 1 This feature appears only if a user password has been set 2 This feature appears only if a supervisor password has been set 4 6 Power Menu BIOS Setup Program To access this menu select Power from the menu bar at the top of the screen Maintenance The menu represented in Table 65 is for setting the power management features Table 65 Power Menu Feature Power Management Note Inactivity Timer Note Hard Drive Note Description e Disabled Enable or disable the BIOS power management feature Enabled default e Off Specifies the amount of time before the computer enters standby mode when APM power management is active e 1 Minute e 5 Minutes e 10 Minutes 20 Minutes default e 30 Minutes e 60 Minutes e 120 Minutes Disabled default Enables or disables power management for hard disks Enabled during standby and suspend modes when APM power management is active ACPI Suspend State S1 State default Specifies the suspend state S3 State Power Button Mode On Off default Selects the operating mode for the power button e Suspend Note Power Management Inactivity Timer and H
9. 0 47 12 0 0 57 14 43 0 50 2 08152 741 5 77 146 63 O 45 11 34 Pictorial View OM11070 Figure 11 I O Shield Dimensions Technical Reference 2 11 Electrical Considerations 2 11 1 Power Consumption Table 43 lists voltage and current specifications for a computer that contains the D810E2CB board and the following 1 GHz Intel Pentium lll processor with a 256 KB cache 512 MB SDRAM e 8 GB IDE hard disk drive e 6X IDE CD ROM drive This information is provided only as a guide for calculating approximate power usage with additional resources added Values for the Windows 98 desktop mode are measured at 640 x 480 x 256 colors and 60 Hz refresh rate AC watts are measured with a typical 235 W power supply nominal input voltage and frequency with true RMS wattmeter at the line input Table 43 Power Usage DC Current at Windows 98 ACPI SO 0 25 A Windows 98 ACPI S1 0 245 A Windows 98 ACPI S3 0 31 A Windows 98 ACPI S5 0 25 A Windows 98 92 W 0 25 A Windows 98 SE APM Note 32 W 0 24 A Note Start menu Standby 65 Intel Desktop Board D810E2CB Technical Product Specification 2 11 2 Power Supply Considerations System integrators should refer to the power usage values listed in when selecting a power supply for use with this motherboard The power supply must comply with the following recommendations found in the indicated sections of the ATX form factor spec
10. 1 6 1 Direct AGP Direct integrated AGP is a high performance bus independent of the PCI bus for graphics intensive applications such as 3D applications AGP overcomes certain limitations of the PCI bus related to handling large amount of graphics data with the following features e Pipelined memory read and write operations that hide memory access latency Demultiplexing of address and data on the bus for nearly 100 percent bus efficiency For information about Refer to The location of the VGA port connector Figure 5 page 46 Obtaining the Accelerated Graphics Port Interface Specification Table 3 page 16 1 6 2 USB 22 The ICH2 contains two separate USB controllers supporting four USB ports One USB peripheral can be connected to each port For more than four USB devices an external hub can be connected to any of the ports Two of the USB ports are implemented with stacked back panel connectors The other two are accessible via the front panel USB connector at location J8B1 The D810E2CB board fully supports Universal Hub Controller Interface UHCT and uses UHCI compatible software drivers NOTE Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements even if no device is attached to the cable Use shielded cable that meets the requirements for full speed devices For information about Refer to The location of the USB connectors on the back panel Figure 5 page 46 The sign
11. 3 3 V AD22 AD20 Ground AD18 Pin B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 Signal Name 12V Ground TCK Ground no connect TDO 45V 5 INTB INTD no connect PRSNT1 Reserved no connect PRSNT2 Ground Ground Reserved Ground CLK Ground REQ 5 V I O AD31 AD29 Ground AD27 AD25 3 3 V C BE3 AD23 Ground AD21 AD19 43 3 V Pin A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 58 59 A60 A61 A62 Signal Name AD16 3 3 V FRAME Ground TRDY Ground STOP 3 3 V Reserved Reserved Ground PAR AD15 3 3 V AD13 AD11 Ground 009 3 3 V 006 AD04 Ground AD02 ADOO 5 V I O REQ64C 5 5 Technical Reference Pin Signal Name B32 AD17 B33 C BE2 B34 Ground B35 IRDY B36 3 3 V B37 DEVSEL B38 Ground B39 LOCK B40 PERR B41 433V B42 SERR B43 43 3V B44 C BE1 B45 AD14 B46 Ground B47 AD12 B48 AD10 B49 Ground B50 B51 Key B52 008 B53 ADO7 54 3 3 V B55 ADO5 B56 57 Ground 58 ADO1 B59 5 V I O B60 ACK64C B61 5 B62 5 These signals in parentheses are optional the PCI specification and are not currently i
12. 51 Intel Desktop Board D810E2CB Technical Product Specification 52 Table 29 ATAPI CD ROM Connector J1C1 Signal Name Left audio input from CD ROM CD audio differential ground CD audio differential ground Right audio input from CD ROM Signal Name Analog audio mono input Ground Ground Analog audio mono output Table 31 Processor Fan Connector J2J1 Pin Signal Name 1 FAN1 PWM 2 12 V 3 FAN1 TACH Table 32 Power Connector J6F1 Pin Signal Name 3 3 V 3 3 V Ground 5 V Ground 5 Ground PWRGD Power Good 5 VSB 12 V N A N 11 12 13 14 15 16 17 18 19 20 Table 33 Chassis Intrusion Connector J6A2 Pin Signal Name 1 Intruder 2 Ground Pin Signal Name 1 FAN2 PWM 2 12 V 3 FAN2_TACH Technical Reference Signal Name 3 3 V 12 V Ground PS ON power supply remote on off Ground Ground Ground Reserved 5 V 5 V 53 Intel Desktop Board D810E2CB Technical Product Specification 2 8 2 2 Add in Board and Peripheral Interface Connectors Figure 6 shows the location of the add in board and peripheral interface connectors Note the following considerations for the PCI bus connectors of the PCI bus connectors are bus master capable bus connector 2 has SMBus signals routed to it This enables PCI bus add in boards with SMBus support to access sensor data on the board The specific
13. Two LEDs are built into the RJ 45 LAN connector Table 7 describes the LED states when the board is powered up and the LAN subsystem is operating 30 Table 7 LAN Connector LED States LED Color LED State Condition Green 10 Mbit sec data rate is selected On 100 Mbit sec data rate is selected LAN link is established On brighter and pulsing The computer is communicating with another computer on the LAN Off On Yellow LAN link is not established n Product Description 1 12 Power Management Features Power management is implemented at several levels including e Advanced Configuration and Power Interface ACPI e Advanced Power Management APM e Hardware support Power connector Fan connectors Wake on LAN technology Instantly Availablet technology Wake on Ring Resume on Ring Wake from USB PME wakeup support 1 12 1 ACPI If the board is used with an ACPI aware operating system the BIOS can provide ACPI support ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer The use of ACPI with this board requires the support of an operating system that provides full ACPI functionality ACPI features include Plug and Play including bus and device enumeration e Power management control of individual devices video displays and hard disk drives e Methods for achieving less than 30 watt system o
14. 06 07 08 0B 0C OE 10 11 12 13 14 19 1 23 24 25 27 28 2 2B 2C 2D 2E 2F 30 31 32 34 37 38 39 3A Runtime Code Uncompressed in F000 Shadow RAM Description of POST Operation NMI is Disabled To check soft reset power on BIOS stack set Going to disable cache if any POST code to be uncompressed CPU init and CPU data area init to be done CMOS checksum calculation to be done next Any initialization before keyboard BAT to be done next KB controller free To issue the BAT command to keyboard controller Any initialization after KB controller BAT to be done next Keyboard command byte to be written Going to issue Pin 23 24 blocking unblocking command Going to check pressing of INS END key during power on To init CMOS if Init CMOS in every boot is set or END key is pressed Going to disable DMA and Interrupt controllers Video display is disabled and port B is initialized Chipset init about to begin 8254 timer test about to start About to start memory refresh test Memory Refresh line is toggling Going to check 15 us ON OFF time To read 8042 input port and disable Megakey GreenPC feature Make BIOS code segment writeable To do any setup before Int vector init Interrupt vector initialization to begin To clear password if necessary Any initialization before setting video mode to be done Going for monochrome mode and color mode setting Different
15. FDEDIN FDINDX Index 0 Motor Enable A No connect FDDSO Drive Select A No connect FDDIR Stepper Motor Direction FDSTEP Step Pulse FDWD Write Data FDWE Write Enable FDTRKO Track 0 FDWPD Write Protect FDRDATA Read Data FDHEAD Side 1 Select DSKCHG Diskette Change 57 Intel Desktop Board D810E2CB Technical Product Specification 2 8 3 External I O Connectors Figure 8 shows the locations of the external I O connectors A B OM11024 Item Description Reference Designator For more information see A Front panel J8A1 Table 38 B Front panel USB J8B1 Table 41 Figure 8 External I O Connectors 58 Technical Reference 2 8 3 4 Front Panel Connector This section describes the functions of the front panel connector Table 38 lists the signal names of the front panel connector Table 38 Front Panel Connector J8A1 Pin Signal In Out Description i Signa In Out Description 1 EHE disk LED pull HDR_BLNK_ Out Front panel green up 330 Q to 5 V GRN LED 3 HAD Out Hard disk active LED 4 HDR_BLNK_ Out Front panel yellow YEL LED 5 GND Ground 6 FPBUT_IN In P
16. failed BIOS recovery In case of a BIOS recovery failure verify that SPD memory is installed and retry the BIOS recovery procedure If non SPD memory is installed replace with SPD memory and try the procedure again lt gt NOTE BIOS recovery cannot be accomplished if non SPD DIMMs are installed The SPD data structure is required for the recovery process To create a BIOS recovery diskette or CD ROM a bootable LS 120 diskette or CD ROM must be created and the BIOS update files copied to it BIOS upgrades and the Intel Flash Memory Upgrade Utility are available from Intel Customer Support through the Intel World Wide Web site lt gt NOTE If the computer is configured to boot from an LS 120 diskette in the Removable Devices submenu the BIOS recovery diskette must be a standard 1 44 MB diskette not a 120 MB diskette For information about Refer to The BIOS recovery mode Section 2 9 page 61 The Boot menu in the BIOS Setup program Section 4 7 page 98 Contacting Intel customer support Section 1 2 page 16 77 Intel Desktop Board D810E2CB Technical Product Specification 3 8 Boot Options In the BIOS Setup program the user can choose to boot from a diskette drive hard drives CD ROM or the network The default setting is for the diskette drive to be the first boot device the hard drive second and the ATAPI CD ROM third The fourth device is disabled 3 8 1 Booting from CD ROM is supported in compliance to the El Torito
17. 21 USB Ports 0 and 1 Pin Signal Name 1 5 V fused 2 USBPO USBP1 3 USBPO USBP1 4 Ground Table 22 Parallel Port Pin Standard Signal Name ECP Signal Name EPP Signal Name STROBE STROBE WRITE DO D1 D2 D3 D4 D5 D6 D7 C Bg WATA NI U U U D U U U R9 R6 PD7 PD7 a a U U A 47 Intel Desktop Board D810E2CB Technical Product Specification 48 Table 23 a BR VU 5 10 11 12 13 14 15 Table 24 Pin NI A N Table 25 3 5 BR H VGA Port Signal Name Red Green Blue No connect Ground Ground Ground Ground Fused VCC Ground No connect MONID1 HSYNC VSYNC MONID2 Serial Port A Signal Name DCD Data Carrier Detect SIN Serial Data In SOUT Serial Data Out DTR Data Terminal Ready Ground DSR Data Set Ready RTS Request to Send CTS Clear to Send RI Ring Indicator LAN Optional Signal Name TX TX RX Ground Ground RX Ground Ground Technical Reference Table 26 Audio Line In Pin Signal Name Tip Audio left in Ring Audio right in Sleeve Ground Table 27 Audio Line Out Pin Signal Name Tip Audio left out Ring Audio right out Sleeve Ground Table 28 Mic In Connector Pin Signal Name Tip Mono in Ring Mic bias voltage 49 Intel Desktop Board
18. Clears the event log after rebooting Yes Disabled Enables logging of events Enabled default Enter Marks all events as read BIOS Setup Program 4 4 7 Video Configuration Submenu To access this menu select Advanced on the menu bar then Video Configuration Maintenance Main Security Power PCI Configuration The submenu represented in Table 63 is for configuring the video features Table 63 Video Configuration Submenu Primary Video Adapter AGP default Selects primary video adapter to be used during e PCI boot 95 Intel Desktop Board D810E2CB Technical Product Specification 4 5 Security Menu 96 To access this menu select Security from the menu bar at the top of the screen Maintenance Main Advanced Power Boot Exit The menu represented by Table 64 is for setting passwords and security features Table 64 Security Menu Supervisor Password Is No options Reports if there is a supervisor password set User Password 15 Reports if there is a user password set Set Supervisor Password Password can be up to seven Specifies the supervisor password alphanumeric characters Set User Password Password can be up to seven Specifies the user password alphanumeric characters Clear User Password Yes default Clears the user password Note 1 No User Access Level e Limited Sets BIOS Setup Utility access rights for user Note 2 No Access level
19. D810E2CB Technical Product Specification 2 8 2 Internal I O Connectors The internal I O connectors are divided into the following functional groups Audio power and hardware control see page 51 ATAPI CD ROM Telephony Fans 2 Power Chassis intrusion Add in boards and peripheral interfaces see page 54 PCI bus 2 IDE 2 Diskette drive 50 Technical Reference 2 8 21 Audio Power and Hardware Control Connectors Figure 6 shows the location of the audio power and hardware control connectors A B C 1 NOOOO0O00000 0 20 D OM11022 Item Description Reference Designator For additional information see A ATAPI CD ROM J1C1 Black Table 29 page 52 B Telephony ATAPI style J2D1 Green Table 30 page 52 C Processor fan Fan 1 J2J1 Table 31 page 52 D Power J6F1 Table 32 page 53 E Chassis intrusion J6A2 Table 33 page 53 F Chassis fan Fan 2 J7A1 Table 34 page 53 Figure 6 Audio Power and Hardware Control Connectors For information about Refer to The power connector Section 1 12 3 1 page 35 The functions of the fan connectors Section 1 12 3 2 page 35
20. Diskette Configuration Event Log Configuration Video Configuration There are four IDE submenus primary master primary slave secondary master and secondary slave Table 60 shows the format of the IDE submenus For brevity only one example is shown Table 60 Primary Secondary IDE Master Slave Submenus Feature Options Description Drive Installed Displays the type of drive installed Type None Specifies the IDE configuration mode for IDE devices User User allows capabilities to be changed Auto default Auto fills in capabilities from ATA ATAPI device CD ROM ATAPI Removable Other ATAPI IDE Removable Maximum Capacity Displays the capacity of the drive LBA Mode Control e Disabled Enables or disables LBA mode control e Enabled default Multi Sector Transfers e Disabled default Specifies number of sectors per block for transfers 2 Sectors from the hard disk drive to memory Check the hard disk drive s specifications for optimum setting e 4 Sectors 8 Sectors 16 Sectors continued 91 Intel Desktop Board D810E2CB Technical Product Specification Table 60 Primary Secondary IDE Master Slave Submenus continued Feature Options Description PIO Mode Auto default Specifies the PIO mode Ultra DMA Disabled default Specifies the Ultra DMA mode for the drive Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Cable Detected No options Displays the type of cable connected to the IDE in
21. IRQ 43 Intel Desktop Board D810E2CB Technical Product Specification 2 7 PCI Interrupt Routing Map 44 This section describes interrupt sharing and how the interrupt signals are connected between the onboard PCI devices The PCI specification shows how interrupts can be shared between devices attached to the PCI bus In most cases the small amount of latency added by interrupt sharing does not affect the operation or throughput of the devices The ICH2 PCI to LPC bridge has eight programmable interrupt request PIRQ input signals All PCI interrupt sources connect to one of these PIRQ signals Because there are only eight signals some PCI interrupt sources are mechanically tied together on the D810E2CB board and therefore share the same interrupt Table 19 lists the PIRQ signals and shows how the signals are connected to the onboard PCI interrupt sources For example using as a reference assume an add in card using INTA is plugged into PCI bus connector 2 In PCI bus connector 2 INTA is connected to PIRQF which is already connected to the SMBus The add in card in PCI bus connector 2 now shares interrupts with these onboard interrupt sources Table 19 PCI Interrupt Routing Map ICH2 PIRQ Signal Name PCI Interrupt Source PIRQC PIRQF PIRQG PIROB Other ICH2 USB controller abe El NON INTD to PIRQD ICH2 USB controller EMEN INTC to PIRQH ICH2 LAN ye ee Se blu INTA to PIRQE PCI Bus Connector 1 J3B1 PCI Bus Connector 2 J
22. J8A1 aere routier etc b esr vede urgente TE gets 59 States for a One Color Power LED sseseessssseeseeeeeeeeeeennn nene 59 States for a Two Color Power a tte baee endl poda e pens 59 Front Panel USB Connector cat rte oo Rer pto m ee nana 60 BIOS Setup Configuration Jumper Settings J4A1 62 Power MM udi MA LEM E RAE 65 Fam DC Power Requirements eei erect See ati edd 66 Thermal Considerations for 68 Environmental Specifications abet secede eripe DE UE abu cele beet gee 69 SaretyHegilaloris 5 4 oer ote og il aad eee Ln 70 EMG Regulation Ssa o nu e d ce dte quite do Sad e hagas aed Dae pte rdi eus nace enue 70 Supervisor and User Password 80 BIOS Setup Program Menu FUDCHOFIS iue etri iot Det tran 81 BIOS Setup Program Function 82 Mairiteriance Manus sostenere eR derat Re 82 Extended Configuration 83 PCR pete E c ETE P T 84 Advanced utro xit idco au incu de MR emu D DOE DS E DUM RAN dS 85 PCI Configuration SUDMENU aao penati Mune 86
23. SMBus signals are as follows The SMBus clock line is connected to pin A40 The SMBus data line is connected to pin A41 Item Description A PCI bus connector 2 B PCI bus connector 1 C Secondary IDE D Primary IDE E Diskette drive rs oL 300000000000000 0m 1 2 oQ 0000000000 1 39 2 40 39 Reference Designator J3A2 J3B1 J7E1 J8D1 J6D1 OM11023 For additional information see Table 35 page 55 Table 35 page 55 Table 36 page 56 Table 36 page 56 Table 37 page 57 Figure 7 Add in Board and Peripheral Interface Connectors 54 Table 35 PCI Bus Connectors J3A2 and J3B1 Pin A1 A2 A3 A4 A5 A6 7 8 9 10 11 12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 Signal Name Ground TRST 12 V 5 V TMS 5 V TDI 5 INTC 45V Reserved 5 V I O Reserved Ground Ground 3 3 V aux RST 5 V I O GNT Ground PME AD30 43 3 V AD28 AD26 Ground AD24 IDSEL
24. The signal names of the ATAPI CD ROM connector Table 29 page 52 The signal names of the telephony connector Table 30 page 52 The back panel audio connectors Section 2 8 1 page 46 1 10 Hardware Management Subsystem The hardware management features enable the board to be compatible with the Wired for Management WfM specification The board has several hardware management features including the following Fan control and monitoring Thermal and voltage monitoring For information about Refer to The WfM specification Table 3 page 16 1 10 1 Hardware Monitor Component Optional The hardware monitor component provides low cost instrumentation capabilities The features of the component include Internal ambient temperature sensing Remote thermal diode sensing for direct monitoring of processor temperature Power supply monitoring 12 V 5 V 43 3 V 42 5 V 3 3 VSB to detect levels above or below acceptable values SMBus interface The hardware monitor component enables the board to be compatible with the Wired for Management WfM specification For information about Refer to The board s compatibility with the WfM specification Table 3 page 16 1 10 2 Fan Control and Monitoring The SMSC LPC47M102 I O controller provides two fan sense inputs and two fan control outputs Monitoring and control can be implemented using third party software For information about Refer to The functions of the fan connectors Sectio
25. What This Chapter Contains Bid BIOS MESSAGes he e cue erdt tesi 101 5 2 Port 80h POST Codes reacciones ita PO ide aleae deeds 103 5 3 Bus Initialization Checkpoints 2 ters e to e e iat e esc De osi 107 Bee SOC ARC P 108 5 5 BIOS BECP CodeS PT te ee et 109 5 1 BIOS Error Messages Table 68 lists the error messages and provides a brief description of each Table 68 BIOS Error Messages Error Message GA20 Error Pri Master HDD Error Pri Slave HDD Error Sec Master HDD Error Sec Slave HDD Error Pri Master Drive ATAPI Incompatible Pri Slave Drive ATAPI Incompatible Sec Master Drive ATAPI Incompatible Sec Slave Drive ATAPI Incompatible Cache Memory Bad CMOS Battery Low CMOS Display Type Wrong CMOS Checksum Bad CMOS Settings Wrong CMOS Date Time Not Set DMA Error HDC Failure Explanation An error occurred with Gate A20 when switching to protected mode during the memory test Could not read sector from corresponding drive Corresponding drive is not an ATAPI device Run Setup to make sure device is selected correctly An error occurred when testing L2 cache Cache memory may be bad The battery may be losing power Replace the battery soon The display type is different than what has been stored in CMOS Check Setup to make sure type is correct The CMOS checksum is incorrect CMOS memory may have been corrupted Run Setup to reset values CMOS values are
26. bootable CD ROM format specification Under the Boot menu in the BIOS Setup program ATAPI CD ROM is listed as a boot device Boot devices are defined in priority order Accordingly if there is not a bootable CD in the CD ROM drive the system will attempt to boot to the next defined drive CD ROM and Network Boot The network can be selected as a boot device This selection allows booting from the onboard LAN or a network add in card with a remote boot ROM installed For information about Refer to The El Torito specification Section 1 3 page 16 3 8 2 Booting Without Attached Devices For use in embedded applications the BIOS has been designed so that after passing the POST the operating system loader is invoked even if the following devices are not present Video adapter Keyboard Mouse 3 9 Fast Booting Systems with Intel Rapid BIOS Boot Three factors affect system boot speed 3 9 1 The following techniques help improve system boot speed 78 Selecting and configuring peripherals properly Using an optimized BIOS such as the Intel Rapid BIOS Selecting a compatible operating system Peripheral Selection and Configuration Choose a hard drive with parameters such as power up to data ready less than eight seconds that minimize hard drive startup delays Select a CD ROM drive with a fast initialization rate This rate can influence POST execution time Eliminate unnecessary add in adapter features such as log
27. default Selecting User Defined allows setting memory e User Defined configuration CPU Microcode Update No options Displays CPU s Microcode Update Revision Revision CPU Stepping Signature Displays CPU s Stepping Signature BIOS Setup Program 4 2 1 Extended Configuration Submenu To access this menu select Maintenance on the menu bar then Extended Configuration Main Advanced Security Extended Configuration The submenu shown in Table 53 is for setting system memory configuration This submenu becomes available when User Defined is selected under Extended Configuration Power N CAUTION Choosing the wrong settings could cause system problems Do not change these settings unless you have all the necessary information about the installed memory Table 53 Extended Configuration Submenu Feature Options Description Extended Configuration Default default Selecting user defined allows you to select Default or User User Defined Defined Selecting User Defined allows you to configure the items listed under Memory Control below Note If User Defined is selected the status will be displayed in the Advanced Menu as Extended Menu Used SDRAM Auto Auto default Sets extended memory configuration options to auto or Configuration User Defined user defined CAS Latency 3 Selects the number of clock cycles required to address a 2 column in memory Auto default SDRAM RAS to
28. ees 81 4 2 Maintenance 82 are dr Larson Loser ca c deese ifr 84 4 4 Advanced Men ien dete era iore ee oes diets Ae at aided 85 4 5 Security Men s ect teet rae AR ERR E ze gendo aero La dba 96 4 6 Power Menu s aene 97 4 7 BOoob Menu dd 98 4 8 MGM Uist Ms cote tec testes cats tenti cone eedem eran 100 4 1 Introduction The BIOS Setup program can be used to view and change the BIOS settings for the computer The BIOS Setup program is accessed by pressing the F2 key after the Power On Self Test POST memory test begins and before the operating system boot begins The menu bar is shown below Maintenance Main Advanced Security Power Boot Exit Table 50 lists the BIOS Setup program menu functions Table 50 BIOS Setup Program Menu Functions Clears Allocates Configures Sets Configures Selects boot Saves or passwords resources for advanced passwords power options and discards allows memory hardware features and security management power supply changes to settings components available features features controls Setup through the program chipset options lt gt NOTE In this chapter all exa
29. either the supervisor password or the user password to access Setup Users have access to Setup respective to which password is entered e Setting the user password restricts who can boot the computer The password prompt will be displayed before the computer is booted If only the supervisor password is set the computer boots without asking for a password If both passwords are set the user can enter either password to boot the computer Table 49 shows the effects of setting the supervisor password and user password This table is for reference only and is not displayed on the screen Table 49 Supervisor and User Password Functions Supervisor Password to Password Password Set Mode User Mode Setup Options Enter Setup During Boot Neither Can change all Can change all None None None options options Supervisor Can change all Can changea Supervisor Password Supervisor None only options limited number of options User only N A Can change all Enter Password User User options Clear User Password Supervisor Can change all Can changea Supervisor Password Supervisor or Supervisor or and user set options limited number Enter Password user user of options 2 If no password is set any user can change all Setup options For information about Refer to Setting user and supervisor passwords Section 4 5 page 96 4 BIOS Setup Program What This Chapter Contains 4 1 IntrodicliOn ute or reete aede i eh eed ec ee
30. memory open to PCI bus 640 K 800 K Video memory and BIOS 639 K 640 K Extended BIOS data movable by memory manager software 512 K 639 Extended conventional memory 0K 512K Conventional memory 39 Intel Desktop Board D810E2CB Technical Product Specification 2 3 Map 40 Table 15 I O Map Address hex 0000 000F 0020 0021 0040 0043 0060 0061 0064 0070 0071 0072 0073 0080 008F 0092 00A0 00A1 00B2 00B3 00C0 00DF OOFO 0170 0177 01F0 01F7 02E8 O2bEF 02F8 02FF 0376 0377 bits 6 0 03B0 03C0 OSE8 03 6 8 Description 16 bytes DMA controller 2 bytes Programmable Interrupt Controller PIC 4 bytes System timer 1 byte Keyboard controller byte reset IRQ 1 byte System speaker 1 byte Keyboard controller CMD STAT byte 2 bytes System CMOS Real Time Clock RTC 2 bytes System CMOS 16 bytes DMA controller 1 byte Fast A20 and PIC 2 bytes PIC 2 bytes Reserved 32 bytes DMA 1 byte Numeric data processor 8 bytes Secondary IDE channel 8 bytes Primary IDE channel 8 bytes COM4 video 8514A 8 bytes COM2 1 byte Secondary IDE channel command port 7 bits Secondary IDE channel status port 12 bytes Intel 82810E DC100 Graphics Memory Controller Hub GMCH 32 byte Intel 82810E Graphics Memory Controller Hub GMCH 8 bytes COM3 1 byte Primary IDE channel command port 8 bytes continue
31. nnne 93 4 4 6 Event Log Configuration 94 4 4 7 Video Configuration dioit eranc oo ro dE rera t en a E Reid ROS 95 4 5 SecuUry Men ss recessit do eh ted eed mde da enit dace ra bere E RUE UI I dum a cess 96 4 6 Power M MEEEEEMMMMMMEEEEMEEEMMEMMMMMEEEMMMMMMMM 97 4 7 nBOOL reri eee eae Soe is ss ah a to Ne Es os 98 4 8 Exit eee peo hed de aga e io vedere ded addi Ce eee 100 5 Error Messages and Beep Codes 51 BIOS Error Messages 3o ubere rade to oeste db a 101 5 2 Port 80h POST Codess Aus oen ves der t alvi RN p NE 103 5 9 Initialization Checkpoints see 107 5h NSA aoe Men CA 108 5 5 BIOS fear 109 Figures 1 D810E2CB Board 14 DIAGN AI NERO NN P p RECS 15 3 810E Chipset Block eter 21 4 Block Diagram of Audio Subsystem with CS4201 28 5 Back Panel Connectors oon vetat ted beatum e OH Nam 46 6 Audio Power and Hardware Control Connectors 51 7 Add in Board and Peripheral Interface Connectors
32. not the same as the last boot These values have either been corrupted or the battery has failed The time and or date values stored in CMOS are invalid Run Setup to set correct values Error during read write test of DMA controller Error occurred trying to access hard disk controller continued 101 Intel Desktop Board D810E2CB Technical Product Specification 102 Table 68 BIOS Error Messages continued Error Message Checking NVRAM Update OK Updated Failed Keyboard Is Locked Keyboard Error KB Interface Error Memory Size Decreased Memory Size Increased Memory Size Changed No Boot Device Available Off Board Parity Error On Board Parity Error Parity Error NVRAM CMOS PASSWORD cleared by Jumper CTRL Pressed Explanation NVRAM is being checked to see if it is valid NVRAM was invalid and has been updated NVRAM was invalid but was unable to be updated The system keyboard lock is engaged The system must be unlocked to continue to boot Error in the keyboard connection Make sure keyboard is connected properly Keyboard interface test failed Memory size has decreased since the last boot If no memory was removed then memory may be bad Memory size has increased since the last boot If no memory was added there may be a problem with the system Memory size has changed since the last boot If no memory was added or removed then memory may be bad System did not find a devic
33. or lt gt to select the or slave mode of the drive to boot from 2 Press Enters 3 Use T or lt gt to select 1 IDE 4 Press Enter to set the selection Notes 1 2 3 4 ARMD FDD ATAPI removable device floppy disk drive ARMD HDD ATAPI removable device hard disk drive HDD Hard Disk Drive This boot device is available only when the onboard LAN subsystem is present 99 Intel Desktop Board D810E2CB Technical Product Specification 4 8 Exit Menu Maintenance Main Advanced Security Power Boot The menu represented in Table 67 is for exiting the BIOS Setup program saving changes and loading and saving defaults Table 67 Exit Menu Feature Description Exit Saving Changes Exits and saves the changes in CMOS SRAM Exit Discarding Changes Exits without saving any changes made in the BIOS Setup program Load Setup Defaults Loads the factory default values for all the Setup options Load Custom Defaults Loads the custom defaults for Setup options Save Custom Defaults Saves the current values as custom defaults Normally the BIOS reads the Setup values from flash memory If this memory is corrupted the BIOS reads the custom defaults If no custom defaults are set the BIOS reads the factory defaults Discard Changes Discards changes without exiting Setup The option values present when the computer was turned on are used 100 5 Error Messages Beep Codes
34. pin dual inline memory module DIMM sockets Supports up to 512 MB of 100 MHz non ECC synchronous DRAM SDRAM e Support for serial presence detect SPD and non SPD DIMMs Intel 810E chipset consisting of Intel 82810E Graphics Memory Controller Hub GMCH Intel 82801BA I O Controller Hub ICH2 SST 49LF004A 4 Mbit Firmware Hub FWH Intel 82810 GMCH VGA port connector on back panel Audio Codec 97 AC 97 compatible audio subsystem consisting of the following e Intel 82801BA ICH2 AC link output CS4201 analog codec LPC47M102 Low Pin Count LPC I O controller e Four universal serial bus USB ports two back panel two front panel e Two IDE interfaces with Ultra ATA 66 100 support One diskette drive interface e One serial port One parallel port e PS 2t keyboard and mouse ports Two PCI bus add in card connectors e Intel AMI BIOS stored an SST 49LF004A 4 Mbit firmware hub FWH Support for Advanced Configuration and Power Interface ACPI Advanced Power Management APM Plug and Play and SMBIOS Support for PCI Local Bus Specification Revision 2 2 Suspend to RAM support e Wake from USB ports The D810E2CB board is designed to support only USB aware operating systems Product Description For information about Refer to The board s compliance level with ACPI APM Plug and Play and SMBIOS Table 3 page 16 1 1 2 Manufacturing Options Table 2 descr
35. the Bi directional Parallel port is disabled default Output Only operates in ATt compatible mode EPP Bi directional operates in PS 2 compatible mode ECP EPP is Extended Parallel Port mode a high speed bi directional mode ECP is Enhanced Capabilities Port mode a high speed bi directional mode continued 88 BIOS Setup Program Table 58 Peripheral Configuration Submenu continued Feature Options Description Base l O address e 378 default Specifies the base I O address for the parallel port This feature is present 278 only when Parallel Port is set to Enabled Interrupt IRQ 5 Specifies the interrupt for the parallel port This feature is present IRQ7 only when Parallel Port default is set to Enabled DMA 1 Specifies the DMA channel This feature is present 3 default only when Parallel Port Mode is set to ECP Audio Device Disabled Enables or disables the onboard audio subsystem Enabled default LAN Device Disabled Enables or disables the LAN device Enabled default Legacy USB Support Disabled Enables or disables USB legacy support Enabled See Section 3 5 on page 75 for more information default 89 Intel Desktop Board D810E2CB Technical Product Specification 4 4 4 IDE Configuration Submenu To access this submenu select Advanced on the menu bar then IDE Configuration Security Power Boot Exit The menu represented in Table 59 is used to configure IDE devic
36. the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when using this feature can damage the power supply Refer to Section 2 11 2 on page 66 for additional information Instantly Available technology enables the board to enter the ACPI S3 Suspend to RAM sleep state While in the S3 sleep state the computer will appear to be off The power supply appears to be off the fans are off and the front panel power LED will be yellow unless a single color LED is installed in which case it will be off When signaled by a wake up device or event the system quickly returns to its last known wake state Table 10 on page 33 lists the devices and events that can wake the computer from the S3 state The D810E2CB board supports the PCI Bus Power Management Interface Specification For information on the versions of this specification see Section 1 3 Add in boards that also support this specification can participate in power management and can be used to wake the computer The use of Instantly Available technology requires operating system support and PCI 2 2 compliant add in cards and drivers 1 12 3 5 Wake on Ring lt gt NOTE 36 Wake on Ring requires the use of a modem external USB or modem connected to serial port A that supports the Wake on Ring feature The operation of Wake on Ring can be summarized as follows Powers up the computer from the ACPI 55 state or from
37. 1 7 3 Diskette Drive Controller The I O controller supports one diskette drive that is compatible with the 82077 diskette drive controller and supports both PC AT and PS 2 modes For information about Refer to The location of the diskette drive connector Figure 7 page 54 The signal names of the diskette drive connector Table 37 page 57 The supported diskette drive capacities and sizes Table 61 page 93 1 7 4 Keyboard and Mouse Interface PS 2 keyboard and mouse connectors are located on the back panel The 5 V lines to these connectors are protected with a PolySwitcht circuit that like a self healing fuse reestablishes the connection after an overcurrent condition is removed gt NOTE The keyboard is supported in the bottom PS 2 connector and the mouse is supported in the top PS 2 connector Power to the computer should be turned off before a keyboard or mouse is connected or disconnected The keyboard controller contains the AMI keyboard and mouse controller code provides the keyboard and mouse control functions and supports password protection for power on reset A power on reset password can be specified in the BIOS Setup program For information about Refer to The location of the keyboard and mouse connectors Figure 5 page 46 The signal names of the keyboard and mouse connectors Table 20 page 47 26 1 8 Graphics Subsystem Product Description The Intel 82810E GMCH graphics memory controller hub
38. 3A2 NOTE The ICH2 can connect each PIRQ line internally to one of the IRQ signals 3 4 5 6 7 10 11 14 and 15 Typically a device that does not share a PIRQ line will have a unique interrupt However in certain interrupt constrained situations it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal Technical Reference 2 8 Connectors N CAUTION Only the back panel connectors of the board and the front panel USB connectors have overcurrent protection The other internal board connectors are not overcurrent protected and should connect only to devices inside the computer chassis such as fans and internal peripherals Do not use these connectors for powering devices external to the computer chassis A fault in the load presented by an external device may result in a high output current that could damage the D810E2CB board the interconnecting cable and the external device itself This section describes the D810E2CB board s connectors The connectors can be divided into the following three groups Back panel I O connectors see page 46 PS 2 keyboard and mouse USB two Parallel port VGA Serial port LAN Audio Line out Line in and Mic in e Internal I O connectors see page 50 Audio ATAPI CD ROM and telephony Fans 2 Power Chassis intrusion Add in boards two PCI bus connectors IDE two Diskette drive e External I O connectors see page 58 Front panel
39. 6 and 8 can be connected to a front panel momentary contact power switch The switch must pull the SW_ON pin to ground for at least 50 ms to signal the power supply to switch on or off The time requirement is due to internal debounce circuitry on the board At least two seconds must pass before the power supply will recognize another on off signal 2 8 3 2 Front Panel USB Connector Table lists the signal names of the front panel USB connector Table 41 Front Panel USB Connector J8B1 Pin Signal Name i Signal Name 1 VREG FP USB PWR VREG FP USB PWR 3 ICH U 2 ICH U 5 ICH U P2 ICH U P3 7 Ground 9 Key no pin U OC1 24 60 Technical Reference 2 9 Jumper Block N CAUTION Do not move any jumpers with the power on Always turn off the power and unplug the power cord from the computer before changing a jumper setting Otherwise damage to the D8IOE2CB board could occur Figure 9 shows the location of the BIOS Setup jumper block This 3 pin jumper block determines the BIOS Setup program s mode Table 42 describes the jumper settings for the three modes normal configure and recovery n cu 2 a BEL L pn DL ve B 3
40. B Legacy Support USB legacy support enables USB devices such as keyboards mice and hubs to be used even when the operating system s USB drivers are not yet available USB legacy support is used to access the BIOS Setup program and to install an operating system that supports USB By default USB legacy support is set to Enabled USB legacy support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 USB legacy support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu 4 POST completes 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if USB legacy support was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and USB legacy support from the BIOS is no longer used To install an operating system that supports USB verify that USB Legacy support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions lt gt NOTE USB legacy support is for keyboards mice and hubs only Other USB devices are not supported in legacy mode 75 Intel Desktop Board D810E2CB Technical
41. Boot Configuration SUDImelll es asco oc e optem oS eH une En eae PUB enet 87 Peripheral Configuration SUMO scien set hese neon ecco re eh ien aa sea te RE 88 IDE Configuration 90 Primary Secondary IDE Master Slave 91 Diskette Configuration 93 Contents Event Log Gontrig ration SUDImiellli outre erbe ER b BUTS sete 94 Video Configuration 95 Sec rnty Men acides ani aile NO SNR e bre tht AR nds 96 xem MP 97 Boot MENU rr p 98 SANLI 100 BIOS Error MeSSageS a a T A 101 Uncompressed INIT Code 103 Boot Block Recovery Code Check 103 Runtime Code Uncompressed in F000 Shadow RAM 104 Bus Initialization Ghieckpolhls oco eee hin Eee ege One era dal eite ERE TRU LA 107 Upper Nibble High Byte 107 Lower Nibble High Byte Functions Seis e orte Te bI reb prt Eee serrer 108 BCP COGS CIAR Lr MEL reu 109 Intel Desktop Boa
42. CAS 3 Selects the number of clock cycles between addressing a delay 2 row and addressing a column Auto default SDRAM RAS 3 Selects the length of time required before accessing a Precharge 2 new row Auto default 83 Intel Desktop Board D810E2CB Technical Product Specification 4 3 Main Menu 84 To access this menu select Main on the menu bar at the top of the screen Advanced Security Power Boot Exit Table 54 describes the Main Menu This menu reports processor and memory information and is for configuring the system date and system time Table 54 Main Menu Feature Options Description BIOS Version Displays the version of the BIOS Processor Type Displays processor type Processor Speed Displays processor speed Front Side Bus Displays the system bus speed Speed Cache RAM Displays the size of second level cache Total Memory Displays the total installed SDRAM memory Memory Bank 0 Displays SDRAM or Not Installed indicating the presence Memory Bank 1 No options or absence of memory in Memory Banks 0 and 1 Language English default Selects the current default language used by the BIOS Fran ais Portugues CHR System Time Hour minute and Specifies the current time second System Date Month day and year Specifies the current date BIOS Setup Program 4 4 Advanced Menu To access this menu select Advanced on the menu bar at the top of the screen PCI Configuration Table 55 d
43. Current 66 2 11 4 Fan Power Hegulremeltits co rere EO te Niet c Eat Dese ee 66 212 Thermal GonsiderallOFis 67 2 1 3 med e tad 68 2 14 Envitopfetital d soos 69 2 15 Regulatory COM Plane int soie sere Co rese dor ERE 70 2 15 1 Safety Regulations ice eds ooo rettet adip Ros tet ered n veio edi iof cane 70 2352 EMG Regulations Petite aet bet manie scire egenis 70 2 15 3 Product Certification Markings Board 71 Overview of BIOS Features SN IN eer CLR 73 3 2 BIOS Flash Memory Orga Mi Za Mex s ecc oec abere pr nente er moteur espe dt rote poe tc seus 73 9 9 Resource Configuration Santas ese pae ai ee Rea DG d ue uter 74 3 3 1 POLAUtOcOhfIQuratiOrz uo eerta tci he tang e dte atate ibd re gai 74 3 3 2 POLIDE SUDO onte etre EE dates 74 3 4 System Management BIOS 75 3 5 USB Legacy SU Oe a dedi deena decane sale dae dotate eps 75 B20 SO SESS eC een kas 76 3 6 1 Language SUDDON 76 3 6 2 Custom Splash Screen e sedeo dite m Reston senes Cnb dece RON Eres 76 3 7 Recovering BIOS Bala irr hada aro date o
44. IOS see Section 1 3 3 3 2 PCIIDE Support 74 If you select Auto in the BIOS Setup program the BIOS automatically sets up the two PCI IDE connectors with independent I O channel support The IDE interface supports hard drives up to Ultra ATA 100 and recognizes any ATAPI compliant devices including CD ROM drives tape drives and Ultra DMA drives see Section 1 3 for the supported version of ATAPI The BIOS determines the capabilities of each drive and configures them to optimize capacity and performance To take advantage of the high capacities typically available today hard drives are automatically configured for Logical Block Addressing LBA and to PIO Mode 3 or 4 depending on the capability of the drive You can override the auto configuration options by specifying manual configuration in the BIOS Setup program To use Ultra ATA 66 100 features the following items are required e Ultra ATA 66 100 peripheral device e Ultra ATA 66 100 compatible cable e Ultra ATA 66 100 operating system device drivers NOTE Ultra ATA 66 100 compatible cables are backward compatible with drives using slower IDE transfer protocols If an Ultra ATA 66 100 disk drive and a disk drive using any other IDE transfer protocol are attached to the same cable the maximum transfer rate between the drives is reduced to that of the slowest device NOTE Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device For exam
45. Intel Desktop Board 810 2 Technical Product Specification n January 2001 Order Number A44673 001 The Intel Desktop Board D810E2CB may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are documented in the Intel Desktop Board D810E2CB Specification Update Revision History Revision Revision History Date 001 First release of the Intel Desktop Board D810E2CB Technical Product January 2001 Specification This product specification applies to only standard D810E2CB boards with BIOS identifier CB81010A 86A Changes to this specification will be published in the Intel Desktop Board D810E2CB Specification Update before being incorporated into a revision of this document INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT Intel Corporation may have patents or pending patent applications trademarks copyrights or other intellectual property rights that relate to the presented subject matter The furnishing of docum
46. Product Specification 3 6 BIOS Updates The BIOS can be updated using either of the following utilities which are available on the Intel World Wide Web site e Intel Express BIOS Update utility which enables automated updating while in the Windows environment Using this utility the BIOS can be updated from a file on a hard disk a 1 44 MB diskette or a CD ROM or from the file location on the Web e Intel Flash Memory Update Utility which requires creation of a boot diskette and manual rebooting of the system Using this utility the BIOS can be updated from a file on a 1 44 MB diskette from a legacy diskette drive or an LS 120 diskette drive or a CD ROM Both utilities support the following BIOS maintenance functions e Verifying that the updated BIOS matches the target system to prevent accidentally installing an incompatible BIOS e Updating both the BIOS boot block and the main BIOS This process is fault tolerant to prevent boot block corruption e Updating the BIOS boot block separately e Changing the language section of the BIOS e Updating replaceable BIOS modules such as the video BIOS module e Inserting a custom splash screen NOTE Review the instructions distributed with the upgrade utility before attempting a BIOS update For information about Refer to The Intel World Wide Web site Section 1 2 page 16 3 6 1 Language Support The BIOS Setup program and help messages are supported in five languages US Eng
47. Sian hes dba it edes 42 25 PCI Configuration Space Map uc eie rete 42 Pn Itetuple d ado iv LLL ces C EE eM LU T ET 43 2 7 PCI Interrupt Routing Cep Ie eia pete nl i eate coca aded 44 2 9 e faciie uer e M 45 2 Jumper dieat 61 2 10 Mechanical 63 2 T1 Electrical Considerations oo cet it 65 2 12 Thermal Considerations esseeesseeee ee nn nennen nnne nnne 67 213 Sz E VEEE A E S TE ERE EO 68 2 14 Environment l tee eerte ee nale ieu es eer dise sender 69 2 15 Regulatory Gorpllafiee od eris oret pent beds dete e ende pa lota pe pias 70 2 1 Introduction Sections 2 2 2 6 contain several standalone tables Table 14 describes the system memory map Table 15 shows the I O map Table 16 lists the DMA channels Table 17 defines the PCI configuration space map and Table 18 describes the interrupts The remaining sections in this chapter are introduced by text found with their respective section headings 2 2 Memory Map Table 14 System Memory Map Address Range decimal Address Range hex Size Description 1024 K 524288 K Extended memory 960 K 1024 K Runtime BIOS 896 K 960 K Reserved 800 K 896 K C8000 DFFFF 96 KB Available high DOS
48. Specifies the power on state of the Numlock feature on the On default numeric keypad of the keyboard Yes 87 Intel Desktop Board D810E2CB Technical Product Specification 4 4 3 Peripheral Configuration Submenu To access this submenu select Advanced on the menu bar then Peripheral Configuration Security Power Boot Exit The submenu represented in Table 58 is used for configuring computer peripherals Table 58 Peripheral Configuration Submenu Feature Options Description Serial port A e Disabled Configures serial port A Enabled Auto assigns the first free COM port normally COM1 the Auto default address 3F8h and the interrupt IRQ4 An asterisk displayed next to an address indicates a conflict with another device Base I O address 3F8 default Specifies the base I O address for serial port A if serial port This feature is present 2F8 A is Enabled only when Serial Port A is set to Enabled 3E8 2E8 Interrupt IRQ 3 Specifies the interrupt for serial port A if serial port A is This feature is present 4 Enabled only when Serial Port A default is set to Enabled Parallel port Disabled Configures the parallel port Enabled Auto assigns LPT1 the address 378h and the interrupt IRQ7 Auto default An asterisk displayed next to an address indicates a conflict with another device Mode Output Only Selects the mode for the parallel port Not available if
49. System integrators should ensure that proper airflow is maintained in the voltage regulator circuit item C in Figure 12 Components in this area could be damaged without adequate airflow 2 13 Reliability 68 The mean time between failures MTBF prediction is calculated using component and subassembly random failure rates The calculation is based on the Bellcore Reliability Prediction Procedure TR NWT 000332 Issue 4 September 1991 The MTBF prediction is used to estimate repair rates and spare parts requirements The Mean Time Between Failures MTBF data is calculated from predicted data at 55 C D810E2CB board MTBF 180193 17 hours Technical Reference 2 14 Environmental Table 46 lists the environmental specifications for the D810E2CB board Table 46 Environmental Specifications Parameter Specification Temperature Non Operating 40 C to 70 Operating 0 C to 55 C Shock Unpackaged 30 g trapezoidal waveform Velocity change of 170 inches second Packaged Half sine 2 millisecond Velocity Change inches sec 24 Vibration Unpackaged 5 Hz to 20 Hz 0 01 g Hz sloping up to 0 02 g Hz 20 Hz to 500 Hz 0 02 g Hz flat Packaged 10 Hz to 40 Hz 0 015 g Hz flat 40 Hz to 500 Hz 0 015 g Hz sloping down to 0 00015 g Hz 69 Intel Desktop Board D810E2CB Technical Product Specification 2 15 Regulatory Compliance This section describes the D810E2CB board s compliance with U S and international safety an
50. Table 10 lists the devices or specific events that can wake the computer from specific states Table 10 ACPI Wake up Devices and Events These devices events can wake up the computer from this state Power switch 1 S3 S5 RTC alarm 51 S3 S5 LAN 1 S3 1 S3 USB 1 S3 PS 2 81 S3 1 12 1 3 Plug and Play In addition to power management ACPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration ACPI is used only to enumerate and configure devices that do not have other hardware standards for enumeration and configuration PCI devices on a desktop board for example are not enumerated by ACPI 1 12 2 APM APM makes it possible for the computer to enter an energy saving standby mode The standby mode can be initiated in the following ways e Time out period specified in the BIOS Setup program e Suspend Resume switch connected to the front panel sleep connector e From the operating system such as the Suspend menu item in Windows 98 SE In standby mode the board can reduce power consumption by spinning down hard drives and reducing power to or turning off VESAT DPMS compliant monitors Power management mode can be enabled or disabled in the BIOS Setup program While in standby mode the system retains the ability to respond to external interrupts and service requests such as incoming faxes or network messages Any keyboard or mouse activi
51. al names of the USB connectors on the back panel Table 21 page 47 The location of the USB connectors on the front panel Figure 8 page 58 The signal names of the USB connectors on the front panel Table 41 page 60 The USB and UHCI specifications Table 3 page 16 Product Description 1 6 3 IDE Support The ICH2 s IDE controller has two independent bus mastering IDE interfaces that can be independently enabled The IDE interfaces support the following modes e Programmed I O PIO processor controls data transfer 823T style DMA DMA offloads the processor supporting transfer rates of up to 16 MB sec e Ultra DMA DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 33 MB sec e Ultra ATA 66 DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB sec ATA 66 protocol is similar to Ultra DMA and is device driver compatible e Ultra ATA 100 DMA protocol on IDE bus allows host and target throttling The ICH2 Ultra ATA 100 logic can achieve read transfer rates up to 100 MB sec and write transfer rates up to 88 MB sec gt NOTE ATA 100 and ATA 66 use faster timings and require a specialized cable to reduce reflections noise and inductive coupling The IDE interfaces also support ATAPI devices such as CD ROM drives and ATA devices using the transfer modes listed in Section 4 4 4 1 on page 91 The BIOS supports logical block addressing LBA and extended
52. ard Drive features apply only for APM operating systems 97 Intel Desktop Board D810E2CB Technical Product Specification 4 7 Boot Menu 98 To access this menu select Boot from the menu bar at the top of the screen IDE Drive Configuration The menu represented in Table 66 is used to set the boot features and the boot sequence Table 66 Boot Menu Feature Options Description Silent Boot Disabled Disabled displays normal POST messages Enabled displays OEM graphic instead of POST messages Intel Rapid BIOS e Disabled Enables the computer to boot without running certain POST Boot tests Scan User Flash Disabled default Enables the BIOS to scan the flash memory for user binary Area Enabled files that are executed at boot time After Power Stays Off Specifies the mode of operation if an AC power loss occurs Failure e Last State default Stay Off keeps the power off until the power button is Power On pressed Last State restores the previous power state before power loss occurred Power On restores power to the computer Wake on Modem Stay Off default In APM mode only specifies how the computer responds to Ring e Power On an incoming call on an installed modem when the power is off Wake on LAN Stay Off default In APM mode only determines how the system responds to a Power On LAN wake up event Wake on PME Stay Off default In APM mode only determines how the s
53. buses init system static output devices to start if present See Section 5 3 for details of different buses To give control for any setup required before optional video ROM check To look for optional video ROM and give control To give control to do any processing after video ROM returns control If EGA VGA not found then do display memory R W test EGA VGA not found Display memory R W test about to begin Display memory R W test passed About to look for the retrace checking Display memory R W test or retrace checking failed To do alternate display memory R W test Alternate display memory R W test passed To look for the alternate display retrace checking Video display checking over Display mode to be set next Display mode set Going to display the power on message Different buses init input IPL general devices to start if present See Section 5 3 for details of different buses Display different buses initialization error messages See Section 5 3 for details of different buses New cursor position read and saved To display the Hit DEL message continued Table 71 Code 40 42 43 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 57 58 59 60 62 65 66 7F 80 81 82 83 Error Messages and Beep Codes Runtime Code Uncompressed in F000 Shadow RAM continued Description of POST Operation To prepare the descriptor tables To enter in virtual mode for memo
54. cation Table 74 describes the lower nibble of the high byte and indicates the bus on which the routines are being executed Table 74 Lower Nibble High Byte Functions Value Description Generic DIM Device Initialization Manager Onboard system devices ISA devices not supported EISA devices not supported ISA PnP devices not supported oy A N o PCI devices 5 4 Speaker A 47 Q inductive speaker is mounted on the D810E2CB board The speaker provides audible error code beep code information during the power on self test POST For information about Refer to The location of the onboard speaker Figure 1 page 14 108 Error Messages and Beep Codes 5 5 BIOS Beep Codes Whenever a recoverable error occurs during power on self test POST the BIOS displays an error message describing the problem see Table 75 The BIOS also issues a beep code one long tone followed by two short tones during POST if the video configuration fails a faulty video card or no card installed or if an external ROM module does not properly checksum to zero An external ROM module for example a video BIOS can also issue audible errors usually consisting of one long tone followed by a series of short tones For more information on the beep codes issued check the documentation for that external device There are several POST routines that issue a POST terminal error and shut down the system if they fail Before shutting down the
55. ce Detect Specification Table 3 page 16 Obtaining copies of PC SDRAM specifications http Awww intel com design pcisets memory Product Description 1 6 Intel 810E Chipset The Intel 810E chipset consists of the following devices 82810E Graphics Memory Controller Hub GMCH with Accelerated Hub Architecture AHA bus 82801BA I O Controller Hub ICH2 with AHA bus SST 49LF004A Firmware Hub FWH The GMCH is a centralized controller for the system bus the memory bus the AGP bus and the Accelerated Hub Architecture interface The ICH2 is a centralized controller for the board s I O paths The FWH provides the nonvolatile storage of the BIOS The component combination provides the chipset interfaces as shown in Figure 3 ATA 66 100 Network 66 100 133 MHz USB gt System Bus y 810E Chipset y y Y 82810E 82801 SST 49LF004A Graphics Memory AHA Controller Hub Bus gt yo i Hub lt lt ME GMCH LPC Bus Display Interface SMBus AC Link 100MHz SDRAM Bus v v v v v OM11129 Figure 3 Intel 810E Chipset Block Diagram For information about Refer to The Intel 810E chipset http www developer intel com The resources used by the chipset Chapter 2 The chipset s compliance with ACPI and AC 97 Table 3 page 16 21 Intel Desktop Board D810E2CB Technical Product Specification
56. component provides the following graphics support features e Integrated 2 D and 3 D graphics engines e Integrated hardware motion compression engine Integrated 220 MHz DAC Table 6 lists the refresh rates supported by the graphics subsystem 6 Supported Graphics Refresh Rates Resolution 640 x 200 x 16 colors 640 x 350 x 16 colors 640 x 400 x 256 colors 640 x 400 x 64 K colors 640 x 400 x 16 M colors 640 x 480 x 16 colors 640 x 480 x 256 colors 640 x 480 x 32 K colors 640 x 480 x 64 K colors 640 x 480 x 16 M colors 800 x 600 x 256 colors 800 x 600 x 32 K colors 800 x 600 x 64 K colors 800 x 600 x 16 M colors 1024 x 768 x 256 colors 1024 x 768 x 32 K colors 1024 x 768 x 64 K colors 1024 x 768 x 16 M colors 1056 x 800 x 16 colors 1280 x 1024 x 256 colors 1280 x 1024 x 32 K colors 1280 x 1024 x 64 K colors 1280 x 1024 x 16 M colors For information about Obtaining graphics software and utilities Available Refresh Rates Hz 70 70 60 70 75 85 60 70 75 85 70 60 72 75 85 60 70 72 75 85 60 75 85 60 70 72 75 85 60 70 72 75 85 60 75 85 60 70 72 75 85 60 70 72 75 85 60 70 72 75 85 60 70 75 85 60 75 85 60 70 72 75 85 60 70 72 75 85 70 60 70 72 75 85 60 75 85 60 70 72 75 60 70 72 75 85 Refer to http support intel com support motherboards desktop 27 Intel Desktop Board D810E2CB Technical Product Specification 1 9 A
57. cylinder head sector ECHS translation modes The drive reports the transfer rate and translation mode to the BIOS The D810E2CB board supports laser servo LS 120 diskette technology through its IDE interfaces An LS 120 drive can be configured as a boot device by setting the BIOS Setup program s Boot menu to one of the following ARMD FDD ATAPI removable media device floppy disk drive ARMD HDD ATAPI removable media device hard disk drive For information about Refer to The location of the IDE connectors Figure 7 page 54 The signal names of the IDE connectors Table 36 page 56 BIOS Setup program s Boot menu Table 66 page 98 23 Intel Desktop Board D810E2CB Technical Product Specification 1 6 4 Real Time Clock CMOS SRAM and Battery The real time clock is compatible with DS1287 and MC146818 components The clock provides a time of day clock and a multicentury calendar with alarm features and century rollover The real time clock supports 256 bytes of battery backed CMOS SRAM in two banks that are reserved for BIOS use A coin cell battery powers the real time clock and CMOS memory When the computer is not plugged into a wall socket the battery has an estimated life of three years When the computer is plugged in the 3 3 V standby current from the power supply extends the life of the battery The clock is accurate to 13 minutes year at 25 with 3 3 VSB applied The time date and CMOS values can be speci
58. d The D810E2CB board supports either an Intel Pentium Ill processor FCPGA package or an Intel Celeron processor PGA package as shown in Table 4 The system bus frequency is automatically selected Table 4 Supported Processors Processor Type Processor Designation System Bus Frequency L2 Cache Size Pentium IIl processors 500E 550E 600E 650 700 100 MHz 256 KB 750 800 and 850 MHz 533B 600EB 667 733 133 MHz 256 KB 800EB 866 and 933 MHz 1 0B GHz 133 MHz 256 KB Celeron processors 800 MHz 100 MHz 128 KB 400 433 466 500 533 66 MHz 128 KB 533A 566A 600 633 667 700 733 and 766 MHz supported onboard memory can be cached up to the cachability limit of the processor For information about Refer to Processor support for the D810E2CB board http support intel com support motherboards deskto p Processor data sheets http www intel com design litcentr Intel Desktop Board D810E2CB Technical Product Specification 1 5 System Memory lt gt NOTE 20 To be compliant with applicable Intel SDRAM memory specifications the D810E2CB board should be populated with DIMMs that support the Serial Presence Detect SPD data structure If your memory modules do not support SPD the BIOS will attempt to configure the memory controller for normal operation however the DIMMs may not function at their optimum speed CAUTION Before installing or removing memory make sure that AC power has been remove
59. d Technical Reference Table 15 1 0 Map continued Address hex Sie Description 04D0 04D1 Edge level triggered PIC OCF8 OCFB PCI configuration address register OCF9 Turbo and reset control register OCFC OCFF PCI configuration data register E800 E8FF ICH2 Audio controller ICH2 Audio bus master FFA7 Primary bus master IDE registers FFA8 FFAF Secondary bus master IDE registers 96 contiguous bytes starting on a ICH2 ACPI TCO 128 byte divisible boundary 64 contiguous bytes starting on a D810E2CB Board Resource 64 byte divisible boundary 64 contiguous bytes starting on a ICH2 LAN controller 64 byte divisible boundary 32 contiguous bytes starting on a ICH2 USB Controller 1 32 byte divisible boundary 32 contiguous bytes starting on a ICH2 USB Controller 2 32 byte divisible boundary 16 contiguous bytes starting on a ICH2 SMBus 16 byte divisible boundary 4096 contiguous bytes starting on Intel 82801BA PCI Bridge a 4096 byte divisible boundary 96 contiguous bytes starting on a LPC47M102 I O controller 128 byte divisible boundary Notes 1 Default but can be changed to another address range 2 Dword access only 3 Byte access only NOTE Some additional I O addresses are not available due to ICH2 addresses aliasing For information about Refer to ICH2 addressing Section 1 2 page 16 41 Intel Desktop Board D810E2CB Technical Product Spec
60. d electromagnetic compatibility EMC regulations 2 15 1 Safety Regulations Table 47 lists the safety regulations the D810E2CB board complies with when correctly installed in a compatible host system Table 47 Safety Regulations Regulation UL 1950 CSA C22 2 No 950 3 edition EN 60950 2 Edition 1992 with Amendments 1 2 3 and 4 IEC 60950 2 Edition 1991 with Amendments 1 2 3 and 4 EMKO TSE 74 SEC 207 94 2 15 2 EMC Regulations Title Bi National Standard for Safety of Information Technology Equipment including Electrical Business Equipment USA and Canada The Standard for Safety of Information Technology Equipment including Electrical Business Equipment European Union The Standard for Safety of Information Technology Equipment including Electrical Business Equipment International Summary of Nordic deviations to EN 60950 Norway Sweden Denmark and Finland Table 48 lists the EMC regulations the D810E2CB board complies with when correctly installed in a compatible host system Table 48 EMC Regulations Regulation FCC Class B ICES 003 Class B EN55022 1994 Class B EN55024 1998 AS NZS 3548 Class B CISPR 22 2 Edition Class B CISPR 24 1997 70 Title Title 47 of the Code of Federal Regulations Parts 2 and 15 Subpart B Radiofrequency Devices USA Interference Causing Equipment Standard Digital Apparatus Canada Limits and methods of measu
61. d by unplugging the power cord from the computer Failure to do so could damage the memory and the board CAUTION Because the main system memory is also used as video memory the board requires 100 MHz SDRAM DIMMs even though the processor s system bus speed is 66 MHz It is highly recommended that SPD DIMMs be used since this allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance If non SPD memory is installed the BIOS will attempt to correctly configure the memory settings but performance and reliability may be impacted The D810E2CB board has two DIMM sockets The minimum memory size is 64 MB and the maximum memory size is 512 MB The BIOS automatically detects memory type size and speed Memory can be installed in one or both sockets Memory size can vary between sockets The D810E2CB board supports the following memory features 3 3 V 168 pin DIMMs with gold plated contacts e 100 MHz SDRAM e Presence Detect SPD non SPD memory BIOS recovery requires SPD DIMMs Non ECC 64 bit memory e Unbuffered single or double sided DIMMs The board is designed to support DIMMs in the configurations listed in Table 5 below Table 5 System Memory Configuration DIMM Size Non ECC Configuration 16 MB 2 Mbit x 64 32 MB 4 Mbit x 64 64 MB 8 Mbit x 64 128 MB 16 Mbit x 64 256 MB 32 Mbit x 64 For information about Refer to The PC Serial Presen
62. ded In addition to the BIOS the flash memory contains the BIOS Setup program POST the PCI auto configuration utility and Plug and Play support This D810E2CB board supports system BIOS shadowing allowing the BIOS to execute from 64 bit onboard write protected DRAM The BIOS displays a message during POST identifying the type of BIOS and a revision code The initial production BIOS is identified as CB81010A 86A For information about Refer to The board s compliance level with Plug and Play Table 3 page 16 3 2 BIOS Flash Memory Organization The SST 49LF004A Firmware Hub FWH includes a 4 Mbit 512 KB symmetrical flash memory device Internally the device is grouped into eight 64 KB blocks that are individually erasable lockable and unlockable 73 Intel Desktop Board D810E2CB Technical Product Specification 3 3 Resource Configuration 3 3 1 PCI Autoconfiguration The BIOS can automatically configure PCI devices PCI devices may be onboard or add in cards Autoconfiguration lets a user insert or remove PCI cards without having to configure the system When a user turns on the system after adding a PCI card the BIOS automatically configures interrupts the I O space and other system resources Any interrupts set to Available in Setup are considered to be available for use by the add in card Autoconfiguration information is stored in ESCD format For information about the versions of PCI and Plug and Play supported by the B
63. e options Table 59 IDE Configuration Submenu Feature Description IDE Controller Disabled Specifies the integrated IDE controller Primary Primary enables only the primary IDE controller Secondary enables only the secondary IDE controller Secondary Both enables both IDE controllers Both default Hard Disk Pre Delay Disabled default Specifies the hard disk drive pre delay 3 Seconds 6 Seconds 9 Seconds 12 Seconds 15 Seconds 21 Seconds 30 Seconds Primary IDE Master Select to display sub Reports type of connected IDE device When selected menu displays the Primary IDE Master submenu Primary IDE Slave Select to display sub Reports type of connected IDE device When selected menu displays the Primary IDE Slave submenu Secondary IDE Master Select to display sub Reports type of connected IDE device When selected menu displays the Secondary IDE Master submenu Secondary IDE Slave Select to display sub Reports type of connected IDE device When selected menu displays the Secondary IDE Slave submenu 90 BIOS Setup Program 4 4 41 Primary Secondary IDE Master Slave Submenus To access these submenus select Advanced on the menu bar then IDE Configuration and then the master or slave to be configured PCI Configuration Boot Configuration Peripheral Configuration IDE Configuration Primary IDE Master Primary IDE Slave Secondary IDE Master Secondary IDE Slave
64. e to boot A parity error occurred on an offboard card This error is followed by an address A parity error occurred in onboard memory This error is followed by an address A parity error occurred in onboard memory at an unknown address NVRAM CMOS and passwords have been cleared The system should be powered down and the jumper removed CMOS is ignored and NVRAM is cleared User must enter Setup Error Messages and Beep Codes 5 2 Port 80h POST Codes During the POST the BIOS generates diagnostic progress codes POST codes to I O port 80h If the POST fails execution stops and the last POST code generated is left at port 80h This code is useful for determining the point where an error occurred The tables below offer descriptions of the POST codes generated by the BIOS Table 69 defines the Uncompressed INIT Code Checkpoints Table 70 describes the Boot Block Recovery Code Check Points and Table 71 lists the Runtime Code Uncompressed in F000 Shadow RAM Some codes are repeated in the tables because that code applies to more than one operation Table 69 Code DO D1 D3 D4 D5 D6 D7 D8 D9 Table 70 Code EO E8 E9 EA EB EC EF Uncompressed INIT Code Checkpoints Description of POST Operation NMI is Disabled Onboard KBC RTC enabled if present Init code Checksum verification starting Keyboard controller BAT test CPU ID saved and going to 4 GB flat mode Do necessary chipset initializa
65. ecification is available from ftp download intel com pc supp platform ac97 http www teleport com acpi the Accelerated Graphics Implementers Forum at http www agpforum org http www amibios com or http www ami com download amibios99 pdf http www microsoft com hwd ev busbios amp_12 htm ATA Anonymous FTP Site ftp www dt wdc com ata ata 3 continued Table 3 Reference Name ATAPI ATX EI Torito FlexATX LPC MicroATX PCI Plug and Play SDRAM DIMMs 64 and 72 bit Specifications continued Specification Version Revision Date and Title Ownership Information Technology AT Attachment with Packet Interface Extensions T13 1153D ATX Specification Bootable CD ROM format specification FlexATX Addendum to the microATX Specification Version 1 0 Low Pin Count Interface Specification microATX Motherboard Interface Specification SFX Power Supply Design Guide PCI Local Bus Specification PCI Bus Power Management Interface Specification Plug and Play BIOS Specification PC SDRAM Unbuffered DIMM Specification PC SDRAM DIMM Specification PC Serial Presence Detect SPD Specification Version 18 August 19 1998 Contact T13 Chair Seagate Technology Version 2 01 February 1997 Intel Corporation Version 1 0 January 25 1995 Phoenix Technologies Ltd and IBM Corporation Version 1 0 March 1999 Intel Corporatio
66. ents and other materials and information does not provide any license express or implied by estoppel or otherwise to any such patents trademarks copyrights or other intellectual property rights Intel products are not intended for use in medical life saving or life sustaining applications or for any other application in which the failure of the Intel product could create a situation where personal injury or death may occur Intel may make changes to specifications and product descriptions at any time without notice The D810E2CB board may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained from Intel Corporation P O Box 5937 Denver CO 80217 9808 or call in North America 1 800 548 4725 Europe 44 0 1793 431 155 France 44 0 1793 421 777 Germany 44 0 1793 421 333 other Countries 708 296 9333 t Third party brands and names are the property of their respective owners Copyright 2001 Intel Corporation All rights reserved Preface This Technical Product Specification TPS specifies the board layout components connectors power and environmental
67. escribes the Advanced Menu This menu is used for setting advanced features that are available through the chipset Table 55 Advanced Menu Feature Options Description Extended Configuration No options If Used is displayed User Defined has been selected in Extended Configuration under the Maintenance Menu PCI Configuration Select to display Configures individual PCI slot s IRQ priority When submenu selected displays the PCI Configuration submenu Boot Configuration Select to display Configures Plug and Play and the Numlock key and submenu resets configuration data When selected displays the Boot Configuration submenu Peripheral Configuration Select to display Configures peripheral ports and devices When selected submenu displays the Peripheral Configuration submenu IDE Configuration Select to display Specifies type of connected IDE devices submenu Diskette Configuration Select to display When selected displays the Diskette Configuration submenu submenu Event Log Configuration Select to display Configures Event Logging When selected displays the submenu Event Log Configuration submenu Video Configuration Select to display Configures video features When selected displays the submenu Video Configuration submenu 85 Intel Desktop Board D810E2CB Technical Product Specification 4 4 4 PCI Configuration Submenu 86 To access this submenu select Advanced on the menu bar then PCI Con
68. fied in the BIOS Setup program The CMOS values can be returned to their defaults by using the BIOS Setup program NOTE If the battery and AC power fail the last saved defaults custom or standard will be loaded into CMOS SRAM at power on NOTE The recommended method of accessing the date in systems with Intel9 desktop boards is indirectly from the Real Time Clock RTC via the BIOS The BIOS on Intel desktop boards contains a century checking and maintenance feature This feature checks the two least significant digits of the year stored in the RTC during each BIOS request INT to read the date and if less than 60 i e 1980 is the first year supported by the PC updates the century byte to 20 This feature enables operating systems and applications using the BIOS date time services to reliably manipulate the year as a four digit value For information about Refer to Proper date access in systems with Intel desktop boards http support intel com support year2000 1 6 5 SST 49LF004A 4 Mbit Firmware Hub FWH 24 The FWH provides the following e System BIOS program e System security and manageability logic that enables protection for storing and updating of platform information 1 7 Product Description Controller The SMSC LPC47M102 I O controller provides the following features 3 3 V operation One serial port One parallel port with Extended Capabilities Port ECP and Enhanced Parallel Port EPP su
69. figuration Security Power Boot Exit Diskette Configuration Event Log Configuration Video Configuration The submenu represented by Table 56 is for configuring the IRQ priority of PCI slots individually Table 56 PCI Configuration Submenu Feature Description PCI Slot 1 IRQ Priority Auto default Allows selection of IRQ priority 3 5 9 10 PCI Slot 2 IRQ Priority Auto default Allows selection of IRQ priority BIOS Setup Program 4 4 2 Boot Configuration Submenu To access this submenu select Advanced on the menu bar then Boot Configuration PCI Configuration The submenu represented by Table 57 is for setting Plug and Play options resetting configuration data and the power on state of the Numlock key Table 57 Boot Configuration Submenu Feature Options Description Plug amp Play O S No default Specifies if manual configuration is desired No lets the BIOS configure all devices This setting is appropriate when using a Plug and Play operating system Yes lets the operating system configure Plug and Play devices not required to boot the system This option is available for use during lab testing e Yes Reset Config Data No default No does not clear the PCI PnP configuration data stored in flash memory on the next boot Yes clears the PCI PnP configuration data stored in flash memory on the next boot Numlock
70. ibes the D810E2CB board s manufacturing options Not every manufacturing option is available in all marketing channels Please contact your Intel representative to determine which manufacturing options are available to you Table 2 Manufacturing Options LAN Intel 82562ET 10 100 Mbit sec Platform LAN Connect PLC device Hardware monitor Hardware monitor component features include component e Voltage sense to detect out of range power supply voltages e Thermal sense to detect out of range thermal values Intel Desktop Board D810E2CB Technical Product Specification 1 1 3 D810E2CB Board Layout Figure 1 shows the location of the major components on the D810E2CB board gt B i Bou ES dl S D T E P p F G N 5 B L K J CS4201 Audio Codec SMSC LPC47M102 I O Controller Back panel connectors Intel 82810E GMCH Graphics Memory Controller Hub Processor socket DIMM sockets Power connector Speaker Hardware monitor Battery IDE connectors Diskette drive connector Front panel connector Intel 82801BA ICH2 I O Controller Hub SST 49LF004A 4M Mbit Firmware Hub PCI bus add i
71. ication Version Revision Date and Title Ownership System Management BIOS Universal Host Controller Interface Design Guide Universal Serial Bus Specification Wired for Management Baseline Version 2 3 1 August 12 1998 Award Software International Inc Dell Computer Corporation Hewlett Packard Company Intel Corporation International Business Machines Corporation Phoenix Technologies Limited American Megatrends Inc SystemSoft Corporation and Compaq Computer Corporation Version 1 1 March 1996 Intel Corporation Version 1 1 September 23 1998 Compaq Computer Corporation Intel Corporation Microsoft Corporation and NEC Version 2 0 December 18 1998 Intel Corporation This specification is available from http developer intel com ial wfm wfm20 design smbios index htm http www usb org developers http www usb org developers http developer intel com ial WfM wfmspecs htm Product Description 1 4 Processor CAUTION The D810E2CB board supports processors that draw a maximum of 22 Using a processor that draws more than 22 A can damage the processor the board and the power supply See the processor s data sheet for current usage requirements CAUTION Before installing or removing the processor make sure that AC power has been removed by unplugging the power cord from the computer Failure to do so could damage the processor and the boar
72. ification 2 4 DMA Channels Table 16 DMA Channels DMA Channel Number System Resource 4 Po Reserved cascade channel 2 5 PCI Configuration Space Map Table 17 PCI Configuration Space Map Number hex Number hex Number hex Description 00 00 0 J Memory controller of Intel 82810E component 00 01 Graphics controller of Intel 82810E component 00 ME Link to PCI bridge 00 MF PCI to LPC bridge 00 IDE controller 00 USB controller 1 00 SMBus controller 00 USB controller 2 00 AC 97 audio controller 00 MF AC 97 modem controller 01 08 JJ ICH2 LAN controller optional 01 J PCI bus connector 1 J3B1 01 0A 100 PCI bus connector 2 J3A2 42 Technical Reference 2 6 Interrupts Table 18 IRQ NMI A oO NI 10 11 12 13 14 15 Interrupts System Resource channel check Reserved interval timer Reserved keyboard buffer full Reserved cascade interrupt from slave PIC COM2 COM1 LAN User available User available LPT1 Parallel port if present or else user available ECP Real time clock Reserved for ICH2 system management bus Audio User available User available Onboard mouse port if present or else user available Reserved math coprocessor Primary IDE if present or else user available Secondary IDE if present or else user available Default but can be changed to another
73. ification see Section 1 3 The potential relation between 3 3 VDC and 5 VDC power rails Section 4 2 The current capability of the 5 VSB line Section 4 2 1 2 e All timing parameters Section 4 2 1 3 All voltage tolerances Section 4 2 2 2 11 3 Standby Current Requirements The 5 V standby current consumed by the D810E2CB desktop board is TBD This does not include external peripherals lt gt NOTE These standby current requirements are system configuration dependent 2 11 4 Fan Power Requirements 66 Table 44 lists the maximum DC voltage and current requirements for the fans when the board is in sleep mode or normal operating mode Power consumption is independent of the operating system used and other variables Table 44 Fan DC Power Requirements Maximum Current Amps 0 mA current limited 0 17 mA current limited 0 mA current limited 0 17 mA current limited Fan Type Chassis J7A1 Processor J2J1 For information about Refer to The location of the fan connectors Figure 6 page 51 The signal names of the processor fan connector Table 31 page 52 The signal names of the chassis fan connector Table 34 page 53 Technical Reference 2 12 Thermal Considerations N CAUTION An ambient temperature that exceeds the board s maximum operating temperature by 5 C to 10 could cause components to exceed their maximum case temperature and malfunction For information about the maxim
74. lish German Italian French and Spanish The default language is US English which is present unless another language is selected in the BIOS Setup program 3 6 2 Custom Splash Screen 76 During POST an Intel splash screen is displayed by default This splash screen can be replaced with a custom splash screen A utility is available from Intel to assist with creating a custom splash screen The custom splash screen can be programmed into the flash memory using the BIOS upgrade utility Information about this capability is available on the Intel Support World Wide Web site For information about Refer to The Intel World Wide Web site Section 1 2 page 16 Overview of BIOS Features 3 7 Recovering BIOS Data Some types of failure can destroy the BIOS For example the data can be lost if a power outage occurs while the BIOS is being updated in flash memory The BIOS can be recovered from either a 1 44 MB diskette for recovery from an LS 120 diskette drive configured as an ATAPI removable IDE device or from a CD ROM using the BIOS recovery mode When recovering the BIOS be aware of the following Because of the small amount of code available in the nonerasable boot block area there is no video support You can monitor this procedure by listening to the speaker or looking at the recovery drive LED e Two beeps and the end of activity in the recovery drive indicate successful BIOS recovery e series of continuous beeps indicates
75. mplemented On PCI bus connector 2 J3A2 this pin is connected to the SMBus clock line On PCI bus connector 2 J3A2 this pin is connected to the SMBus data line 55 Intel Desktop Board D810E2CB Technical Product Specification 56 Table 36 PCI IDE Connectors J8D1 Primary and J7E1 Secondary Pin N 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Note Signal Name Reset IDE Data 7 Data 6 Data 5 Data 4 Data 3 Data 2 Data 1 Data 0 Ground DDRQO DDRQ1 Write Read IOCHRDY DDACKO DDACK1 IRQ 14 IRQ 15 DAG1 Address 1 DAGO Address 0 Chip Select 1P Chip Select 1S Activity Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Signal Name Ground Data 8 Data 9 Data 10 Data 11 Data 12 Data 13 Data 14 Data 15 Key Ground Ground Ground Ground Ground Reserved GPIO_DMA66_Detect_Pri GPIO_DMA66_Detect_Sec DAG2 Address 2 Chip Select 3P Chip Select 3S Ground Signal names in brackets are for the secondary IDE connector Table 37 Diskette Drive Connector J6D1 Pin NI a 13 15 17 19 21 23 25 27 29 31 33 Signal Name Ground Ground Key Ground Ground Ground Ground Ground No connect Ground Ground Ground Ground No connect Ground Ground Ground Pin 10 12 14 16 18 20 22 24 26 28 30 32 34 Technical Reference Signal Name DENSEL Reserved
76. mples of the BIOS Setup Program menu bar include the maintenance menu however the maintenance menu is displayed only when the board is in configuration mode Section 2 9 on page 61 tells how to put the board in configuration mode 81 Intel Desktop Board D810E2CB Technical Product Specification Table 51 lists the function keys available for menu screens Table 51 BIOS Setup Program Function Keys BIOS Setup Program Function Key Description c lt gt Selects a different menu screen T or lt gt Selects an item Tab Selects a field Enter Executes command or selects a submenu F9 Load the default configuration values for the current menu F10 Save the current values and exits the BIOS Setup program lt Esc gt Exits the menu 4 2 Maintenance Menu 82 To access this menu select Maintenance on the menu bar at the top of the screen Main Advanced Security Extended Configuration The menu shown in Table 52 is for clearing Setup passwords and enabling extended configuration mode Setup only displays this menu in configuration mode See Section 2 9 on page 61 for configuration mode setting information Power Table 52 Maintenance Menu gt Clear All Passwords e Yes default Selecting Yes clears all passwords No gt Clear BIS Credentials e Yes default Selecting Yes clears the WfM BIS Boot Integrity No Service credentials gt Extended Configuration e Default
77. n Version 1 0 September 29 1997 Intel Corporation Version 1 0 December 1997 Intel Corporation Version 1 0 December 1997 Intel Corporation Version 2 2 December 18 1998 PCI Special Interest Group Version 1 1 December 18 1998 PCI Special Interest Group Version 1 0a May 5 1994 Compaq Computer Corp Phoenix Technologies Ltd and Intel Corporation Version 1 0 February 1998 Intel Corporation Version 1 5 November 1997 Intel Corporation Version 1 2A December 1997 Intel Corporation Product Description This specification is available from T13 Anonymous FTP Site ftp fission dt wdc com x3t13 project d1153r18 pdf http developer intel com design motherbd atx htm the Phoenix Web site at http www ptltd com techs specs html http www teleport com ffsupprt spec FlexAT Xaddn1_01 pdf http www intel com design chipsets industry Ipc htm http www teleport com ffsupprt spec http www teleport com ffsupprt spec microatx sfx11 ps pdf http www pcisig com http www pcisig com ftp download intel com ial wftm bio10a pdf http www intel com technology memory http www intel com technology memory http www intel com technology memory continued Intel Desktop Board D810E2CB Technical Product Specification Table 3 Reference Name SMBIOS UHCI USB WfM Specifications continued Specif
78. n viii System Memory pereo Bea I soe De Haie eee 39 VO ou Dd Ed 40 iol Portes citate ERE 42 PCI Configuration Space Map sci eria toe Wate e oed oan Rate sees UO ce 42 43 PCI Interrupt Routing 2 2 2 nhe nne 44 PS 2 Mouse KeyDOSEd ere o reb bb e prit E ndo ses eo dp Rte diee ete 47 USE POMS itv t EI TEM 47 c 47 LL CHO 48 Senal PONE ter PNE PR PR RN 48 EAN Optional mp Rt 48 Audio d TC PEN 49 Audio ate ECM bea de xe LEE LA Dd LU dA eas 49 Mic ag 1 i re iro ite RM LEN 49 ATAPI CD ROM Connector 52 Telephony Connector 42D D nce opor i ne eo ee vibe vr REIN Rr aperi 52 Processor Fan Connector J2J1 iat aio doe atate etudes qe abad 52 Power Connector dd E T ated 53 Chassis Intrusion Connector 2 53 Chassis Fan Connector io dci ere nine eee PR ope eda Peer eet wean 59 PCI Bus Connectors J3A2 and 9381 55 PCI IDE Connectors J8D1 Primary and J7E1 56 Diskette Drive Connector 9601 57 Front Panel Connector
79. n 1 12 3 2 page 35 The locations of the fan connectors Figure 6 page 51 The signal names of the fan connectors Section 2 8 2 1 page 51 29 Intel Desktop Board D810E2CB Technical Product Specification 1 11 LAN Subsystem Optional The Network Interface Controller subsystem consists of the ICH2 with integrated LAN Media Access Controller and a physical layer interface device Features of the LAN subsystem include 1 11 1 PCI Bus Master interface CSMA CD Protocol Engine Serial CSMA CD unit interface that supports the 82562ET 10 100 Mbit sec Ethernet physical layer interface device PCI Power Management Supports APM Supports ACPI technology Supports Wake up from suspend state Wake on LANT technology For information about Refer to Obtaining LAN software and drivers Section 1 2 page 16 Intel 82562ET Platform LAN Connect Device The Intel 82562ET component provides an interface to the back panel RJ 45 connector with integrated LEDs This physical interface may alternately be provided via the CNR connector The Intel 82562ET provides the following functions Basic 10 100 Ethernet LAN connectivity Supports RJ 45 connector with status indicator LEDs on the back panel Full device driver compatibility Advanced Power Management and ACPI support Programmable transit threshold Configuration EEPROM that contains the MAC address Remote monitoring alerting 1 11 2 RJ 45 LAN Connector with Integrated LEDs
80. n card connectors VOZEZrAc Figure 1 D810E2CB Board Components 1 1 4 Block Diagram Figure 2 is a block diagram of the major functional areas of the D810E2CB board Primary Secondary IDE 4 ATA 66 100 Product Description Processor Q4 68100133 MHz Socket System Bus v 810E Chipset y Y 100MHz Memor m 82801BA SST 49LF004A SDRAM 18 1 5 Vemony Me Controller Hub gt Firmware Hub Bus Controller Hub Bus ICH2 A FWH GMCH LPC DIMM Banks Bus 1 CSMA CD AN QUII ace ae Unit Diskette Drive Interface Connector Display Interface Serial Port LPC I O Parallel Port Controller 4 PS 2 Mouse PS 2 Keyboard aa hay mum t oen Eee Onor Physical LAN Layer amp Connector Interface optional PCISlot1 PCI Bus CD ROM CI Slot 2 54201 4 Line In ee AC Li Audio Line Out gt Godec 14 Mic In connector or socket Telephony 11130 Figure 2 Block Diagram 15 Intel Desktop Board D810E2CB Technical Product Specification 1 2 Online Support To find information about Intel s D810E2CB board under Product Info or Customer Support Processor data sheets Proper date acce
81. n the shipping container Printed wiring board manufacturer s recognition mark consists of a unique UL recognized manufacturer s logo along with a flammability rating 94V 0 solder side PB part number Intel bare circuit board part number solder side A37815 001 Also includes SKU number starting with AA followed by additional alphanumeric characters Battery Side Up marking located on the component side of the board in close proximity to the battery holder 71 Intel Desktop Board D810E2CB Technical Product Specification 72 3 Overview of BIOS Features What This Chapter Contains 3 9 3 10 rr TET 73 BIOS Flash Memory 73 Resource Gontig ratioh ites utd aa 74 System Management BIOS menn 75 USE bedgacy SUPPOR ce Rc E o Le PE 75 BIOS HDOBIBSte M Cu Sia eM Mu Ai 76 5 NU dae ts Donee 77 deo ME E 78 Fast Booting Systems with Intel Rapid BIOS 78 BIOSsseculltv FaalllGs ooo ioe ted eeta rd cane ea der 80 3 1 Introduction The D810E2CB board uses an Intel AMI BIOS which is stored in flash memory and can be upgra
82. nts to do various tasks Table 72 describes the bus initialization checkpoints Table 72 Bus Initialization Checkpoints Checkpoint Description 2A Different buses init system static and output devices to start if present 38 Different buses init input IPL and general devices to start if present 39 Display different buses initialization error messages 95 Init of different buses optional ROMs from C800 to start While control is inside the different bus routines additional checkpoints are output to port 80h as WORD to identify the routines under execution In these WORD checkpoints the low byte of the checkpoint is the system BIOS checkpoint from which the control is passed to the different bus routines The high byte of the checkpoint is the indication of which routine is being executed in the different buses Table 73 describes the upper nibble of the high byte and indicates the function that is being executed Table 73 Upper Nibble High Byte Functions Value Description func 0 disable all devices on the bus concerned func 1 static devices init on the bus concerned func 2 output device init on the bus concerned func 3 input device init on the bus concerned func 4 IPL device init on the bus concerned func 5 general device init on the bus concerned func 6 error reporting for the bus concerned func 7 add on ROM init for all buses N N 107 Intel Desktop Board D810E2CB Technical Product Specifi
83. o displays screen repaints or mode changes in POST These features may add time to the boot process Try different monitors Some monitors initialize and communicate with the BIOS more quickly which enables the system to boot more quickly Overview of BIOS Features 3 9 2 Intel Rapid BIOS Boot Use of the following BIOS Setup program settings reduces the POST execution time In the Boot Menu e Set the hard disk drive as the first boot device As a result the POST does not first seek a diskette drive which saves about one second from the POST execution time e Disable Quiet Boot which eliminates display of the logo splash screen This could save several seconds of painting complex graphic images and changing video modes Enabled Intel Rapid BIOS Boot This feature bypasses memory count and the search for a diskette drive In the Peripheral Configuration submenu disable the LAN device if it will not be used This can reduce up to four seconds of option ROM boot time lt gt NOTE It is possible to optimize the boot process to the point where the system boots so quickly that the Intel logo screen or a custom logo splash screen will not be seen Monitors and hard disk drives with minimum initialization times can also contribute to a boot time that might be so fast that necessary logo screens and POST messages cannot be seen This boot time may be so fast that some drives might be not be initialized at all If this condition sho
84. ower switch FP_RESET In Reset switch 8 GND Ground 9 45V Out Power 10 N C Ground 8 eo Wem 2 8 3 1 1 Hard Drive Activity LED Connector Not connected Power Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from or written to a hard drive For the LED to function properly an IDE drive must be connected to the onboard IDE interface 2 8 3 1 2 Power Sleep Message Waiting LED Connector Pins 2 and 4 can be connected to a single or dual colored LED Table 39 shows the possible states for a single colored LED Table 40 shows the possible states for a dual colored LED Table 39 States for a One Color Power LED LED State Description Off Power off sleeping Steady Green Running Blinking Green Running message waiting Table 40 States for a Two Color Power LED LED State Description Off Power off Steady Green Running Blinking Green Running message waiting Sleeping Sleeping message waiting Steady Yellow Blinking Yellow 59 Intel Desktop Board D810E2CB Technical Product Specification NOTE To use the message waiting function ACPI must be enabled in the operating system and a message capturing application must be invoked 2 8 3 1 3 Reset Switch Connector Pins 5 and 7 can be connected to a momentary SPST type switch that is normally open When the switch is closed the board resets and runs the POST 2 8 3 1 4 Power Switch Connector Pins
85. peration in the Power On Suspend sleeping state and less than 5 watt system operation in the Suspend to RAM sleeping state Soft off feature that enables the operating system to power off the computer e Support for multiple wake up events see Table 10 on page 33 e Support for a front panel power and sleep mode switch Table 8 lists the system states based on how long the power switch is pressed depending on how ACPI is configured with an ACPI aware operating system Table8 Effects of Pressing the Power Switch and the power switch is If the system is in this state pressed for the system enters this state Off ACPI G2 S5 state Less than four seconds Power on ACPI GO state Less than four seconds Soft off Suspend On On ACPI GO state More than four seconds Fail safe power off Sleep ACPI G1 state Less than four seconds Wake up Sleep ACPI G1 state More than four seconds Power off For information about Refer to The board s compliance level with ACPI Table 3 page 16 31 Intel Desktop Board D810E2CB Technical Product Specification 1 12 1 1 32 System States and Power States Under ACPI the operating system directs all system and device power state transitions The operating system puts devices in and out of low power states based on user preferences and knowledge of how devices are being used by applications Devices that are not being used can be turned off The operating system uses information f
86. ple do not connect an ATA hard drive as a slave to an ATAPI CD ROM drive Overview of BIOS Features 3 4 System Management BIOS SMBIOS SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the management information format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as Intel LANDesk Client Manager to use SMBIOS The BIOS stores and reports the following SMBIOS information BIOS data such as the BIOS revision level Fixed system data such as peripherals serial numbers and asset tags Resource data such as memory size cache size and processor speed Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows NTT 4 0 require an additional interface for obtaining the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information For information about Refer to The board s compliance level with SMBIOS Table 3 page 16 3 5 US
87. power sleep message waiting LED power switch hard drive activity LED reset switch and infrared port Front panel USB 45 Intel Desktop Board D810E2CB Technical Product Specification 2 81 Back Panel Connectors Figure 5 shows the location of the back panel connectors EI po H D F G OM11021 Item Description Connector Color For additional Information A PS 2 mouse port Lime green See Table 20 page 47 B PS 2 keyboard port Purple See Table 20 page 47 C USB port 0 Black See Table 21 page 47 D USB port 1 Black See Table 21 page 47 E Parallel port Burgundy See Table 22 page 47 F VGA Blue See Table 23 page 48 G Serial port A Teal See Table 24 page 48 H LAN optional Not color specific See Table 25 page 48 Audio Line In Light blue See Table 26 page 49 J Audio Line Out Lime green See Table 27 page 49 K Mic In Pink See Table 28 page 49 Figure 5 Back Panel Connectors lt gt NOTE The back panel audio line out connector is designed to power headphones or amplified speakers only Poor audio quality may occur if passive non amplified speakers are connected to this output 46 Technical Reference Table 20 PS 2 Mouse Keyboard Signal Name Data Not connected Ground Fused 5 V Clock Not connected Table
88. pport Serial IRQ interface compatible with serialized IRQ support for PCI systems PS 2 style mouse and keyboard interfaces Interface for one 1 2 MB or 1 44 MB diskette drive Intelligent power management including a programmable wake up event interface PCI power management support The BIOS Setup program provides configuration options for the I O controller For information about Refer to SMSC LPC47M102 I O controller http www smsc com 1 7 1 Serial Port The D810E2CB board has one serial port connector on the back panel The serial port s NS16C550 compatible UART supports data transfers at speeds up to 115 2 kbits sec with BIOS support The serial port can be assigned as COM1 3F8h COM2 2F8h COM3 3E8h or COMA 2E8h For information about Refer to The location of the serial port connector Figure 5 page 46 The signal names of the serial port connector Table 24 page 48 1 7 2 Parallel Port The connector for the multimode bidirectional parallel port is a 25 pin D Sub connector located on the back panel In the BIOS Setup program the parallel port can be configured for the following Output only PC ATt compatible mode Bi directional PS 2 compatible EPP e ECP For information about Refer to The location of the parallel port connector Figure 5 page 46 The signal names of the parallel port connector Table 22 page 47 25 Intel Desktop Board D810E2CB Technical Product Specification
89. ration Lock key checking over To check for memory size mismatch with CMOS Memory size check done To display soft error and check for password or bypass setup Password checked About to do programming before setup Programming before setup complete To uncompress SETUP code and execute CMOS setup Returned from CMOS setup program and screen is cleared About to do programming after setup Programming after setup complete Going to display power on screen message First screen message displayed WAIT message displayed PS 2 Mouse check and extended BIOS data area allocation to be done Setup options programming after CMOS setup about to start Going for hard disk controller reset Hard disk controller reset done Hard disk setup to be done next Init of different buses optional ROMs from C800 to start See Section 5 3 for details of different buses Going to do any init before C800 optional ROM control Any init before C800 optional ROM control is over Optional ROM check and control will be done next Optional ROM control is done About to give control to do any required processing after optional ROM returns control and enable external cache Any initialization required after optional ROM test over Going to setup timer data area Return after setting timer Going to set the RS 232 base address Returned after RS 232 base address Going to do any initialization before coprocessor test Required initialization before cop
90. rd D810E2CB Technical Product Specification 1 Product Description What This Chapter Contains Tet pc Cr T 12 1 2 Online Moses ute eod teta 16 123 DESIGN SpeclHiCallOFS hata dert ird hate i ec o RR e d pee tUe pene 16 JPIODOSSOI Geste 19 1 5 System CIO ied 20 1 6 Intel GTOE GHIDSOE yc tese 21 VO E 25 1 8 Graphics 27 1 9 Audi S BSYS EM 28 1 10 Hardware Management 29 111 CAN Subsystem Optional a dpt ie 30 1 12 Power Management 31 Intel Desktop Board D810E2CB Technical Product Specification 1 1 Overview 1 1 1 Feature Summary Table 1 summarizes the D810E2CB board s major features Table 1 Feature Summary Form Factor Processor Memory Chipset Direct AGP Video Audio Control Peripheral Interfaces Expansion Capabilities BIOS Instantly Available PC lt gt NOTE FlexATX 9 00 inches by 7 50 inches Support for either an Intel Pentium IIl processor with 256 KB L2 cache in FCPGA package Intel Celeron processor with 128 KB L2 cache in a PGA package e Two 168
91. rement of Radio Interference Characteristics of Information Technology Equipment European Union Information Technology Equipment Immunity Characteristics Limits and methods of measurement European Union Australian Communications Authority Standard for Electromagnetic Compatibility Australia and New Zealand Limits and methods of measurement of Radio Disturbance Characteristics of Information Technology Equipment International Information Technology Equipment Immunity Characteristics Limits and Methods of Measurements International Technical Reference 2 15 3 Product Certification Markings Board Level The D810E2CB desktop board has the following product certification markings UL joint US Canada Recognized Component mark Consists of small c followed by a stylized backward UR and followed by a small US Includes adjacent UL file number for Intel desktop boards E210882 component side FCC Declaration of Conformity logo mark for Class B equipment to include Intel name and D810E2CB model designation solder side CE mark Declaring compliance to European Union EU EMC directive 89 336 EEC and Low Voltage directive 73 23 EEC component side The CE mark should also be on the shipping container Australian Communications Authority ACA C Tick mark consists of a stylized C overlaid with a check tick mark component side followed by Intel supplier code number N 232 The C tick mark should also be o
92. requirements and the BIOS for the D810E2CB desktop board It describes the standard product and available manufacturing options Intended Audience The TPS is intended to provide detailed technical information about the D810E2CB board and its components to the vendors system integrators and other engineers and technicians who need this level of information It is specifically not intended for general audiences What This Document Contains Chapter Description 1 A description of the hardware used on this board 2 A map of the resources of the board 3 The features supported by the BIOS Setup program 4 The contents of the BIOS Setup program s menus and submenus 5 A description of the BIOS error messages beep codes and POST codes Typographical Conventions This section contains information about the conventions used in this specification Not all of these symbols and abbreviations appear in all specifications of this type Notes Cautions and Warnings lt gt NOTE Notes call attention to important information N CAUTION Cautions are included to help you avoid damaging hardware or losing data WARNING Warnings indicate conditions which if not observed can cause personal injury Intel Desktop Board D810E2CB Technical Product Specification Other Common Notation KB Kbit MB Mbit GB xxh x x V Used after a signal name to identify an active low signal such as USBPO When used in the desc
93. ription of a component N indicates component type xn are the relative coordinates of its location on the D810E2CB board and X is the instance of the particular part at that general location For example J5J1 is a connector located at 5J It is the first connector in the 5J area Kilobyte 1024 bytes Kilobit 1024 bits Megabyte 1 048 576 bytes Megabit 1 048 576 bits Gigabyte 1 073 741 824 bytes An address or data value ending with a lowercase h indicates a hexadecimal value Volts Voltages are DC unless otherwise specified This symbol is used to indicate third party brands and names that are the property of their respective owners Contents 1 Product Description 2 SEES I mec 12 1 1 1 Feature Summary cec ero etie 12 1 1 2 Manutacturnnd Het tei bee 13 1 1 3 D810E2GB Board Layout 14 1 1 4 Block Diagrami 15 1 2 Online SUP POM dM 16 1 3 HDESIGMYSPSCHICATIONS M Rt 16 Deco HE 19 1 5 System sacar petto epe heme tele 20 116 Intel S1UE CHIDSSL a baeo nua esti 21 1 6 1 Direct AGP rn 22 1 62 oppida E ER 22 1 6 3 IDE theatro eet or 23 1 6 4 Real Time Clock CMOS SRAM and
94. rocessor is over Going to initialize the coprocessor next Coprocessor initialized Going to do any initialization after coprocessor test Initialization after coprocessor test is complete Going to check extended keyboard keyboard ID and Num Lock Going to display any soft errors Soft error display complete Going to set keyboard typematic rate Keyboard typematic rate set To program memory wait states Going to enable parity NMI NMI and parity enabled Going to do any initialization required before giving control to optional ROM at E000 Initialization before E000 ROM control over E000 ROM to get control next Returned from E000 ROM control Going to do any initialization required after E000 optional ROM control Initialization after E000 optional ROM control is over Going to display the system configuration Put INT13 module runtime image to shadow Generate MP for multiprocessor support if present Put CGA INT10 module if present in Shadow continued Error Messages and Beep Codes Table 71 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation AE Uncompress SMBIOS module and init SMBIOS code and form the runtime SMBIOS image in shadow B1 Going to copy any code to specific area 00 Copying of code to specific area done Going to give control to INT19 boot loader 5 3 Bus Initialization Checkpoints The system BIOS gives control to the different buses at several checkpoi
95. rom applications and user settings to put the system as a whole into a low power state Table 9 lists the power states supported by the board along with the associated system power targets See the ACPI specification for a complete description of the various system and power states Table 9 Global States Power States and Targeted System Power Sleeping States CPU States Device States GO working state 50 working CO working DO working state G1 sleeping state 1 CPU stopped C1 stop grant D1 D2 D3 device specification specific G1 sleeping state G2 S5 G3 mechanical off AC power is disconnected from the computer S3 Suspend to RAM Context saved to RAM S5 Soft off Context not saved Cold boot is required No power D3 no power except for wake up logic No power D3 no power except for wake up logic No power D3 no power for wake up logic except when provided by battery or external source No power to the system Targeted System Power Full power gt 30 W 5 W power lt 30 W Power 5 W Power 5W No power to the system so that service can be performed 2 Total system power is dependent on the system configuration including peripherals powered by the system chassis power supply Dependent on the standby power consumption of wake up devices used in the system Product Description 1 12 1 2 Wake up Devices and Events
96. ry test To enable interrupts for diagnostics mode To initialize data to check memory wrap around at 0 0 Data initialized Going to check for memory wrap around at 0 0 and finding the total system memory size Memory wrap around test done Memory size calculation over About to go for writing patterns to test memory Pattern to be tested written in extended memory Going to write patterns in base 640 K memory Patterns written in base memory Going to find out amount of memory below 1 M memory Amount of memory below 1 M found and verified Going to find out amount of memory above 1 memory Amount of memory above 1 M found and verified Check for soft reset and going to clear memory below 1 M for soft reset If power on go to check point 4Eh Memory below 1 M cleared SOFT RESET Going to clear memory above 1 M Memory above 1 M cleared SOFT RESET Going to save the memory size Go to check point 52h Memory test started NOT SOFT RESET About to display the first 64 memory size Memory size display started This will be updated during memory test Going for sequential and random memory test Memory testing initialization below 1 M complete Going to adjust displayed memory size for relocation shadow Memory size display adjusted due to relocation shadow Memory test above 1 M to follow Memory testing initialization above 1 M complete Going to save memory size information Memory size information is sa
97. ss in systems with Intel motherboards ICH2 addressing Custom splash screens Audio software and utilities LAN software and drivers 1 3 Design Specifications Visit this World Wide Web site http www intel com design motherbd http support intel com support motherboards deskto p http www intel com design litcentr http support intel com support year2000 http developer intel com design chipsets datashts http intel com design motherbd gen_indx htm http www intel com design motherbd http www intel com design motherbd Table 3 lists the specifications applicable to the D810E2CB board Table 3 Reference Name AC 97 ACPI AGP AMI BIOS APM ATA 3 Specifications Specification Version Revision Date Title and Ownership Audio Codec 97 Advanced Configuration and Power Interface Specification Accelerated Graphics Port Interface Specification 2X only American Megatrends BIOS Specification Advanced Power Management Specification Information Technology AT Attachment 3 Interface X3T10 2008D Version 2 1 May 1998 Intel Corporation Version 1 0b July 1 1998 Intel Corporation Microsoft Corporation and Toshiba Corporation Version 2 0 May 4 1998 Intel Corporation AMIBIOS 99 1999 American Megatrends Inc Version 1 2 February 1996 Intel Corporation and Microsoft Corporation Version 6 October 1998 ASC X3T10 This sp
98. support power management including e Power connector Fan connectors e Wake on LAN technology e Instantly Available technology e Wake on Ring e Resume on Ring e Wake from USB PME wakeup support Wake on LAN technology and Instantly Available technology require power from the 5 V standby line The sections discussing these features describe the incremental standby power requirements for each Wake on Ring and Resume on Ring enable telephony devices to access the computer when it is in a power managed state The method used depends on the type of telephony device external or internal and the ACPI or APM state being used NOTE The use of Wake on Ring Resume on Ring and Wake from USB technologies from an ACPI state require the support of an operating system that provides full ACPI functionality Product Description 1 12 3 1 Power Connector When used with an ATX compliant power supply that supports remote power on off the D810E2CB board can turn off the system power through software control With soft off enabled if power to the computer is interrupted by a power outage or a disconnected power cord when power resumes the computer returns to the power state it was in before power was interrupted on or off For information about Refer to The location of the power connector Figure 6 page 51 The signal names of the power connector Table 32 page 53 The ATX specification Table 3 page 16 The MicroATX specifica
99. system the terminal error handler issues a beep code signifying the test point error writes the error to I O port 80h attempts to initialize the video and writes the error in the upper left corner of the screen using both monochrome and color adapters If POST completes normally the BIOS issues one short beep before passing control to the operating system Table 75 Beep Codes Beep Description Refresh failure Parity cannot be reset First 64 KB memory failure Timer not operational Not used 8042 GateA20 cannot be toggled Exception interrupt error Display memory R W error Not used 0 CMOS Shutdown register test error 1 Invalid BIOS e g POST module not found etc N A Oj N 109 Intel Desktop Board D810E2CB Technical Product Specification 110
100. terface 40 conductor or 80 conductor for Ultra ATA 100 devices 92 BIOS Setup Program 4 4 5 Diskette Configuration Submenu To access this menu select Advanced on the menu bar then Diskette Configuration PCI Configuration The submenu represented by Table 61 is used for configuring the diskette drive Table 61 Diskette Configuration Submenu Diskette Controller Disabled Disables or enables the integrated diskette Enabled default controller Floppy A Not Installed Specifies the capacity and physical size of 360 KB 514 diskette drive A 1 2 MB 51 4 720 KB 1 44 1 25 3 default 2 88 Diskette Write Protect Disabled default Disables or enables write protect for the Enabled diskette drive 93 Intel Desktop Board D810E2CB Technical Product Specification 4 4 6 Event Log Configuration Submenu To access this menu select Advanced on the menu bar then Event Log Configuration 94 Video Configuration The submenu represented by Table 62 is used to configure the event logging features Table 62 Event Log Configuration Submenu Feature Event log Event log validity View event log Clear all event logs Event Logging Mark events as read Indicates if there is space available in the event log Indicates if the contents of the event log are valid Enter Displays the event log No default
101. tion start memory refresh do memory sizing Verify base memory Init code to be copied to segment 0 and control to be transferred to segment 0 Control is in segment 0 To check recovery mode and verify main BIOS checksum If the BIOS is in recovery mode or the main BIOS checksum is bad go to check point EO for recovery else go to check point D7 for giving control to main BIOS Find Main BIOS module in ROM image Uncompress the main BIOS module Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000 shadow RAM Boot Block Recovery Code Check Points Description of POST Operation Onboard floppy controller if any is initialized Compressed recovery code is uncompressed in F000 0000 in Shadow RAM and give control to recovery code in F000 Shadow RAM Initialize interrupt vector tables initialize system timer initialize DMA controller interrupt controller Initialize extra Intel Recovery Module Initialize CD ROM drive Try to boot from ATAPI CD ROM If reading of boot sector is successful give control to boot sector code Booting from floppy failed look for ATAPI LS 120 ZIPT devices Try to boot from ATAPI If reading of boot sector is successful give control to boot sector code Booting from ATAPI CD ROM failed Give two beeps Retry the booting procedure again go to check point E9 103 Intel Desktop Board D810E2CB Technical Product Specification 104 Table 71 Code 03 05
102. tion and the SFX Power Supply Design Guide Table 3 page 16 1 12 3 2 Fan Connectors Table 12 describes the functions of the fan connectors Table 12 Fan Connector Descriptions Function Provides 12 V DC for a processor fan or active fan heatsink Provides 12 V DC for a system or chassis fan Connector Processor fan fan 1 Chassis fan fan 2 For information about Refer to The location of the fan connectors Figure 6 page 51 The signal names of the processor fan connector Table 31 page 52 The signal names of the chassis fan connector Table 34 page 53 1 12 3 3 Wake on LAN Technology N CAUTION For Wake on LAN technology the 5 V standby line for the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply Refer to Section 2 11 2 on page 66 for additional information Wake on LAN technology enables remote wakeup of the computer through a network The LAN subsystem monitors network traffic at the Media Independent Interface Upon detecting a Magic Packett frame the LAN subsystem asserts a wakeup signal that powers up the computer The D810E2CB board supports Wake on LAN technology through the PCI bus PME signal 35 Intel Desktop Board D810E2CB Technical Product Specification 1 12 3 4 Instantly Available Technology N CAUTION For Instantly Available technology the 5 V standby line for
103. ty brings the system out of standby mode and immediately restores power to the monitor The BIOS enables APM by default but the operating system must support an APM driver for the power management features to work For example Windows 98 SE supports the power management features upon detecting that APM is enabled in the BIOS Table 11 lists the devices or specific events that can wake the computer from specific states 33 Intel Desktop Board D810E2CB Technical Product Specification Table 11 APM Wake up Devices and Events These devices events can wake up the computer from this state Power switch Soft off RTC alarm Soft off suspend LAN Soft off suspend PME Soft off suspend USB Suspend PS 2 Suspend Unattended Wake Mode display will be video BIOS string only For information about Refer to Enabling or disabling power management in the BIOS Setup program Section 4 6 page 97 The board s compliance level with APM Table 3 page 16 1 12 3 Hardware Support 34 CAUTION If Wake on LAN and Instantly Available technology features are used the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current can damage the power supply The total amount of standby current required depends on the wake devices supported and manufacturing options Refer to Section 2 11 2 on page 66 for additional information The board provides several hardware features that
104. udio Subsystem The D810E2CB board includes an Audio Codec 97 AC 97 compatible audio subsystem consisting of these devices Intel 82801BA ICH2 AC link output CS4201 analog codec Figure 4 is a block diagram of the audio subsystem 4 CD ROM 82801BA Line In 1O Controller Hub 9 Line Out ICH2 9 4 Mic In Modem Audio OM11128 Figure 4 Block Diagram of Audio Subsystem with CS4201 Codec Features of the audio subsystem include Independent channels for PCM in PCM out and Mic in e 16 bit stereo I O up to 48 kHz e Multiple sample rates For information about Refer to Obtaining audio software and utilities Section 1 2 page 16 1 9 1 CS4201 Analog Codec The CS4201 is a fully AC 97 compliant codec The codec s features include e 16 bit stereo full duplex operation High quality CD ROM input with ground sense e Stereo line level output e Power management support e Full duplex variable sampling rate 7 kHz to 48 kHz with 1 Hz resolution e Phatt Stereo 3 D stereo enhancement 1 9 2 Audio Connectors 28 The audio connectors include the following ATAPI CD ROM connects an internal ATAPI CD ROM drive to the audio mixer e Telephony Line out back panel Line in back panel e Micin Product Description For information about Refer to The location of the ATAPI CD ROM and telephony connectors Figure 6 page 51
105. uld occur it is possible to introduce a programmable delay ranging from 3 to 30 seconds using the Hard Disk Pre Delay feature of the Advanced Menu in the IDE Configuration Submenu of the BIOS Setup Program For information about Refer to IDE Configuration Submenu in the BIOS Setup Program Section 4 4 4 page 90 3 9 8 Operating System The Microsoft Windows Millennium Edition Windows Me operating system has built in capabilities for making PCs boot more quickly To speed operating system availability at boot time limit the number of applications that load into the system tray or the task bar 79 Intel Desktop Board D810E2CB Technical Product Specification 3 10 BIOS Security Features 80 The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer with the following restrictions The supervisor password gives unrestricted access to view and change all the Setup options in the BIOS Setup program This is supervisor mode e The user password gives restricted access to view and change Setup options in the BIOS Setup program This is user mode If only the supervisor password is set pressing the Enter key at the password prompt of the BIOS Setup program allows the user restricted access to Setup f both the supervisor and user passwords are set users can enter
106. um operating temperature see the environmental specifications in Section 2 14 Figure 12 shows the localized high temperature zones D C OM11028 Item Description A Intel 82810E GMCH Processor Processor voltage regulator area Intel 82801BA ICH2 W Figure 12 High Temperature Zones 67 Intel Desktop Board D810E2CB Technical Product Specification Table 45 provides maximum component case temperatures for D810E2CB board components that could be sensitive to thermal changes Case temperatures could be affected by the operating temperature current load or operating frequency Maximum case temperatures are important when considering proper airflow to cool the D810E2CB board Table 45 Thermal Considerations for Components Component Maximum Case Temperature Intel Pentium 111 processor Intel Celeron processor Intel 82810E GMCH Intel 82801BA ICH2 For processor case temperature see processor datasheets and processor specification updates 70 C under bias 109 C under bias CAUTION The voltage regulator area can reach a temperature of up to 85 in an open chassis Ensure that there is proper airflow to this area of the board Failure to do so may result in damage to the voltage regulator circuit
107. ved CPU registers are saved Going to enter in real mode Shutdown successful CPU in real mode Going to disable gate A20 line and disable parity NMI A20 address line parity NMI disable successful Going to adjust memory size depending on relocation shadow Memory size adjusted for relocation shadow Going to clear Hit DEL message Hit DEL message cleared WAIT message displayed About to start DMA and interrupt controller test page register test passed To do 1 base register test DMA4 base register test passed To do DMA 2 base register test DMA 2 base register test passed To program DMA unit 1 and 2 DMA unit 1 and 2 programming over To initialize 8259 interrupt controller Extended NMI sources enabling is in progress Keyboard test started Clearing output buffer checking for stuck key to issue keyboard reset command Keyboard reset error stuck key found To issue keyboard controller interface test command Keyboard controller interface test over To write command byte and init circular buffer Command byte written global data init done To check for lock key continued 105 Intel Desktop Board D810E2CB Technical Product Specification 106 Table 71 Code 84 85 86 87 88 89 8B 8C 8D 8F 91 95 96 97 98 99 9A 9B 9C 9D 9E A2 A4 5 7 8 9 AA AB AC AD Runtime Code Uncompressed in F000 Shadow RAM continued Description of POST Ope
108. ystem responds to a Power On PCI power management event continued BIOS Setup Program Table 66 Boot Menu continued Feature Description 1 Boot Device Floppy Specifies the boot sequence according to the device 219 Boot Device ARMD FDD type The computer will attempt to boot from up to four 3 Boot Devi Note 1 devices as specified here Only one of the devices can eer aah ARMD HDD be an IDE hard disk drive To specify boot sequence S Boot Device Note 2 1 Select the boot device with T or lt gt IDE HDD 2 Press Enter to set the selection as the intended Pel boot device ATAPI CDROM The default settings for the first through fourth boot Intel UNDI devices are respectively RESO Disabled 2 CDROM Disabled NOTE configure the computer to boot from an IDE hard disk drive set a boot device in the Setup feature to IDE HDD Determine the IDE channel and master or slave mode of the drive Then in the next Setup feature IDE Drive Configuration set that channel and mode to 1 IDE IDE Drive Configuration 15 IDE default 1 IDE specifies the IDE hard disk drive to boot from Primary Master IDE IDE The 2 through 4 IDE settings are ignored See the note above for more information Primary Slave IDE 3 IDE i To specify the drive to boot from Secondary Master IDE 4 IDE 1 T or lect the channel and master Secondary Slave IDE Use lt f gt

Intel Desktop Board D810E2CB Technical Product Specification Manual

Contents

Download Pdf Manuals

Related Search

Related Contents