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intel BL440ZX motherboard Manual

1. e m i eee H C RR 0 6 ole K J G F E D B OM08436 A DIMM sockets H USB Port 1 B Video USB Port 0 C Parallel port J Audio Line Out D Serial port K Audio Mic In E RJ 45 LAN L NLX riser card edge F PG keyboard mouse M Processor fan G PS 2 keyboard mouse N PGA370S processor socket Figure 2 Motherboard Connectors 25 BL440ZX Motherboard Technical Product Specification A CAUTION Only the back panel connectors of this motherboard have overcurrent protection The internal motherboard connectors do not have overcurrent protection they should connect only to devices inside the computer chassis such as fans and internal peripherals Do not use these connectors for powering devices external to the computer chassis A fault in the load presented by the external devices could cause damage to the computer the interconnecting cable and the external devices themselves 1 13 1 Back Panel I O Connectors 26 Table 5 Video Connector J1K1 Pin Signal Name Red Green Blue No connect Ground Ground Ground Ground Fused VCC Ground No connect MONID1 HSYNC VSYNC MONID2 O AN DO Om ao PD zad aa AO DN o a gt Om A Table 6 P
2. us m S E P R O D o O N F O M url 1 z 2 p Back panel I O connectors Microphone routing jumper Crystal CS4297 audio codec Creative Sound Blaster AudioPCI 64V audio controller NLX card edge connector Piezoelectric speaker Intel 82371EB PIIX4E Processor fan connector Battery OZ ST zt O U K J OM07455 BIOS Setup configuration jumper Hardware monitor component PGA370S processor socket DIMM sockets Intel 82443ZX PAC ATI RAGE PRO TURBO 2X AGP graphics controller Intel 82559 LAN controller SMSC FDC37M807 I O controller Figure 1 Motherboard Components Motherboard Description 1 2 Microprocessor The motherboard supports a socketed Celeron processor The processor s VID pins automatically program the voltage regulator on the motherboard to the required processor voltage The processor connects to the motherboard through the 370 pin PGA370S socket The motherboard supports the processors listed in Table 1 Table 1 Processors Supported by the Motherboard Processor Speed Host Bus Frequency Cache Size 300A MHz 66 MHz 128 KB 333 MHz 66 MHz 128 KB 366 MHz 66 MHz 128 KB All supported onboard memory can be cached 1 3 Main Memory The motherboard has two dual inline memory module DIMM sockets SDRAM can be installed in one or both sockets The mot
3. A Q A Intel 82443ZX PAC B Intel 82371EB PIIX4E C Intel Celeron processor OM07461 Figure 6 Thermally sensitive Components 46 1 18 Environmental Specifications Table 24 Environmental Specifications Motherboard Description Parameter Specification Temperature Nonoperating 40 C to 70 C Operating 0 C to 55 C Shock Unpackaged 30 g trapezoidal waveform Velocity change of 170 inches sec Packaged Half sine 2 millisecond Product Weight Ibs Free Fall inches lt 20 36 167 21 40 30 152 41 80 24 136 81 100 18 118 Vibration Unpackaged 5 Hz to 20 Hz 0 01 g Hz sloping up to 0 02 g Hz 20 Hz to 500 Hz 0 02 g Hz flat Packaged 10 Hz to 40 Hz 0 015 g Hz flat Velocity Change inches sec 40 Hz to 500 Hz 0 015 g Hz sloping down to 0 00015 g Hz 1 19 Reliability The mean time between failures MTBF prediction is calculated using component and subassembly random failure rates The calculation is based on the Bellcore Reliability Prediction Procedure TR NWT 000332 Issue 4 September 1991 The MTBF prediction is for estimating repair rates and spare parts requirements MTBEF data is calculated from predicted data at 55 C The MTBF prediction for the motherboard is 138 150 hours 47 BL440ZX Motherboard Technical Product Specification 1 20 Regulatory Compliance 48 This motherboard complies with the following safety and EMC regulations when correctly in
4. 00 OE 00 PCI expansion slot 4 01 00 00 ATI RAGE PRO TURBO 2X AGP graphics controller The number of PCI expansion slots supported depends on the riser card configuration and the number of PCI bus masters on the motherboard See Table 14 to determine how many PCI bus masters are available for the riser card 52 Motherboard Resources 2 5 Interrupts Table 31 Interrupts IRQ NMI ON OAR Go M O 23 o a fF Go M A CH System Resource I O channel check Reserved interval timer Reserved keyboard buffer full Reserved cascade interrupt from slave PIC COM2 user available if COM2 is not present COM1 LPT2 Plug and Play option audio user available Diskette drive controller LPT1 Real time clock Reserved for PIIX4E system management bus User available User available Onboard mouse port if present else user available Reserved math coprocessor Primary IDE if present else user available Secondary IDE if present else user available Default but can be changed to another IRQ 53 BL440ZX Motherboard Technical Product Specification 2 6 PCI Interrupt Routing Map 54 This section describes interrupt sharing and how the interrupt signals are connected between the PCI expansion slots and onboard PCI devices The PCI specification specifies how interrupts can be shared between devices attached to the PCI bus In most cases the small amount of latency added by interrupt sharin
5. Moving the jumper with the power on may result in unreliable computer operation Always turn off the power and unplug the power cord from the computer before changing the jumper NOTE There is no jumper or BIOS Setup setting for configuring the processor speed Table 20 BIOS Setup Configuration Jumper Settings Function Jumper J7B1 Configuration Normal 1 2 The BIOS uses current configuration information and passwords for booting Configure 2 3 After the POST runs Setup runs automatically The maintenance menu is displayed Recovery none The BIOS attempts to recover the BIOS configuration A recovery diskette is required 1 15 Mechanical Considerations 1 15 1 Form Factor Motherboard Description The motherboard is designed to fit into a standard NLX form factor chassis The outer dimensions are 8 25 x 10 0 inches Figure 4 shows the mechanical form factor the I O connector locations and the mounting hole locations They are in compliance with the NLX Motherboard Specification see Section 6 2 Dimensions are shown in inches 0 600 p in i 2 975 B cE al 2 la 9 400 _9 200 E 8 050 J 7 600 4 200 Q 0 000 0 000 0 349 0 509 5 159 9 234 0 200 OM07462 Figure 4 Mother
6. Pin Signal Name 1 Ground Fan Voltage see Tables 3 and 4 Tachometer 1 13 3 NLX Card Edge Connector Motherboard Description The motherboard card edge connector for the riser card consists of gold finger contacts in two sections a primary 340 position 2 x 170 section and a supplemental 26 position 2 x 13 section In accordance with the NLX specification the motherboard card edge connector provides the following e PCI signals The motherboard supports at least two request grant signal pairs on the NLX connector See Table 14 e ISA signals e Two IDE channels e An interface for one diskette drive e Audio signals CD Input Audio Line Out Audio Mic In Modem Mic and Modem Speaker e Miscellaneous front panel signals e Power connection for the motherboard Tables 15 16 and 17 specify the pinout of the primary connector Table 18 specifies the pinout of the supplemental connector All edge connector pins are defined in the NLX Motherboard Specification see Section 6 2 for specification information The 82443ZX PAC supports a total of four PCI bus masters Table 14 tells how many PCI bus masters are available for the NLX riser based on the board configuration Table 14 Available PCI Bus Masters If the motherboard has these PCI bus masters PIIX4E only no onboard PCI LAN or PCI audio PIIX4E onboard PCI LAN PIIX4E onboard PCI audio PIIX4E onboard PCI LAN onboard PCI audio This is the maxi
7. aaa aaa aaa 72 Contents 4 4 6 Event Log Configuration EE 72 4 4 7 Video Configuration Gubmen n 72 4 4 8 Resource Configuration Gubmen 73 2 5 EE MENU iernat er a raare ra a r TEE 73 4 6 Power Menu ere e Eege 74 AT Boot MENU sereen dd A EAR dk EA RE 74 4 8 EXT MONU EE 75 5 Error Messages and Beep Codes 5 1 BIOS Error E EE 77 E GR RE 79 5 3 Bus Initialization Checkpoints aaa kaaa 83 5 4 BIOS Beep COd65 22 sisson daka ala i shah quai alena analogan led deka 84 6 Specifications and Customer Support 6 1 EELER EE 85 ee e EE 85 Figures 1 Motherboard Components sic ak odak di ii aan a odd a o dk a a 12 2 Motherboard W e 25 3 Locations of the Jumper BIOCKS kA 39 4 Motherboard DIMENSIONS EE 41 5 Back Panel I O Shield Dimensions a ae dE deeg Eder 42 6 Thermally sensitive ComponentS aaa akan 46 Tables 1 Processors Supported by the Motherboard Ak 13 2 iRd 45 LAN Connector LEDS 3 1 tecictinwatnmotailasueddiniGa taceicanwasuas 22 3 Fan Speed Control under APM Operating System cc ccccceeeeeseeeeeeeeeeeennneeeeeeeeees 24 4 Fan Speed Control under ACPI Operating System 24 Be NEEN 26 6 Parallel Port Connector Seege ergeet ees 27 7 Serial ele EE 27 8 RJ 45 LAN connector J6K2 eeerde Ne genee ege EEN 27 9 PS 2 Keyboard Mouse Connectors J5K1 JI 28 10 USB Connectors EL Sa A hu e e EE 28 11 Audio Line Out Connector J7K1 o ci ana kana dh edna ra aa dala ka aaa 28 12 Audio
8. 0073 2 bytes CMOS Bank 1 0080 008F 16 bytes PIIX4E DMA page registers OOAO 00A1 2 bytes PIIX4E interrupt controller 2 00B2 00B3 2 bytes APM control 00CO 00DE 31 bytes PIIX4E DMA 2 OOFO 1 byte Reset numeric error 0170 0177 8 bytes Secondary IDE channel 01F0 01F7 8 bytes Primary IDE channel 50 continued Motherboard Resources Table 29 I O Map continued Address hex Size Description One of the 8 bytes Audio game port following ranges 0200 0207 0208 020F 0210 0217 0218 021F One of the 16 bytes Audio Sound Blaster Pro compatible following ranges 0220 022F 0240 024F 0278 027F 8 bytes LPT2 0228 022F 8 bytes LPT3 02E8 02EF 8 bytes COM4 video 8514A 02F8 O2FF 8 bytes COM2 One of the 8 bytes MPU 401 MIDI following ranges 0320 0327 0330 033F 0340 0347 0350 0357 0376 1 byte Secondary IDE channel command port 0377 bits 6 0 7 bits Secondary IDE channel status port 0378 037F 8 bytes LPT1 0388 038B 4 bytes AdLibt FM synthesizer 03B4 03B5 2 bytes Video VGA 03BA 1 byte Video VGA 03C0 O3CA 2 bytes Video VGA 03CC 1 byte Video VGA OSCE 03CF 2 bytes Video VGA 03D4 03D5 2 bytes Video VGA 03DA 1 byte Video VGA O3E8 O3EF 8 bytes COM3 O3F0 03F5 6 bytes Diskette channel 1 O3F6 1 byte Primary IDE channel command port 03F7 Write 1 byte Diskette channel 1 command 03F7 bit 7 1 bit Diskette change channel 1 03F7 bits 6 0 7 bits Primary IDE c
9. Size Description 1024 K 262144 K 100000 FFFFFFF 255 MB Extended Memory 960 K 1024 K F0000 FFFFF 64 KB Runtime BIOS 896 K 960 K E0000 EFFFF 64 KB Reserved 800 K 896 K C8000 DFFFF 96 KB Available high DOS memory open to ISA and PCI bus 640 K 800 K A0000 C7FFF 160 KB Video memory and BIOS 639 K 640 K 9FCOO 9FFFF 1 KB Extended BIOS data movable by memory manager software 512 K 639 K 80000 9FBFF 127 KB Extended conventional memory OK 512K 00000 7FFFF 512 KB Conventional memory 49 BL440ZX Motherboard Technical Product Specification 2 2 DMA Channels Table 28 DMA Channels DMA Channel Number Data Width System Resource 0 8 or 16 bits Audio 1 8 or 16 bits Audio parallel port 2 8 or 16 bits Diskette drive 3 8 or 16 bits Parallel port for ECP or EPP audio 4 Reserved cascade channel 5 16 bits Open 6 16 bits Open 7 16 bits Open 2 3 UO Map Table 29 UO Map Address hex Size Description 0000 000F 16 bytes PIIX4E DMA 1 0020 0021 2 bytes PIIX4E interrupt controller 1 0040 0043 4 bytes PIIX4E counter timer 1 0048 004B 4 bytes PIIX4E counter timer 2 0060 1 byte Keyboard controller byte reset IRQ 0061 1 byte PIIX4E NMI speaker contro 0064 1 byte Keyboard controller CMD STAT byte 0070 bit 7 1 bit PIIX4E enable NMI 0070 bits 6 0 7 bits PIIX4E real time clock address 0071 1 byte PIIX4E real time clock data 0070 0071 2 bytes CMOS Bank 0 0072
10. continued Feature Options Description On LAN e Stay Off Specifies how the computer responds to a LAN wake Power On default up event when the power is off On PME e Stay Off default Specifies how the computer responds to a PCI Power e Power On Disabled 1st IDE HDD Note 1 2nd IDE HDD 3rd IDE HDD 4th IDE HDD Floppy ARMD FDD Note 2 ARMD HDD Note 3 ATAPI CD ROM SCSI Network First Boot Device Second Boot Device Third Boot Device Fourth Boot Device Management Enable wake up event when the power is off Specifies the boot sequence from the available devices To specify the boot sequence 1 Select the boot device with lt T gt or lt gt 2 Press lt Enter gt to set the selection as the intended boot device The operating system assigns a drive letter to each boot device in the order listed Changing the order of the devices changes the drive lettering Not all of the devices in this list are available as second third and fourth boot devices Notes 1 HDD Hard Disk Drive 2 ARMD FDD ATAPI removable device floppy disk drive 3 ARMD HDD ATAPI removable device hard disk drive 4 8 Exit Menu This menu is used for exiting the Setup program saving changes and loading and saving defaults Table 54 Exit Menu Feature Description Exit Saving Changes Exit Discarding Changes Load Setup Defaults Load Custom Defaults Save Custom Defaults Exits and saves the changes in C
11. e An integrated ambient temperature sensor e Fan speed sensors see Figure 2 for the location of fan connector on the motherboard e Power supply voltage monitoring to detect levels above or below acceptable values e Support for chassis intrusion detection using an optional onboard photo sensor or a two pin connector on the riser card When suggested ratings for temperature fan speed or voltage are exceeded an interrupt is activated The hardware monitor component connects to the SMBus 1 12 Fan Speed Control The motherboard includes two independent circuits for controlling various system cooling fans one is on the motherboard and the other is routed to the riser card 23 BL440ZX Motherboard Technical Product Specification 1 12 1 Fan Header The processor fan header J4D1 on the motherboard is intended to drive a processor mounted fan either full speed or off depending on the operating state of the system The fan speed is monitored by the hardware monitor subsystem and can be read by applications such as Intel LANDesk Client Manager LDCM using the System Management BIOS SMBIOS described in Section 3 4 1 12 2 Fan Control Signal to the Riser Card The NLX specification defines the fan control FAN_CTL signal as a means to control the speeds of fans connected to an NLX riser card or power supply The BL440ZX motherboard is capable of driving FAN_CTL at different output levels depending on the operating state of the sys
12. it defaults to APM support See Section 6 2 for the version of the APM specification that is supported The energy saving standby mode can be initiated in the following ways e Time out period specified in Setup e Suspend resume switch connected to the front panel sleep connector e From the operating system such as the Suspend menu item in Windows 95 In standby mode the motherboard can reduce power consumption by spinning down hard drives and reducing power to or turning off VESAt DPMS compliant monitors Power management mode can be enabled or disabled in Setup see Section 4 6 While in standby mode the system retains the ability to respond to external interrupts and service requests such as incoming faxes or network messages Any keyboard or mouse activity brings the system out of standby mode and immediately restores power to the monitor The BIOS enables APM by default but the operating system must support an APM driver for the power management features to work For example Windows 95 supports the power management features upon detecting that APM is enabled in the BIOS 3 5 2 ACPI 58 ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer ACPI requires an ACPI aware operating system ACPI features include e Plug and Play including bus and device enumeration and APM functionality normally contained in the BIOS e Power management control of individual devices
13. Front Panel Section NLX Card Edge Connector continued Pin Signal Name Type UO Termination Pin Signal Name Type VO Termination A145 GND PWR N A N A B145 WRDATA FLOPPY O N A A146 WE FLOPPY O N A B146 TRKO FLOPPY l RIS A147 STEP FLOPPY O N A B147 MSENO A148 WP FLOPPY RIS B148 RDDATA FLOPPY l RIS A149 HDSEL FLOPPY O N A B149 DSKCHG FLOPPY l RIS A150 SDA MISC I O MB B150 GND PWR NA N A A151 SCL MISC O MB B151 IRSLO MISC I O N A A152 FAN_TACH1 MISC l N A B152 IRSL1 MISC I O N A A153 FAN_TACH2 MISC l N A B153 IRSL2 MISC I O N A A154 FAN_TACH3 MISC l N A B154 IRTX MISC I O N A A155 FAN CTL MISC l N A B155 IRRX MISC I O RIS A156 5VDC PWR N A N A B156 FP_SLEEP MISC l MB A157 USB1 3_N MISC I O RIS B157 FP_RST MISC l MB A158 USB1 3_P MISC I O RIS B158 GND PWR NA N A A159 USB1 3_OC MISC l RIS B159 PWRLED MISC O RIS A160 USB2 4_N MISC I O RIS B160 PWOK PWR l N A A161 USB2 4_P MISC I O RIS B161 SOFT_ON PWR l MB OFF A162 USB2 4_OC MISC l RIS B162 PS_ON PWR O N A A163 GND PWR N A N A B163 LAN_WAKE MISC l MB A164 VBAT MISC O RIS B164 LAN_ACTVY_ MISC O N A LED A165 TAMP_DET MISC l MB B165 MDM_WAKE MISC l MB A166 MSG_WAIT_ MISC O RIS B166 1394_PWR LED A167 1394_GND B167 Reserved RES N A N A A168 Reserved RES N A N A B168 Reserved RES N A N A A169 5V standby PWR l N A B169 Reserved RES N A N A A170 3 3V SENSE PWR O N A B170 5V PWR NA N A Signal Name Column Defi
14. PC SDRAM Unbuffered DIMM Specification SMBIOS Specification Universal serial bus specification Wired for Management Baseline specification Revision Level Version 1 0 January 25 1995 Phoenix Technologies Ltd IBM Corporation The specification is available at http Mwww phoenix com products specs htm IEEE 1284 standard Mode 1 or 2 v1 7 Version 1 2 March 1997 Intel Corporation The specification is available at http www teleport com nlx spec index htm Version 1 1 May 1997 Intel Corporation The specification is available at http www teleport com nlx spec index htm Version 1 2 August 1998 Intel Corporation The specification is available at http www teleport com nlx spec index htm Revision 2 1 June 1 1995 PCI Special Interest Group The specification is available for purchase at http www pcisig com Version 1 0a May 5 1994 Compaq Computer Corporation Phoenix Technologies Ltd Intel Corporation The specification is available at http Awww us east intel com IAL wfm design smbios pnpspec htm Revision 1 0 February 1998 Intel Corporation The specification is available at http www intel com design pcisets memory Version 2 1 June 16 1997 American Megatrends Inc Award Software International Inc Compaq Computer Corporation Dell Computer Corporation Hewlett Packard Company Intel Corporation International Business Machines Corporation Phoenix Technologies
15. PCICLK4 PCI O MB B14 3 3VDC PWR N A N A A15 GND PWR N A N A B15 GNT2 PCI O RIS A16 GNT1 PCI O RIS B16 AD 81 PCI I O RIS A17 3 3VDC PWR N A N A B17 REQO PCI I RIS A18 REQ2 PCI l RIS B18 GND PWR N A N A A19 REQ3 PCI l RIS B19 AD 29 PCI I O RIS A20 AD 30 PCI I O RIS B20 AD 28 PCI UO RIS A21 GND PWR N A N A B21 AD 26 PCI UO RIS A22 AD 25 PCI I O RIS B22 3 3VDC PWR N A N A A23 REQ1 PCI l RIS B23 AD 24 PCI I O RIS A24 AD 27 PCI I O RIS B24 C BE 3 PCI UO RIS A25 3 3VDC PWR N A N A B25 AD 22 PCI UO RIS A26 AD 23 PCI I O RIS B26 GND PWR N A N A A27 AD 20 PCI I O RIS B27 AD 21 PCI I O RIS A28 AD 18 PCI I O RIS B28 AD 19 PCI UO RIS A29 GND PWR N A N A B29 AD 16 PCI UO RIS continued Signal Name Column Definition Not implemented on motherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card 31 BL440ZX Motherboard Technical Product Specification Table 15 PCI Segment NLX Card Edge Connector continued Pin Signal Name Type VO Termination Pin Signal Name Type UO Termination A30 AD 17 PCI VO RIS B30 3 3VDC PWR N A N A A31 IRDY PCI VO RIS B31 C BE 2 PCI I O RIS A32 DEVSEL PCI VO RIS B32 FRAME PCI I O RIS A33 3 3VDC
16. Specifies the current time second System Date Month day and year Specifies the current date 67 BL440ZX Motherboard Technical Product Specification 4 4 Advanced Menu This menu is used for setting advanced features that are available through the chipset Table 42 Advanced Menu Feature Options Description Boot Settings No options Configures Plug and Play and the Numlock key and resets Configuration configuration data When selected displays the Boot Settings Configuration submenu Peripheral Configuration No options Configures peripheral ports and devices When selected displays the Peripheral Configuration submenu IDE Configuration No options Specifies type of connected IDE device Diskette Configuration No options When selected displays the Diskette Configuration submenu Event Log Configuration No options Configures Event Logging When selected displays the Event Log Configuration submenu Video Configuration No options Configures video features When selected displays the Video Configuration submenu Resource Configuration No options Configures memory blocks and IRQs for legacy ISA devices When selected displays the Resource Configuration submenu 4 4 1 Boot Setting Configuration Submenu This menu is used for setting Plug and Play and the Numlock key and for resetting configuration data Table 43 Boot Setting Configuration Submenu Feature Options Description Plug amp Play O S No default Spec
17. and 60 Hz refresh rate AC watts are measured with a typical 200 W power supply nominal input voltage and frequency and with a true RMS wattmeter at the line input Table 21 Power Usage DC Amps at Mode AC Watts 3 3V 5V 12V 12V 5 VSB DOS prompt 29 07 W 152A 212A 037A 001A 0 12A Windows 95 desktop APM disabled 29 07 W 127A 281A 034A 001A 0 13A Windows 95 desktop APM enabled in 16 96 W 1 20A 053A 0 21A 0 02A 0 11A System Management Mode SMM The processor fan requires 12 V in both Full On and Standby modes The maximum current draw on 12 V at the fan header is 250 mA 43 BL440ZX Motherboard Technical Product Specification 1 16 2 Power Supply Considerations 44 System integrators should refer to the power usage values listed in Table 21 when selecting a power supply for use with this motherboard The power supply must comply with the parameters listed in the NLX Power Supply Recommendations and NLX Motherboard Specification for the following e The potential relation between 3 3 VDC and 5 VDC power rails e The current capability of the 5 VSB standby line e All timing parameters e All voltage tolerances see Table 22 e NLX 20 pin power connector e Soft Off support See Section 6 2 for specification information Table 22 DC Voltage Tolerances DC Voltage Acceptable Tolerance 3 3 V 4 5 V 5 5 VSB standby 5 5 V 5 12 V 5 12 V t5 CAUTION The motherboard require
18. applications or for any other application in which the failure of the Intel product could create a situation where personal injury or death may occur Intel retains the right to make changes to specifications and product descriptions at any time without notice The BL440ZX motherboard may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained from Intel Corporation P O Box 5937 Denver CO 80217 9808 or call in North America 1 800 548 4725 Europe 44 0 1793 431 155 France 44 0 1793 421 777 Germany 44 0 1793 421 333 other Countries 708 296 9333 T Third party brands and names are the property of their respective owners Copyright Intel Corporation 1998 Preface This Technical Product Specification TPS specifies the board layout components connectors power and environmental requirements and BIOS for the BL440ZX motherboard It describes the standard motherboard product and available manufacturing options Intended Audience The TPS is intended to provide detailed technical information about the motherboard and its components to the vendors sys
19. prompt will be displayed before the computer is booted If only the administrator password is set the computer boots without asking for a password If both passwords are set the user can enter either password to boot the computer Table 37 shows the effects of setting the supervisor password and user password This table is for reference only and is not displayed on the screen Table 37 Supervisor and User Password Functions Password Set Neither Supervisor only User only Supervisor and user set Supervisor Mode Can change all options Can change all options N A Can change all options User Mode Can change all options Can change a limited number of options Can change all options Can change a limited number of options Setup Options None Supervisor Password Enter Password Clear User Password Supervisor Password Enter Password Password to Enter Setup None Supervisor User Supervisor or user Password During Boot None None User Supervisor or user If no password is set any user can change all Setup options See Section 4 5 for information about setting user and supervisor passwords 4 BIOS Setup Program What 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 1 In The This Chapter Contains Introduction 4 a See Sot Te BG Lye De AE Ee A ge Jol At E Ad Dt 65 Maintenance Menus icici ei Eden 66 Main MG AU EE 67 Advanced MENU ETH 68 SEGUNO ET
20. series of continuous beeps indicates a failed BIOS recovery To create a BIOS recovery diskette a bootable diskette must be created and the recovery files copied to it The recovery files are available from Intel See Section 6 1 for information on contacting Intel customer support for more information A CAUTION BIOS recovery cannot be done using non SPD DIMMs SPD data structure is required for the recovery process SCH NOTE If the computer is configured to recover the BIOS from an diskette in an LS 120 see Sections 1 4 2 2 and 4 7 the BIOS recovery diskette must be a standard 1 44 MB diskette not a 120 MB diskette 61 BL440ZX Motherboard Technical Product Specification 3 8 Boot Options In the Setup program the user can choose to boot from a diskette drive hard drives CD ROM or the network The default setting is for the diskette drive to be the primary boot device and the hard drive to be the secondary boot device By default the third and fourth devices are disabled 3 8 1 CD ROM and Network Boot Booting from CD ROM is supported in compliance with the El Torito bootable CD ROM format specification See Section 6 2 for information about the El Torito specification Under the Boot menu in the Setup program ATAPI CD ROM is listed as a boot device Boot devices are defined in priority order If the CD ROM is selected as the boot device it must be the first device The network can be selected as a boot device This select
21. switching to protected mode during the memory test Could not read sector from corresponding drive Corresponding drive is not an ATAPI device Run Setup to make sure device is selected correctly No response from diskette drive An error occurred while testing L2 cache Cache memory may be bad The battery may be losing power Replace the battery soon The display type is different than what has been stored in CMOS Check Setup to make sure type is correct The CMOS checksum is incorrect CMOS memory may have been corrupted Run Setup to reset values CMOS values are not the same as the last boot These values have either been corrupted or the battery has failed The time and or date values stored in CMOS are invalid Run Setup to set correct values Error during read write test of DMA controller Error while trying to access diskette drive controller Error while trying to access hard disk controller continued 77 BL440ZX Motherboard Technical Product Specification 78 Table 55 BIOS Error Messages continued Error Message Update Failed Unlock Keyboard Keyboard Error KB Interface Error Timer Error Memory Size Changed Serial presence detect SPD device data missing or inconclusive Do you wish to boot at 100 MHz bus speed Y N No Boot Device Available Off Board Parity Error On Board Parity Error Parity Error NVRAM CMOS PASSWORD cleared by Jumper lt CTRL_N gt Pressed E
22. the Primary IDE Master submenu Primary IDE Slave No options Reports type of connected IDE device When selected displays the Primary IDE Slave submenu Secondary IDE Master No options Reports type of connected IDE device When selected displays the Secondary IDE Master submenu Secondary IDE Slave No options Reports type of connected IDE device When selected displays the Secondary IDE Slave submenu 70 4 4 4 There is a submenu for configuring each of the e Primary IDE master Primary IDE slave e Secondary IDE master Secondary IDE slave Table 46 IDE Configuration Submenus BIOS Setup Program IDE Configuration Submenus following IDE devices Feature Type Options None User Auto default CD ROM ATAPI Removable Other ATAPI IDE Removable No options Maximum Capacity LBA Mode Control Disabled Enabled default Disabled 2 Sectors default 4 Sectors 8 Sectors 16 Sectors Standard Fast PIO 1 default Fast PIO 2 Fast PIO 3 Fast PIO 4 FPIO 3 DMA 1 FPIO 4 DMA 2 Disabled default Mode 0 Mode 1 Mode 2 Multi Sector Transfers Transfer Mode Ultra DMA Description Specifies the IDE configuration mode for IDE devices User allows the cylinders heads and sectors fields to be changed Auto automatically fills in the values for the cylinders heads and sectors fields Reports the maximum capacity for the hard disk if the type is User or Auto Enables or dis
23. 06 IDEA_DD4 IDE I O MB B106 IDEA_DD11 IDE I O MB A107 IDEA_DD10 IDE I O MB B107 IDEA_DD12 IDE I O MB A108 IDEA_DD3 IDE I O MB B108 GND PWR NA N A A109 IDEA_DD13 IDE I O MB B109 IDEA_DD14 IDE I O MB A110 IDEA_DD1 IDE I O MB B110 IDEA_DD2 IDE I O MB A111 GND PWR N A N A B111 IDEA_DDO IDE I O MB A112 IDEA_DIOW IDE O MB B112 IDEA_DD15 IDE I O MB A113 IDEA_DMARQ IDE l MB B113 IDEA_DIOR IDE O MB continued I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card Motherboard Description Table 17 IDE Floppy and Front Panel Section NLX Card Edge Connector continued Pin Signal Name Type UO Termination Pin Signal Name Type UO Termination A114 IDEA_IORDY IDE l MB B114 IDEA_CSEL IDE O MB A115 IDEA_DMACK IDE O MB B115 IDEA_INTRQ IDE l MB A116 RESERVED RES N A N A B116 5VDC PWR N A N A A117 IDEA DAZ IDE O MB B117 IDEA_DA1 IDE O MB A118 IDEA_CSO IDE O MB B118 IDEA_DAO IDE O MB A119 5VDC PWR N A N A B119 IDEA_CS1 IDE O MB A120 IDEA_DASP B120 IDEB_DD8 IDE I O MB A121 IDEB_RESET IDE O MB B121 IDEB_DD7 IDE I O MB A122 IDEB_DD9 IDE I O MB B122 GND PWR N A N A A123 IDEB_DD6 IDE I O MB B123 IDEB_DD10 IDE I O MB A124 IDEB_DD5 IDE I O MB B124 5VDC PWR N A N A A125 IDE
24. 50 ze OAD sees tea e rr e er 50 2 4 PCI Configuration Space Map osa gadan zd eo a ae aan a da ka 52 Ne 53 2 6 PCI Interrupt Routing Mab ena nada dakaka daba ka u ea da du 54 Overview of BIOS Features S T Mee e en EE 55 3 2 BIOS Flash Memory Organization WE 56 3 3 Resource Configuration EE 56 3 3 1 Plug and Play PCI AutocontijuralOri seas tiene ced wees bene Eege 56 3 3 2 ISA Plugand Play ei vodi osle toda sos add ja deco 56 3 3 3 PGIIDE Support i pon 57 3 4 System Management BIOS SMBIOS ek 5 3 5 Power Management EEN 58 3 5 1 AP mr m mm o ne 58 po fe fe API Gea disao i adi ed did e Sears cree 58 E EE 60 3 6 1 Ee UE E len GE 61 3 6 2 OEM eet Scan Area see eene EE 61 3 7 Recovering BIOS Data sissien ae vaga alkalna ak hodanja 61 2 8 ee EE 62 3 8 1 CD ROM and Network BOotf aaa aaa kaaa 62 3 8 2 Booting Without Attached Devices kaaa 62 3 8 3 Default Settings After Battery and Power Failure vka 62 3 9 USB Legacy ie GE 63 3 10 BIOS Sec rity EE 64 BIOS Setup Program GC Bee LEE 65 4 2 Maintenance Menu lt 35 eena ovod e dd o ka dd deeg 66 43 Ma MON aco har aa i koa tue an Bek 67 4 4 Advanced Neni ee EE ee E aed ee 68 4 4 1 Boot Setting Configuration Gubmenu aaa 68 4 4 2 Peripheral Configuration Gubmen ENNEN 69 4 4 3 I ESC OnMmMeuirallOns 3 524 g aag i akad GAS a das gada 70 4 4 4 IDE Configuration SUDIMG NUS e ea iga ja a ka eti ida ko da dana 71 4 4 5 Diskette Configuration Submenu
25. 73 ower MCN EIEE AEE E E E ids dd dotok ta td ae kad dak EE 74 Boot EE EE 74 EXIHMEnU ane aaa e E E EE 75 troduction Setup program is used for viewing and changing the BIOS settings for a computer The user accesses Setup by pressing the lt F2 gt key after the Power On Self Test POST memory test begins and before the operating system boot begins Table 38 shows the menus available from the menu bar at the top of the Setup screen Table 38 Setup Menu Bar Setup Menu Screen Description Maintenance Displays the processor speed Clears the Setup passwords This menu is available only in configure mode Refer to Section 1 14 2 for information about configure mode Main Allocates resources for hardware components Advanced Specifies advanced features available through the chipset Security Specifies passwords and security features Power Specifies power management features Boot Specifies boot options and power supply controls Exit Saves or discards changes to the Setup program options 65 BL440ZX Motherboard Technical Product Specification Table 39 shows the function keys available for menu screens Table 39 Setup Function Keys Setup Key Description lt gt Or lt gt gt Selects a different menu screen lt T gt or lt gt Moves cursor up or down lt Enter gt Executes command or selects the submenu lt F9 gt Loads the default configuration values for the current menu lt F10 gt Saves the cu
26. 8 IRQ12 ISA l MB B88 LA 19 ISA I O MB A89 GND PWR N A N A B89 LA 18 ISA I O MB continued I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card 33 BL440ZX Motherboard Technical Product Specification 34 Table 16 ISA Segment NLX Card Edge Connector continued Pin Signal Name Type UO Termination Pin Signal Name Type UO Termination A90 IRQ14 ISA l MB B90 LA 17 ISA I O MB A91 DRQO ISA l MB B91 DACKO ISA O MB A92 MEMR ISA I O MB B92 DACK5 ISA O MB A93 MEMW ISA I O MB B93 SD 8 ISA I O MB A94 SDI 9 ISA I O MB B94 DACK6 ISA O MB A95 DRQ5 ISA l MB B95 SD 10 ISA I O MB A96 DRQ6 ISA l MB B96 5VDC PWR N A N A A97 5VDC PWR N A N A B97 SD 11 ISA I O MB A98 SD 12 ISA I O MB B98 DRQ7 ISA MB A99 DACK7 ISA O MB B99 SD 13 ISA I O MB A100 SD 14 ISA I O MB B100 SD 15 ISA I O MB A101 MASTER ISA l MB B101 GND PWR N A N A Table 17 IDE Floppy and Front Panel Section NLX Card Edge Connector Pin Signal Name Type UO Termination Pin Signal Name Type UO Termination A102 IDEA_DD8 IDE I O MB B102 GND PWR NA N A A103 IDEA_RESET IDE O MB B103 IDEA_DD7 IDE I O MB A104 IDEA_DD9 IDE I O MB B104 IDEA_DD6 IDE I O MB A105 5VDC PWR N A N A B105 IDEA_DD5 IDE I O MB A1
27. BL440ZX Motherboard Technical Product Specification i n December 1998 Order Number 726092 001 The BL440ZX motherboard may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are documented in the BL440ZX Motherboard Specification Update Revision History Revision Revision History Date 001 First release of the BL440ZX Motherboard Technical Product December 1998 Specification This product specification applies only to standard BL440ZX motherboards with BIOS identifier 4B4LZOXA 86A 000X P0X Changes to this specification will be published in the BL440ZX Motherboard Specification Update before being incorporated into a revision of this document Information in this document is provided in connection with Intel products No license express or implied by estoppel or otherwise to any intellectual property rights is granted by this document Except as provided in Intel s Terms and Conditions of Sale for such products Intel assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not designed intended or authorized for use in any medical life saving or life sustaining
28. B_DD11 IDE I O MB B125 IDEB_DD4 IDE I O MB A126 IDEB_DD12 IDE I O MB B126 IDEB_DD3 IDE I O MB A127 GND PWR N A N A B127 IDEB_DD13 IDE I O MB A128 IDEB_DD2 IDE I O MB B128 IDEB_DD14 IDE I O MB A129 IDEB_DD15 IDE I O MB B129 IDEB_DD1 IDE I O MB A130 IDEB_DIOW IDE I O MB B130 IDEB_DDO IDE I O MB A131 IDEB_DMARQ IDE l MB B131 IDEB_DIOR IDE O MB A132 IDEB_IORDY IDE l MB B132 IDEB_CSEL IDE O MB A133 GND PWR N A N A B133 IDEB_INTRQ IDE l MB A134 IDEB_DMACK IDE O MB B134 IDEB_DA1 IDE O MB A135 RESERVED RES N A N A B135 IDEB_DA2 IDE O MB A136 IDEB_DAO IDE O MB B136 IDEB_CS1 IDE O MB A137 IDEB_CSO IDE O MB B137 IDEB_DASP A138 DRV2 FLOPPY GND MA B138 GND PWR N A N A A139 5VDC PWR N A N A B139 DRATEO FLOPPY O N A A140 RESERVED RES N A N A B140 FDS1 A141 DENSEL FLOPPY O N A B141 FDSO FLOPPY O N A A142 FDMEO FLOPPY O N A B142 DIR FLOPPY O N A A143 INDX FLOPPY RIS B143 MSEN1 A144 FDME1 B144 GND PWR N A N A continued Signal Name Column Definition Not implemented on motherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card 35 BL440ZX Motherboard Technical Product Specification 36 Table 17 IDE Floppy and
29. Creative Sound Blaster AudioPCI 64V using the Ensoniq ES1373 digital controller provides the following features 1 6 2 PCI compliance see Section for 6 2 for specification compliance level PCI bus master for PCI audio 64 voice hardware wavetable Aureal A3Dt API Sound Blaster Prot Roland MPU 401 MIDI joystick compatibility Ensoniq 3D positional audio and Microsoft DirectSoundt 3D support Crystal CS4297 AC 97 v1 03 Analog Codec The Crystal CS4297 AC 97 v1 03 analog codec provides the following features 1 6 3 18 bit stereo full duplex codec Fixed 48 kHz sampling rate Audio Connectors See Section 1 13 1 for the location and pinouts of the motherboard audio connectors Other audio connectors may be supported on the riser card 20 1 6 4 Motherboard Description Audio Drivers and Utilities Audio software and utilities are available from Intel s World Wide Web site see Section 6 1 1 7 ATI RAGE PRO TURBO 2X AGP Graphics Controller The ATI RAGE PRO TURBO 2X AGP graphics controller provides the following features Comprehensive AGP support including 2X 133 MHz fully pipelined operation and sideband support Full bus mastering support Triple 8 bit palette DAC with gamma correction Pixel rates up to 230 MHz DDC1 and DDC2B for Plug and Play monitors Game acceleration including support for Microsoft s DirectDrawt double buffering virtual sprites transparent blit masked blit and context chaining 4
30. ISA l MB A57 5VDC PWR N A N A B57 SD 1 ISA VO MB A58 SD 2 ISA VO MB B58 AEN ISA O MB A59 SD 5 ISA VO MB B59 IOCHRDY ISA l MB continued 32 Motherboard Description Table 16 ISA Segment NLX Card Edge Connector continued Pin Signal Name Type VO Termination Pin Signal Name Type UO Termination A60 SDI 0 ISA I O MB B60 SA 18 ISA I O MB A61 SMEMW ISA O MB B61 SMEMR ISA O MB A62 SA 19 ISA I O MB B62 SA 16 ISA I O MB A63 IOW ISA I O MB B63 IOR ISA I O MB A64 SA 17 ISA I O MB B64 DRQ3 ISA l MB A65 GND PWR N A N A B65 SA 15 ISA I O MB A66 DACK 3 ISA O MB B66 GND PWR NA N A A67 SA 14 ISA I O MB B67 SA 13 ISA I O MB A68 DACK1 ISA O MB B68 5VDC PWR MA N A A69 DRQ1 ISA l MB B69 REFRESH ISA I O MB A70 SA 12 ISA I O MB B70 SA 11 ISA I O MB A71 SYSCLK ISA O MB B71 SA 10 ISA I O MB A72 SA 9 ISA I O MB B72 IRQ7 ISA MB A73 5VDC PWR N A N A B73 IRQ6 ISA l MB A74 IRQ5 ISA l MB B74 SA 8 ISA I O MB A75 SA 7 ISA I O MB B75 SAl 6 ISA I O MB A76 IRQ3 ISA l MB B76 DACK2 ISA O MB A77 IRQ4 ISA l MB B77 SA 4 ISA I O MB A78 SA 5 ISA I O MB B78 GND PWR NA N A A79 TC ISA O MB B79 SA 3 ISA I O MB A80 BALE ISA O MB B80 SA 2 ISA I O MB A81 GND PWR N A N A B81 SA 1 ISA I O MB A82 OSC ISA O MB B82 SA 0 ISA I O MB A83 IOCS16 ISA l MB B83 SBHE ISA I O MB A84 MEMCS16 ISA l MB B84 LA 23 ISA I O MB A85 IRQ11 ISA l MB B85 LA 22 ISA I O MB A86 IRQ10 ISA l MB B86 LA 21 ISA I O MB A87 IRQ15 ISA l MB B87 LA 20 ISA I O MB A8
31. KB on chip texture cache Direct3DT texture lighting The motherboard provides 8 MB of SDRAM graphics memory See Intel s World Wide Web site see Section 6 1 for graphics drivers 1 8 LAN Subsystem The Intel 82559 Fast Ethernet Wired for Management WfM PCI LAN subsystem provides both 10Base T and 100Base TX connectivity Features include 32 bit direct bus mastering on the PCI bus Shared memory structure in the host memory that copies data directly to from host memory 10Base T and 100Base TX capability using a single RJ 45 connector with connection and activity status LEDs IEEE 802 3 Auto Negotiation for the fastest available connection Jumperless configuration the LAN subsystem is completely software configurable See Section 6 2 for Wired for Management specification information 1 8 1 Intel 82559 LAN Controller The integrated Intel 82559 LAN controller features include 3 3 V operation CSMA CD Protocol Engine PCI bus interface see Section 6 2 for PCI specification information DMA engine for movement of commands status and network data across the PCI bus 21 BL440ZX Motherboard Technical Product Specification e Integrated physical layer interface including Complete functionality necessary for the 10Base T and 100Base TX network interfaces when in 10 Mbit sec mode the interface drives the cable directly A complete set of Media Independent Interface MII management registers for control and sta
32. Limited SystemSoft Corporation Revision 1 0 January 15 1996 Compaq Computer Corporation Digital Equipment Corporation IBM PC Company Intel Corporation Microsoft Corporation NEC Northern Telecom The specification is available at http www usb org Version 1 1a August 28 1997 Intel Corporation The specification is available at http www intel com support desktopmgmt
33. MOS SRAM Exits without saving any changes made in Setup Loads the factory default values for all the Setup options Loads the custom defaults for Setup options Saves the current values as custom defaults Normally the BIOS reads the Setup values from flash memory If this memory is corrupted the BIOS reads the custom defaults If no custom defaults are set the BIOS reads the factory defaults Discard Changes Discards changes without exiting Setup The option values present when the computer was turned on are used 75 BL440ZX Motherboard Technical Product Specification 76 5 Error Messages and Beep Codes What This Chapter Contains 5 1 BIOS Error EE 77 5 2 Port 80h POST GOdeS ireen alein r a aa e E zad threes tase loa ide E E 79 5 3 Bus Initialization heechen ee adac rat ged SEELEN 83 5 4 BIOS Beep Codes ke acs digg ra li deed eG a ea ene 84 5 1 BIOS Error Messages Table 55 BIOS Error Messages Error Message GA20 Error Pri Master HDD Error Pri Slave HDD Error Sec Master HDD Error Sec Slave HDD Error Pri Master Drive ATAPI Incompatible Pri Slave Drive ATAPI Incompatible Sec Master Drive ATAPI Incompatible Sec Slave Drive ATAPI Incompatible A Drive Error B Drive Error Cache Memory Error CMOS Battery Low CMOS Display Type Wrong CMOS Checksum Bad CMOS Settings Wrong CMOS Date Time Not Set DMA Error FDC Failure HDC Failure Explanation An error occurred with Gate A20 when
34. Mic In Connector JEK I Se okot jea saa da a da a da e adio 28 13 Processor Fan Connector J4D1 aaa aan 29 14 Available PCI Bus Masters Aessen ee ada dei sd od rai 29 15 PCI Segment NLX Card Edge Connector naa 31 16 ISA Segment NLX Card Edge Connector ANEN 32 17 IDE Floppy and Front Panel Section NLX Card Edge Connector 34 18 Supplemental Section NLX Card Edge Connechor 37 19 Microphone Routing Jumper J8K2 seccccceceievsctecirpesssudectecs pied yaetahenedeneudentinneetevientonss 40 20 BIOS Setup Configuration Jumper Settings 0aaaekkk kakaa 40 21 Power USAC sa eo ce Ya BE eee eee slack E 43 vii BL440ZX Motherboard Technical Product Specification viii DG ele EE Te 44 Thermal Considerations for Component 0000akav a 45 Environmental Spe ifi ationS zoo e da ak dao doan ovaa atta zadak 47 Safety Ee EE 48 EEN Geen 48 System d Ee AT E 49 DMA Channels xe os du s didi ad oan lead dasa a data 50 POR rent g e e er e o e a a eet m A 50 PCI Configuration Space Map BEE 52 VATS ENS US eege 53 PCI Interrupt Routing Maps sicstetecceceetinit ching sacri eerie nero 54 Flash Memory OrganizaNom 2 5 da goods de Bebe tic pare tel da en Sheena 56 Effects of Pressing the Power Switch kee EEN 59 Power States and Targeted System Power kakaa 59 Wake up Devices and E 60 Supervisor and User Password Functions 00 a 64 Leien 65 leen eler 66 Maintenance Menu zas i oja na dala ki alana id ages dod ada d
35. PWR N A N A B33 TRDY PCI I O RIS A34 STOP PCI VO RIS B34 GND PWR N A N A A35 PERR PCI VO RIS B35 SDONE A36 SERR PCI I O RIS B36 LOCK PCI I O RIS A37 GND PWR N A N A B37 SBO A38 C BE 1 PCI VO RIS B38 3 3VDC PWR N A N A A39 AD 13 PCI VO RIS B39 AD 15 PCI I O RIS A40 AD 10 PCI VO RIS B40 PAR PCI I O RIS A41 GND PWR N A N A B41 AD 14 PCI I O RIS A42 C BE 0 PCI VO RIS B42 GND PWR N A N A A43 AD 00 PCI VO RIS B43 AD 11 PCI I O RIS A44 AD 06 PCI VO RIS B44 AD 12 PCI I O RIS A45 3 3VDC PWR N A N A B45 AD 09 PCI I O RIS A46 AD 05 PCI VO RIS B46 3 3VDC PWR N A N A A47 AD 01 PCI VO RIS B47 AD 08 PCI I O RIS A48 AD 03 PCI VO RIS B48 AD 07 PCI I O RIS A49 GND PWR N A N A B49 AD 04 PCI I O RIS A50 AD 02 PCI VO RIS B50 GND PWR N A N A A51 5VDC PWR N A N A B51 PCI_PM PCI I O MB Not implemented on motherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card Table 16 ISA Segment NLX Card Edge Connector Pin Signal Name Type VO Termination Pin Signal Name Type VO Termination A52 RSTDRV ISA O MB B52 5VDC PWR N A N A A53 IOCHK ISA l MB B53 IRQ9 ISA O MB A54 SDI 6 ISA VO MB B54 DRQ2 ISA l MB A55 SD 7 ISA VO MB B55 SD 3 ISA VO MB A56 SD 4 ISA VO MB B56 OWS
36. Ready to write command byte and initialize circular buffer Command byte written global data initialization complete Check for lock key continued 81 BL440ZX Motherboard Technical Product Specification 82 Table 58 Runtime Code Uncompressed in F000 Shadow RAM continued Code 84 85 86 87 88 89 8B 8C 8D 8F 91 95 96 97 98 99 9A 9B 9C 9D 9E A2 A3 A4 A5 A7 A8 A9 AA AB AC AD Description of POST Operation Lock key checking complete Next check for memory size mismatch with CMOS Memory size check complete Next display soft error and check for password or bypass Setup Password checked Ready to do programming before Setup Programming before Setup complete Uncompress Setup code and execute Returned from CMOS Setup program and cleared screen Ready to do programming after Setup Programming after Setup complete Display power on message First screen message displayed lt WAIT gt message displayed PS 2 mouse check and extended BIOS data area allocation to be done Ready to start Setup options programming Ready to reset hard disk controller Hard disk controller reset complete Floppy setup to be done next Floppy setup complete Hard disk setup to be done next Start initialization of different buses optional ROMs from C800 See Section 5 3 for details of different buses Ready to do any init before C800 optional ROM control Any initialization before C800 o
37. aa de deka 66 Main MEN EE 67 Advanced EE 68 Boot Setting Configuration Submenu aaa 68 Peripheral Configuration Submenu aaa aaa 69 IDE Device SEH ee i keel Ki tE 70 IDE Configuration RTE 71 Diskette Configuration Submenu Ne 72 Event Log Configuration Submenu EEN 72 Video COMMGUFATON BEE EE 72 Resource Configuration Submenu aaa aaa 73 Security MEN onak ase cog ba ana shiek dns o too a deen eed dt ee Ee Ee e 73 POWEr En EE 74 eg On EE 74 Exit MENU Go a o pa e nai ns cee Na te Slr A e na i ea er ay Pedras oK 75 BIOS Error Klee zao jezero seta das kas talos dada 77 Uncompressed INIT Code Checkpoints kk 79 Boot Block Recovery Code Checkpoints AAA 79 Runtime Code Uncompressed in F000 Shadow DAM aaa 80 Beep DEER eessen SEENEN Se ESA Deeg 84 Compliance with Specifications EE 85 1 Motherboard Description What This Chapter Contains a o o o ss ch sch ss ss ss ch sch sch sch EE Ee Ee 10 I eelster PR na 13 Mal MEMO EE 13 E e kala o a EE 15 KO Intertace COnNIFAlNEK 252 Gan gda di aa dk aden diri oi dotada 18 Audio e E e va m er eena 20 ATI RAGE PRO TURBO 2X AGP Graphics Controller AA 21 RE EE 21 Wake on LAN Technology gees Godi da dasa du tan gad 22 Wake on Ring Resume on Ring Technologies 23 Hardware Monitor SubsvSterM ase rossa vvti adidas good lao odani 23 Fan Speed Control irc sa e E A E DS ES SL EE 23 Motherboard Keele Ge EE 25 Jumper ee 39 Mechanical Considerations a seas da agda add i a a ta redn
38. able default Reserved 4 5 Security Menu This menu is used for setting passwords and security features Table 51 Security Menu Feature Options Description User Password Is No options Reports if there is a user password set Supervisor Password Is No options Reports if there is a supervisor password Set User Password Set Supervisor Password Clear User User Setup Access Unattended Start Password can be up to seven alphanumeric characters Password can be up to seven alphanumeric characters No default Yes Limited access default No access View only Full Disabled default e Enabled set Specifies the user password Specifies the supervisor password Clears the user password Enables or disables User Setup Access No Access prevents the user from accessing Setup Full enables full access to Setup View Only and Limited Access options are available only when the administrative password is set Enables the unattended start feature When enabled the computer boots but the keyboard is locked The user must enter a password to unlock the computer or boot from a diskette 73 BL440ZX Motherboard Technical Product Specification 4 6 Power Menu This menu is used for setting power management features Table 52 Power Menu Feature Options Description Power Management e Disabled Enables or disables the BIOS power management e Enabled default feature Inactivity Timer e Off Spe
39. able all devices on this bus func 1 initialize static devices on this bus func 2 initialize output device on this bus func 8 initialize input device on this bus func 4 initialize IPL device on this bus func 5 initialize general device on this bus func 6 report errors on this bus NO Om fF WO M h O func 7 initialize add on ROM on all buses The lower nibble of the high byte indicates the bus on which the routines are being executed Value Description Generic DIM Device Initialization Manager Onboard system devices ISA devices EISA devices ISA PnP devices PCI devices a fF Go M OH 83 BL440ZX Motherboard Technical Product Specification 5 4 BIOS Beep Codes 84 Whenever a recoverable error occurs during the POST the BIOS displays an error message describing the problem The BIOS also issues a beep code one long tone followed by two short tones during POST if the video configuration fails a faulty video card or no card installed or if an external ROM module does not properly checksum to zero An external ROM module for example a video BIOS can also issue audible errors usually consisting of one long tone followed by a series of short tones For more information on the beep codes issued check the documentation for that external device There are several POST routines that issue a POST terminal error and shut down the system if they fail Before shutting down the system the terminal error handler issu
40. abled Configures the parallel port Auto assigns LPT1 the address 378h and the interrupt IRQ7 An asterisk displayed next to an address indicates a conflict with another device Selects the mode for the parallel port Not available if the parallel port is disabled Output Only operates in ATt compatible mode Bidirectional operates in PS 2 compatible mode EPP is Extended Parallel Port mode a high speed bidirectional mode ECP is Enhanced Capabilities Port mode a high speed bidirectional mode Specifies the base I O address for the parallel port Specifies the interrupt for the parallel port Enables or disables the onboard audio subsystem Enables or disables USB legacy support See Section 3 9 for more information Enables or disables onboard LAN optional 69 BL440ZX Motherboard Technical Product Specification 4 4 3 IDE Configuration Table 45 IDE Device Configuration Feature Options Description IDE Controller e Disabled Specifies the integrated IDE controller e Primary Primary enables only the Primary IDE Controller e Secondary Secondary enables only the Secondary IDE Controller Both default Both enables both IDE controllers Hard Disk Pre Delay e Disabled default Specifies the hard disk drive predelay e 3 Seconds e 6 Seconds e 9 Seconds e 12 Seconds e 15 Seconds e 21 Seconds e 30 Seconds Primary IDE Master No options Reports type of connected IDE device When selected displays
41. ables the LBA mode control Specifies number of sectors per block for transfers from the hard disk drive to memory Check the hard disk drive s specifications for optimum setting Specifies the method for moving data to from the drive Specifies the Ultra DMA mode for the drive 71 BL440ZX Motherboard Technical Product Specification 4 4 5 Diskette Configuration Submenu This submenu is used for configuring the diskette drive Table 47 Diskette Configuration Submenu Feature Options Diskette Controller Diskette A Diskette Write Protect Disabled Enabled default Not Installed 360 KB 514 1 2 MB 514 720 KB 312 Description Disables or enables the integrated diskette controller Specifies the capacity and physical size of diskette drive A 1 44 1 25 MB 312 default 2 88 MB 312 Disabled default Enabled Disables or enables write protect for the diskette drive 4 4 6 Event Log Configuration This submenu is used for configuring the event logging features Table 48 Event Log Configuration Submenu Feature Options Event Log No options Event Log Validity No options View Event Log Enter Clear All Event Logs No default e Yes Event Logging e Disabled Enabled default Mark Events As Read Enter 4 4 7 Video Configuration Submenu Description Indicates if there is space available in the event log Indicates if the contents of the event log
42. add in boards some add in boards may require an ACPI aware driver video displays and hard disk drives e Methods for achieving less than 30 watt system operation in the Power On Suspend sleeping state and less than 5 watt system operation in the Suspend to Disk sleeping state e A Soft Off feature that enables the operating system to power off the computer e Support for wake up events see Table 36 e Support for a front panel power and sleep mode switcht Table 34 describes the system states based on how long the power switch is pressed depending on how ACPI is configured with an ACPI aware operating system Table 34 Effects of Pressing the Power Switch Overview of BIOS Features and the power switch is If the system is in this state pressed for Off Less than four seconds On Less than four seconds On More than four seconds Sleep Less than four seconds 3 5 2 1 System States and Power States the system enters this state Power on Soft Off Suspend Fail safe power off Wake up Under ACPI the operating system directs all system and device power state transitions The operating system puts devices in and out of low power states based on user preferences and knowledge of how devices are being used by applications Devices that are not being used can be turned off The operating system uses information from applicati system as a whole into a low power state ons and user settings to put the Table 35 lists the pow
43. ages See Section 5 3 for details of different buses New cursor position read and saved Ready to display the Hit lt DEL gt message continued Error Messages and Beep Codes Table 58 Runtime Code Uncompressed in F000 Shadow RAM continued Code 40 42 43 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 57 58 59 60 62 65 66 7F 80 81 82 83 Description of POST Operation Prepare the descriptor tables Enter virtual mode for memory test Enable interrupts for diagnostics mode Initialize data to check memory wrap around at 0 0 Data initialized Check for memory wrap around at 0 0 and find the total system memory size Memory wrap around test done Memory size calculation complete Ready to write patterns to test memory Pattern to be tested written in extended memory Next write patterns in base 640 K memory Patterns written in base memory Find amount of memory below 1 M Amount of memory below 1 M found and verified Find out amount of memory above 1 M Amount of memory above 1 M found and verified Check for soft reset and clear memory below 1 M for soft reset If power on go to check point 4Eh Memory below 1 M cleared Soft reset Clear memory above 1 M Memory above 1 M cleared Soft reset Save the memory size Go to checkpoint 52h Memory test started Not Soft Reset Ready to display the first 64 K memory size Memory size display started This will be up
44. also supports Power On Reset password protection A Power On Reset password can be specified in the BIOS Setup program BL440ZX Motherboard Technical Product Specification 1 6 Audio Subsystem The BL440ZX motherboard includes an Audio Codec 97 compatible AC 97 audio subsystem consisting of these devices Creative Labs Sound Blaster AudioPCI 64V AC 97 digital controller Crystal CS4297 AC 97 V1 03 analog codec The audio subsystem features include with riser card dependencies noted 1 6 1 Split digital analog architecture for improved S N signal to noise ratio gt 80 dB measured at line out and from any analog input including line in CD ROM auxiliary line in and video stereo audio from a video source Ensoniq 3D positional audio support Power management support for APM ACPI and PCI see Section for 6 2 for specification compliance levels Audio inputs Two analog line level stereo inputs for connection from CD ROM audio from the riser card One mono analog line level input for telephony speakerphone input from the riser card One mono microphone input A motherboard jumper routes the signal from the back panel or the riser card See Table 19 for jumpering information Audio outputs Stereo line level output shareable between the back panel and the riser card Mono output for speakerphone from the riser card Creative Sound Blaster AudioPCI 64V AC 97 v1 03 Digital Controller
45. an English German Italian French and Spanish The default language is American English which is present unless another language is selected in BIOS Setup The BIOS includes extensions to support the Kanji character set and other non ASCII character sets Translations of other languages may become available at a later date 3 6 2 OEM Logo or Scan Area A 4 KB flash memory user area is available for displaying a custom OEM logo during POST A utility is available from Intel to assist with installing a logo into the flash memory Information about this capability is available on the Intel Support World Wide Web site See Section 6 1 for more information about this site 3 7 Recovering BIOS Data Some types of failure can destroy the BIOS For example the data can be lost if a power outage occurs while the BIOS is being updated in flash memory To recover the BIOS from a diskette the user must set the BIOS Setup configuration jumper block to recovery mode see Table 20 When recovering the BIOS the user must be aware of the following e Because of the small amount of code available in the nonerasable boot block area there is no video support The procedure can be monitored only by listening to the speaker and looking at the diskette drive LED e The recovery process may take several minutes larger BIOS flash memory devices require more time e Two beeps and the end of activity in the diskette drive indicate successful BIOS recovery e A
46. and PS 2 keyboards and mice For example do not use a PS 2 keyboard with a USB mouse or a USB keyboard and a PS 2 mouse Do not use USB devices with an operating system that does not support USB USB legacy is not intended to support the use of USB devices in a non USB aware operating system USB legacy support is for keyboards and mice only Hubs and other USB devices are not supported 63 BL440ZX Motherboard Technical Product Specification 3 10 BIOS Security Features The BIOS includes security features that restrict access to the BIOS Setup program and restrict who can boot the computer A supervisor password and a user password can be set for accessing the Setup program and for booting the computer with the following restrictions 64 e The supervisor password gives unrestricted access to view and change all the Setup options in the Setup program This is supervisor mode e The user password gives restricted access to view and change Setup options in the Setup program This is user mode e If only the supervisor password is set pressing the lt Enter gt key at the password prompt of the Setup program allows the user restricted access to Setup e If both the supervisor and user passwords are set users can enter either the supervisor password or the user password to access Setup Users have access to Setup respective to which password is entered e Setting the user password restricts who can boot the computer The password
47. arallel Port Connector J2K1 Motherboard Description o AJ Om om bk oO M 5 o 10 11 12 13 Table 7 Signal Name Pin Strobe 14 Data bit 0 15 Data bit 1 16 Data bit 2 17 Data bit 3 18 Data bit 4 19 Data bit 5 20 Data bit 6 21 Data bit 7 22 ACK 23 Busy 24 Error 25 Select Serial Port Connector J3K1 KS 5 O AN Oa P Go DY Table 8 Signal Name DCD Serial In Serial Out DTR Ground DSR RTS CTS RI RJ 45 LAN connector J6K2 Pin ON OOF WN Signal Name TX Tx Rx Floating plane termination Floating plane termination Rx Floating plane termination Floating plane termination Signal Name Auto Feed Fault INIT SLCT IN Ground Ground Ground Ground Ground Ground Ground Ground 27 BL440ZX Motherboard Technical Product Specification Table 9 PS 2 Keyboard Mouse Connectors J5K1 J6K1 Pin Signal Name 1 Data 2 No connect 3 Ground 4 5 V fused 5 Clock 6 No connect Table 10 USB Connectors J6K2 Pin Signal Name 1 5 V fused 2 USBPO 3 USBPO 4 Ground 5 5 V fused 6 USBP1 7 USBP1 8 Ground Table 11 Audio Line Out Connector J7K1 Pin Signal Name Sleeve Ground Tip Audio Left Out Ring Audio Right Out Table 12 Audio Mic In Connector J8K1 Pin Signal Name Sleeve Ground Tip Mono In Ring 28 Electret Bias Voltage 1 13 2 Processor Fan Connector Table 13 Processor Fan Connector J4D1
48. are valid Displays the event log Clears the event log after rebooting Enables logging of Events Marks all events as read This submenu is used for configuring video features Table 49 Video Configuration Submenu Feature Options Palette Snooping AGP Aperture Size 72 Disabled default Enabled 64 MB default 256 MB Description Controls the ability of a primary PCI graphics controller to share a common palette with an ISA add in video card Specifies the aperture size for the AGP video controller BIOS Setup Program 4 4 8 Resource Configuration Submenu This submenu is used for configuring the memory and interrupts Table 50 Resource Configuration Submenu Feature Options Description Memory Reservation e C8000 CBFFF Available default Reserved Reserves specific upper e CC000 CFFFF Available default Reserved memory blocks for use by e D0000 D3FFF Available default Reserved legacy ISA devices e D4000 D7FFF Available default Reserved e D8000 DBFFF Available default Reserved e DCO00 DFFFF Available default Reserved IRQ Reservation e IRQ3 Available default Reserved Reserves specific IRQs for es IRQ4 Available default Reserved use by legacy ISA devices e IRQ5 Available default Reserved An asterisk displayed e IRQ7 Available default Reserved next to an IRQ indicates an e IRQ10 Available default Reserved IRQ conflict e IRQ11 Avail
49. ate MP for multiprocessor support if present Put CGA INT10 module if present in shadow RAM continued Error Messages and Beep Codes Table 58 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation AE Uncompress SMBIOS module initialize SMBIOS code and form the runtime SMBIOS image in shadow RAM Bi Ready to copy any code to specific area 00 Copying of code to specific area complete Ready to give control to INT19 boot loader 5 3 Bus Initialization Checkpoints The system BIOS gives control to the different buses at the following checkpoints to do various tasks Checkpoint Description 2A Different buses init system static output devices to start if present 38 Different buses init input IPL general devices to start if present 39 Display different buses initialization error messages 95 Initialization of different buses optional ROMs from C800 to start While control is inside the different bus routines additional checkpoints are output to port 80h as word values to identify the routines under execution In these word value checkpoints the low byte of the checkpoint is the system BIOS checkpoint from which the control is passed to the different bus routines The high byte of the checkpoint is the indication of which routine is being executed in the different buses The upper nibble of the high byte indicates the function being executed Value Description func 0 dis
50. board Dimensions 41 BL440ZX Motherboard Technical Product Specification 1 15 2 1 O Shield 42 The back panel I O shield for the motherboard must meet specific dimension and material requirements Systems based on this motherboard need the I O shield to pass certification testing Figure 5 shows the shield s critical dimensions in inches The figure indicates the position of each cutout Additional design considerations for I O shields relative to chassis requirements are described in the NLX Motherboard Specification See Section 6 2 for information about the specification NOTE A back panel I O shield designed to be compliant with the NLX Motherboard Specification is available from Intel see Section 6 2 for the version of the specification supported 0 168 0 570 1 175 1 838 2 504 3 179 5 532 7 274 OM08466 Figure 5 Back Panel I O Shield Dimensions Motherboard Description 1 16 Electrical Considerations 1 16 1 Power Consumption Table 21 lists the power usage for a computer that contains a motherboard with a Celeron processor operating at 333 MHz 128 KB cache 64 MB SDRAM 1 44 MB floppy drive 1 6 GB IDE hard drive 24X IDE CD ROM and integrated ATI RAGE PRO TURBO 2X AGP controller with 8 MB of video memory This information is provided only as a guide for calculating approximate power usage with additional resources added Values for the Windowst 95 desktop mode are measured at 256 colors
51. cification information Support for a 2X AGP device Synchronous coupling to the host bus frequency PCI bus interface Complies with the PCI specification Rev 2 1 5 V 33 MHz interface see Section 6 2 for specification information Asynchronous coupling to the host bus frequency PCI parity generation support Data streaming support from PCI to DRAM Support for four PCI bus masters in addition to the host and PCI to ISA I O bridge Support for concurrent host AGP and PCI transactions to main memory Data buffering DRAM write buffer with read around write capability Dedicated host to DRAM PCIO to DRAM and PCI1 AGP to DRAM read buffers AGP dedicated inbound outbound FIFOs used for temporary data storage ACPI and APM power management compliance SMBus support for desktop management functions Support for system management mode SMM BL440ZX Motherboard Technical Product Specification 1 4 2 The Intel 82371EB PCI ISA IDE Xcelerator PIIX4E is a multifunction PCI device implementing the PCI to ISA bridge PCI IDE functionality Universal Serial Bus USB host hub functionality and enhanced power management The PILX4E features Intel 82371EB PCI ISA IDE Xcelerator Multifunction PCI to ISA bridge Support for the PCI bus at 33 MHz PCI specification compliance see Section 6 2 for specification information Full ISA bus support USB controller Two USB ports see Se
52. cifies the amount of time before the computer e 1 Minute enters standby mode e 5 Minutes e 10 Minutes e 20 Minutes default e 30 Minutes e 60 Minutes e 120 Minutes Hard Drive e Disabled Enables power management for hard disks during e Enabled default standby and suspend modes Video Power Down e Disabled Specifies power management for video during standby e Standby and suspend modes e Suspend default e Sleep 4 7 Boot Menu This menu is used for setting the boot features and the boot sequence Table 53 Boot Menu Feature Options Description Quiet Boot e Disabled Disabled displays normal POST messages e Enabled default Enabled displays OEM logo instead of POST messages Quick Boot e Disabled Enables the computer to boot without running certain e Enabled default POST tests Scan User Flash Area e Disabled default Enables the BIOS to scan the flash memory for user e Enabled binary files that are executed at boot time After Power Failure e Stays Off Specifies the mode of operation if an AC Power loss e Last State default occurs Power On Power On restores power to the computer Stay Off keeps the power off until the power button is pressed Last State restores the power state before power loss occurred On Modem Ring e Stay Off default Specifies how the computer responds to an incoming e Power On call on an installed modem when the power is off continued 74 BIOS Setup Program Table 53 Boot Menu
53. ction 6 2 for specification information Legacy support for USB keyboard and mouse Support for the Universal Host Controller Interface UHCI Design Guide revision 1 1 interface Integrated dual channel enhanced IDE interface Support for up to four IDE devices PIO Mode 4 transfers up to 16 MB sec Support for Ultra DMA 33 synchronous DMA mode transfers up to 33 MB sec Bus master mode with an 8 x 32 bit buffer for bus master PCI IDE burst transfers Enhanced DMA controller Two 8237 based DMA controllers Support for PCI DMA with three PC PCI channels and distributed DMA protocols Interrupt controller based on 82C59 Support for 15 interrupts Programmable edge level sensitivity Power management logic Sleep resume logic Support for Wake on LANT technology Support for ACPI see Section 6 2 for specification information Real Time Clock 256 byte battery backed CMOS SRAM Date alarm 16 bit counters timers based on 82C54 Motherboard Description 1 4 2 1 Universal Serial Bus USB The motherboard has two USB ports one USB peripheral can be connected to each port For more than two USB devices an external hub can be connected to either port The motherboard provides the two USB ports on the back panel For riser cards with front panel USB port support a motherboard manufacturing option is available that provides one USB port on the back panel and the other USB channel route
54. d Chipset initialization about to begin 8254 Tmer Test is about to start Memory Refresh Test is about to start Memory Refresh line is toggling Check 15 us ON OFF time Read 8042 input port and disable Megakey GreenPC feature Make BIOS code segment writeable Do any setup before interrupt vector initialization Interrupt vector initialization to begin Clear password if necessary Next do any initialization before setting video mode Set monochrome mode and color mode Start initialization of different buses if present system static output devices See Section 5 3 for details of different buses Give control for any setup required before optional video ROM check Look for optional video ROM and give control Give control to do any processing after video ROM returns control If EGA VGA not found then execute Display Memory R W Test EGA VGA not found Display Memory R W Test about to begin Display Memory R W Test passed Look for the retrace checking Display Memory R W Test or retrace checking failed Do Alternate Display Memory R W Test Alternate Display Memory R W Test passed Look for the alternate display retrace checking Video display checking complete Next set display mode Display mode set Then display the power on message Start initialization of different buses if present input IPL general devices See Section 5 3 for details of different buses Display different buses initialization error mess
55. d a do rata 58 3 6 1 BIOSUBGTAdES e eia tis daski rd dti ostaj odo e 60 3 7 Recovering BIOS Data gue EZE rano deni E dada ia dai eg 61 3 0 BOOPODNONS eer ia e e Maan dai ao A ad ee td A 62 39 USB Legacy SUPROTNE EE 63 3 10 BIOS Security Features dean odanog iki dia kn 64 3 1 Introduction The motherboard uses an Intel AMI BIOS which is stored in flash memory and can be upgraded using a disk based program The flash memory also contains the Setup program POST APM PCI autoconfiguration utility and Windows 95 ready Plug and Play See Section 6 2 for the supported versions of APM and Plug and Play This motherboard supports system BIOS shadowing allowing the BIOS to execute from 64 bit onboard write protected DRAM The BIOS displays a message during POST identifying the type of BIOS and a revision code The initial production BIOS is identified as 4B4LZOXA 86A 55 BL440ZX Motherboard Technical Product Specification 3 2 BIOS Flash Memory Organization The Intel E28F200B5 2 Mbit flash component is organized as 256 KB x 8 bits and is divided into areas as described in Table 33 The table shows the addresses in the ROM image in BIOS normal mode the addresses change in BIOS recovery mode Table 33 Flash Memory Organization Address Hex Size Description FFFFC000 FFFFFFFF 16 KB Boot Block FFFFA009 FFFFBFFF 8 KB Vital Product Data VPD Extended System Configuration Data ESCD SMBIOS configuration data Plug and Pla
56. d to the riser card The motherboard fully supports the universal host controller interface UHCD and uses UHCI compatible software drivers See Section 6 2 for information about the USB specification USB features include e Self identifying peripherals that can be plugged in while the computer is running e Automatic mapping of function to driver and configuration e Support for isochronous and asynchronous transfer types over the same set of wires e Support for up to 127 physical devices e Guaranteed bandwidth and low latencies appropriate for telephony audio and other applications e Error handling and fault recovery mechanisms built into the protocol lt gt NOTE Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements even if no device or a low speed USB device is attached to the cable Use shielded cable that meets the requirements for full speed devices 1 4 2 2 IDE Support The motherboard has two independent bus mastering IDE interfaces These interfaces support e ATAPI devices such as CD ROM drives e ATA devices using the transfer modes listed in Table 46 The BIOS supports logical block addressing LBA and extended cylinder head sector ECHS translation modes The drive reports the transfer rate and translation mode to the BIOS The motherboard supports laser servo LS 120 diskette technology through its IDE interfaces The LS 120 drive can be configured as a boot d
57. dated during memory test Run sequential and random memory test Memory testing initialization below 1M complete Ready to adjust displayed memory size for relocation shadow Memory size display adjusted due to relocation shadow Memory test above 1 M to follow Memory testing initialization above 1 M complete Ready to save memory size information Memory size information is saved Processor registers are saved Ready to enter real mode Shutdown successful processor in real mode Ready to disable gate A20 line and disable parity NMI Successfully disabled A20 address line and parity NMI Ready to adjust memory size depending on relocation shadow Memory size adjusted for relocation shadow Ready to clear Hit lt DEL gt message Hit lt DEL gt message cleared lt WAIT gt message displayed Ready to start DMA and Interrupt Controller Test DMA Page Register Test passed Ready to start DMA 1 Base Register Test DMA 1 Base Register Test passed Ready to start DMA 2 Base Register Test DMA 2 Base Register Test passed Ready to program DMA unit 1 and 2 DMA unit 1 and 2 programming complete Ready to initialize 8259 interrupt controller Extended NMI sources enabling is in progress Keyboard test started Clearing output buffer checking for stuck key Next issue keyboard reset command Keyboard reset error stuck key found Ready to issue keyboard controller interface test command Keyboard controller interface test complete
58. detect SPD and non SPD DIMMs SMSC FDC37M807 I O controller e One serial port Two USB ports e One parallel port e PS 2 keyboard e PS 2 mouse e Intel 82559 10 100 Mbps PCI LAN controller e RJ 45 LAN connector Integrated PCI audio consisting of e Creative Sound Blaster AudioPCIt 64V audio using the Ensoniq ES1373 AC 97 v1 03 digital controller Crystal CS4297 AC 97 v1 03 analog codec e Integrated ATI RAGE PRO TURBO 2X AGP controller e 8MB SDRAM Riser dependent Support for chassis intrusion detection if available on the riser card see also Manufacturing Options e _Intel AMI BIOS stored in Intel E28F200B5 2 Mbit flash memory e Support for SMBIOS ACPI APM Management Level 3 0 and Plug and Play see Section 6 2 for specification compliance levels Motherboard Description Not all of the following manufacturing options are available in all marketing channels Please contact your Intel representative to determine what manufacturing options are available to you Manufacturing Options Front Panel USB One of the two USB channels routed to the riser card Onboard Chassis Photo sensor on the motherboard Intrusion Detection 11 BL440ZX Motherboard Technical Product Specification Figure 1 shows the major components of the BL440ZX motherboard DO DS Com mm A
59. emory components and DIMMs used with the BL440ZX motherboard must comply with the PC SDRAM Unbuffered DIMM Specification You can access this document through the Internet at http www intel com design pcisets memory See Section 6 2 for information about this SDRAM DIMM specification Motherboard Description 1 4 Chipset The Intel 82440ZX AGPset includes a Host PCI bridge integrated with both an optimized DRAM controller and an Accelerated Graphics Port AGP interface The I O subsystem of the 82440ZX is based on the PIIX4E which is a highly integrated PCI ISA IDE Accelerator Bridge 1 4 1 Intel 82443ZX PCI AGP Controller The Intel 82443ZX PCI AGP controller PAC provides bus control signals address paths and data paths for transfers between the processor s host bus PCI bus the AGP and main memory The PAC features Processor interface control Support for 66 MHz processor host bus 32 bit addressing Desktop optimized GTL compliant host bus interface Integrated DRAM controller with support for 3 3 V only DIMM DRAM configurations Up to two double sided DIMMs 100 MHz or 66 MHz SDRAM on the 66 MHz host bus DIMM serial presence detect via SMBus interface 16 and 64 Mbit devices with 2 KB 4 KB and 8 KB page sizes xX4 x 8 X 16 and x 32 DRAM widths Symmetrical and asymmetrical DRAM addressing AGP interface Complies with the AGP specification see Section 6 2 for spe
60. ent BIOS interface specification ATA 3 Information Technology AT Attachment 3 Interface ATAPI ATA Packet Interface for CD ROMs Revision Level Revision 1 0 December 22 1996 Intel Corporation Microsoft Corporation and Toshiba Corporation This specification is available at http developer intel com design mobile acpi session htm Revision 1 0 July 1996 Intel Corporation The specification is available at http developer intel com pc supp platform agfxport AMIBIOSt 98 A data sheet is available at www amibios com Revision 1 2 February 1996 Intel Corporation Microsoft Corporation This specification is available at http developer intel com ial powermgm apmovr him X3T10 2008D Revision 6 For information about the specification see the ATA anonymous FTP site at ftp fission dt wdc com pub standards ata ata 3 SFF 8020I Revision 2 5 SFF Fax Access 408 741 1600 continued 85 BL440ZX Motherboard Technical Product Specification Table 60 Compliance with Specifications continued Specification El Torito EPP NLX Motherboard NLX Power Supply NLX Riser Card PCI Plug and Play SDRAM DIMMs 64 bit SMBIOS USB WiM Description Bootable CD ROM format specification Enhanced Parallel Port NLX form factor specification NLX Power Supply Recommendations NLX Generic Riser Card Design Overview PCI Local Bus Specification Plug and Play BIOS Specification
61. er states supported by the motherboard along with the associated system power targets See the ACPI specification for a complete descrip power states Table 35 Power States and Targeted System Power tion of the various system and Processor Global States Sleeping States States Device States Targeted System Power G0 working S0 working C0 working DO working state Full power gt 60 W state G1 sleeping S1 processor Ci stop grant D1 D2 D3 5 W lt power lt 30 W state stopped device specification specific G2 S5 S5 Soft Off No power D3 no power Power lt 5W Context not except for saved Cold boot wake up logic is required G3 No power to the No power D3 no power for No power to the system so mechanical off system wake up logic that service can be AC power is except when performed disconnected provided by from the battery or external computer source Total system power depends on the system configuration including add in boards and peripherals powered by the system chassis power supply Depends the standby power consumption of wake up devices used in the system 59 BL440ZX Motherboard Technical Product Specification 3 5 2 2 Wake up Devices and Events Table 36 describes which devices or specific events can wake the computer from specific ACPI states Sleeping states S4BIOS and S5 are the same for the wake up events Table 36 Wake up Devices and Events These devices even
62. es a beep code signifying the test point error writes the error to I O port 80h attempts to initialize the video and writes the error in the upper left corner of the screen using both monochrome and color adapters If POST completes normally the BIOS issues one short beep before passing control to the operating system Table 59 Beep Codes Beep Description Refresh failure Parity cannot be reset First 64 K memory failure Timer not operational Processor failure reserved for historic reasons not used any more 8042 Gate A20 cannot be toggled Exception interrupt error Display memory R W error ROM checksum error reserved for historic reasons not used any more 0 CMOS Shutdown Register Test error 1 Invalid BIOS for example POST module not found etc 0 ON OO FW N 6 Specifications and Customer Support What This Chapter Contains 6 1 6 1 Online Support Online SUPporl aaa aaa aaa 6 2 Specifications 2 200 aaa aaa aa ak Find information about Intel boards at these World Wide Web sites http support intel com support motherboards desktop http www intel com 6 2 Specifications The motherboard complies with the following specifications Table 60 Compliance with Specifications Specification Description ACPI Advanced Configuration and Power Interface specification AGP Accelerated Graphics Port Interface Specification AMI BIOS American Megatrends Inc APM Advanced Power Managem
63. evice by setting the BIOS Setup program s Boot Device Menu see Section 4 7 to one of the following e ARMD FDD ATAPI Removable Media Device Floppy Disk Drive e ARMD HDD ATAPI Removable Media Device Hard Disk Drive 1 4 2 3 Real Time Clock CMOS SRAM and Battery The real time clock is compatible with DS1287 and MC146818 components The clock provides a time of day clock and a multicentury calendar with alarm features and century rollover The real time clock supports 256 bytes of battery backed CMOS SRAM in two banks that are reserved for BIOS use The time date and CMOS values can be specified in the Setup program The CMOS values can be returned to their defaults by using the Setup program BL440ZX Motherboard Technical Product Specification lt gt NOTE The recommended method of accessing the date in systems with Intel motherboards is from the Real Time Clock RTC via the BIOS The BIOS on Intel motherboards contains a century checking and maintenance feature that checks the least two significant digits of the year stored in the RTC during each BIOS request INT 1Ah During this check the BIOS reads the date and if less than 80 i e 1980 is the first year supported by the PC updates the century byte to 20 This feature enables operating systems and applications using the BIOS date time services to reliably manipulate the year as a four digit value For more information on proper date access in systems with Intel m
64. for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as Intel LANDesk Client Manager to use SMBIOS The BIOS stores and reports the following SMBIOS information e BIOS data such as the BIOS revision level e Fixed system data such as peripherals serial numbers and asset tags e Resource data such as memory size cache size and processor speed e Dynamic data such as event detection and error logging Intel can provide system manufacturers with a utility that programs system and chassis related information into the SMBIOS space in flash memory The utility is used to program the BIOS during system manufacturing so that the BIOS can later report this information Once written this information cannot be overwritten by the end user Non Plug and Play operating systems such as Windows NTT require an additional interface for obtaining SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support a SMBIOS service level application running on a non Plug and Play operating system can access the SMBIOS BIOS information See Section 6 2 for SMBIOS specification information 57 BL440ZX Motherboard Technical Product Specification 3 5 Power Management 3 5 1 APM The BIOS supports both APM and ACPI If the board is used with an ACPI aware operating system the BIOS provides ACPI support Otherwise
65. g does not affect the operation or throughput of the devices In some special cases where maximum performance is needed from a device a PCI device should not share an interrupt with other PCI devices Use the following information to avoid sharing an interrupt with a PCI add in card PCI devices are categorized as follows to specify their interrupt grouping e INTA By default all add in cards that require only one interrupt are in this category For almost all cards that require more than one interrupt the first interrupt on the card is also classified as INTA e INTB Generally the second interrupt on add in cards that require two or more interrupts is classified as INTB This is not an absolute requirement e INTC and INTD Generally a third interrupt on add in cards is classified as INTC and a fourth interrupt is classified as INTD The PIIX4E PCI to ISA bridge has four programmable interrupt request PIRQ input signals Any PCI interrupt source either onboard or from a PCI add in card connects to one of these PIRQ signals Because there are only four signals some PCI interrupt sources are mechanically tied together on the motherboard and therefore share the same interrupt Table 32 shows an example of how the PIRQ signals might be connected to a riser card s PCI expansion slots and to onboard PCI interrupt sources Table 32 PCI Interrupt Routing Map First PCI Second PCI Third PCI Fourth PCI PIIX4 PIRQ Expansion Expans
66. hannel status port 03F8 O3FF 8 bytes COM1 04D0 04D1 2 bytes Edge level triggered PIC continued Note 1 Default but can be changed to another address range 51 BL440ZX Motherboard Technical Product Specification Table 29 I O Map continued Address hex Size Description LPTn 400h 8 bytes ECP port LPTn base address 400h OCF8 OCFB 4 bytes PCI configuration address register OCF9 1 byte Turbo and reset control register OCFC OCFF 4 bytes PCI configuration data register FFAO FFA7 8 bytes Primary bus master IDE registers FFA8 FFAF 8 bytes Secondary bus master IDE registers 32 contiguous bytes starting on a Intel 82559 LAN controller 32 byte divisible boundary 64 contiguous bytes starting on a Onboard audio controller 64 byte divisible boundary Notes continued 2 Dword access only 3 Byte access only 2 4 PCI Configuration Space Map Table 30 PCI Configuration Space Map Bus Device Function Number hex Number hex Number hex Description 00 00 00 Intel 82443ZX PAC 00 01 00 Intel 82443ZX PCI AGP bridge 00 06 00 Intel 82559 LAN controller 00 07 00 Intel 82371EB PIIX4E PCI ISA bridge 00 07 01 Intel 82371EB PIIX4E IDE bus master 00 07 02 Intel 82371EB PIIX4E USB 00 07 03 Intel 82371EB PIIX4E power management 00 OC 00 PCI audio controller Creative Sound Blaster AudioPCI 64V 00 14 00 PCI expansion slot 1 00 12 00 PCI expansion slot 2 00 10 00 PCI expansion slot 3
67. herboard also supports both serial presence detect SPD and non SPD data structures Using the SPD data structure programmed into an E2PROM on the DIMM the BIOS can determine the SDRAM size and speed Using the non SPD data structure the BIOS will dynamically determine SDRAM size and speed Minimum memory size is 16 MB maximum memory size is 256 MB Memory size and speed can vary between sockets The BIOS can support an SPD SDRAM DIMM in one socket and a non SPD SDRAM DIMM in the other A CAUTION BIOS recovery cannot be done using non SPD DIMMs SPD data structure is required for the recovery process The motherboard supports the following memory features e 168 pin DIMMs with gold plated contacts e 66 MHz or 100 MHz unbuffered SDRAM on the 66 MHz host bus e Non ECC 64 bit memory e 3 3 V memory only BL440ZX Motherboard Technical Product Specification The motherboard supports single or double sided DIMMs in the following sizes DIMM DIMM SDRAM SDRAM Number of Capacity Organization Density Organization SDRAMs 16 MB 2 Mbit X 64 16 Mbit 1MX 16 8 16 MB 2 Mbit X 64 16 Mbit 2MX8 8 16 MB 2 Mbit X 64 64 Mbit 2M X 32 2 32 MB 4 Mbit X 64 16 Mbit 2MX8 16 32 MB 4 Mbit X 64 64 Mbit 2M X 32 4 32 MB 4 Mbit X 64 64 Mbit 4MX16 4 64 MB 8 Mbit X 64 64 Mbit 4MX16 8 64 MB 8 Mbit X 64 64 Mbit 8MX8 8 128 MB 16 Mbit X 64 64 Mbit 8MX8 16 If the number of SDRAMs is greater than nine the DIMM will be double sided NOTE All m
68. i 41 Electrical Gon amp iderati fiS ena rane ada ora ae eege e 43 Thermal eene E e 45 Environmental SpecificatioN ee aaa ada gadna adna sada a oda ilja a dna tdi ee 47 Reliability pen mp o e i rm 47 Regulatory Eeler 48 1 1 Overview BL440ZX Motherboard Technical Product Specification The BL440ZX motherboard is a versatile platform that offers a wide variety of features Some of the features are implemented at least in part on the riser card Throughout this manual the symbol is used to indicate such a feature Because there is no standard riser card no detailed description of an implementation can be given See Section 6 2 to obtain NLX riser card design information The BL440ZX motherboard s features are summarized below Form Factor Processor Chipset Memory UO Control Peripheral Interfaces LAN Subsystem Audio Subsystem Graphics Subsystem Expansion Capabilities Offboard Chassis Intrusion Detection BIOS NLX 10 0 inches by 8 25 inches e 370 contact processor pin grid array PGA370S socket e Support for the Intel Celeron processor on the 66 MHz host bus e 128 KB of integrated L2 cache Intel 82440ZX AGPset on the 66 Mhz host bus consisting of e Intel 82443ZX PCI AGP controller PAC e Intel 82371EB PCI ISA IDE Xcelerator PIIX4E e Two 168 contact DIMM sockets e Support for up to 256 MB of 66 MHz non ECC synchronous DRAM SDRAM e Support for serial presence
69. ialize diskette drive EA Try to boot from diskette If reading of boot sector is successful give control to boot sector code EB Boot from diskette failed look for ATAPI LS 120 Zip devices EC Try to boot from ATAPI device If reading of boot sector is successful give control to boot sector code EF Boot from diskette and ATAPI device failed Give two beeps Retry the booting procedure go to check point E9 79 BL440ZX Motherboard Technical Product Specification 80 Table 58 Runtime Code Uncompressed in F000 Shadow RAM Code 03 05 06 07 08 0B OC 0E OF 10 11 12 13 14 19 1A 23 24 25 27 28 2A 2B 2C 2D 2E 2F 30 31 32 34 37 38 39 3A Description of POST Operation NMI is Disabled Check soft reset power on BIOS stack set Disable cache if any Uncompress POST code Initialize processor and initialize processor data area Next calculate CMOS checksum Next do any initialization before executing keyboard BAT Keyboard controller I B free Issue the BAT command to keyboard controller Any initialization after keyboard controller BAT to be done next Write keyboard command byte Issue pin 23 24 blocking unblocking command Check whether lt INS gt lt END gt keys were pressed during power on Initialize CMOS if Init CMOS in every boot is set or if lt END gt key is pressed Then disable DMA and interrupt controllers Video display is disabled and port B is initialize
70. ic Immunity Standard Currently compliance is determined via testing to IEC 801 2 3 and 4 Europe Interference Causing Equipment Standard Digital Apparatus Class B Including CRC c 1374 Canada Interference Causing Equipment Standard Digital Apparatus Canada This printed circuit assembly has the following product certification markings UL Joint Recognition Mark Consists of small c followed by a stylized backward UR and followed by a small US component side e Manufacturer s recognition mark Consists of a unique UL recognized manufacturer s logo along with a flammability rating 94V 0 solder side e UL File Number for motherboards E139761 component side e PB Part Number Intel bare circuit board part number 721282 001 solder side e Battery Side Up marking Located on the component side of the motherboard in close proximity to the battery holder e FCC Logo Declaration Located on the solder side of the motherboard e CE Mark Located on the component side of the motherboard and on the shipping container 2 Motherboard Resources What This Chapter Contains 2 1 Memory M ap EE 49 2 2 DMA Ghann amp lS 2 oces akon pae ap o lao ks E A db 50 2 31 NOMADI zaj danas ie old dt i eae enc ea 50 2 4 PCI Configuration Space Map 52 2 57 Le EE 53 2 6 PCI Interrupt Routing MA egene enee eege 54 2 1 Memory Map Table 27 System Memory Map Address Range decimal Address Range hex
71. ifies if a Plug and Play operating system is being used Yes No lets the BIOS configure all devices Yes lets the operating system configure Plug and Play devices Not required with a Plug and Play operating system Reset Config Data No default Clears the BIOS configuration data on the next boot Yes NumLock Off Specifies the power on state of the Numlock feature on the On default numeric keypad of the keyboard 68 BIOS Setup Program 4 4 2 Peripheral Configuration Submenu This submenu is used for configuring the computer peripherals Table 44 Peripheral Configuration Submenu Feature Serial port A Base I O address Interrupt Parallel port Mode Base I O address Interrupt Audio Legacy USB Support LAN Options Disabled Enabled Auto default 3F8 default 3E8 2E8 IRQ 3 IRQ 4 default Disabled Enabled Auto default Output Only Bidirectional default EPP ECP 378 default 278 228 IRQ 5 default IRQ 7 Disabled Enabled default Disabled Enabled Auto default Disabled Enabled default Description Configures serial port A Auto assigns the first free COM port normally COM1 the address 3F8h and the interrupt IRQ4 An asterisk displayed next to an address indicates a conflict with another device Specifies the base I O address for serial port A if serial port A is Enabled Specifies the interrupt for serial port A if serial port A is En
72. ion Expansion Expansion Onboard PCI LAN Signal Slot Slot Slot Slot Video Audio USB Controller PIRQA INTA INTB INTC INTD INTA PIRQB INTB INTC INTD INTA INTA PIRQC INTC INTD INTA INTB PIRQD INTD INTA INTB INTC INTD INTA The number of PCI expansion slots supported depends on the riser card configuration and the number of PCI bus masters on the motherboard See Table 14 to determine how many PCI bus masters are available for the riser card Using the example shown in Table 32 assume an add in card with one interrupt group INTA is inserted into the second PCI slot In this slot an interrupt source from group INTA connects to the PIRQD signal which is already connected to the LAN PCI source The add in card shares an interrupt with this onboard interrupt source NOTE The PIIX4E can connect each PIRQ line internally to one of the IRQ signals 3 4 5 7 11 14 15 Typically a device that does not share a PIRQ line will have a unique interrupt However in certain interrupt constrained situations it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal 3 Overview of BIOS Features What This Chapter Contains Sl e ee e E 55 3 2 BIOS Flash Memory Organization lt 2000 gade a a don dlana dead akad ta dica 56 3 3 ROSOUICE Configuration sic aa aba ao ot ov asd okna 56 3 4 System Management BIOS SMBIOS ovakva 57 3 5 Power Manage NreMmi sit o gdo agoi vk ia deja vka kada a
73. ion allows booting from a network add in card with a remote boot ROM installed 3 8 2 Booting Without Attached Devices For use in embedded applications the BIOS has been designed so that after passing the POST the operating system loader is invoked even if no video adapter keyboard or mouse is attached 3 8 3 Default Settings After Battery and Power Failure If the battery and AC power fail standard defaults not custom defaults will be loaded into CMOS RAM at power on 62 Overview of BIOS Features 3 9 USB Legacy Support USB legacy support enables a USB keyboard or mouse to be used when no operating system USB driver is in place USB legacy support is intended to be used only in accessing BIOS Setup and installing an operating system that supports USB To install an operating system that supports USB set USB legacy support in BIOS Setup to Auto and follow the operating system s installation instructions This sequence describes how USB legacy support operates in the default Auto mode 1 When the user powers up the computer USB legacy support is set to Auto in Setup 2 The POST begins 3 Ifthe POST detects a USB keyboard the BIOS enables the keyboard to be used to enter the Setup program or maintenance mode 4 After the operating system loads the USB keyboard and mouse will be usable and controlled by the BIOS until a USB driver takes control lt gt NOTES If USB legacy support is enabled do not mix USB
74. ipers on the audio jack and is HIGH when the headphones are plugged into the front audio jack and LOW when they are not The signal is pulled low through a pulldown on the motherboard typically 100K Ground System Management Interrupt that is an input to the motherboard Reserved Reserved Reserved Low pass filtered ground for audio circuitry on the riser Pre amplified microphone mono output signal from motherboard to telephony device CD ROM Line in right Isolated CD ROM ground Clean power from the motherboard to audio circuitry on the NLX riser could be an isolated power source 1 5 Ampere max Limitation because of the connector gold finger limitation Analog Line out right Signal Type Analog 1V RMS N A Analog 1V RMS Analog 1V RMS TTL N A open drain N A N A N A N A Analog 1V RMS Analog 1V RMS N A 5 9 V DC Analog 1V RMS continued 37 BL440ZX Motherboard Technical Product Specification Table 18 Supplemental Section NLX Card Edge Connector continued Pin Signal Name Type UO Description Signal Type Y5 ER MC EN l Y6 VOL_UP Y7 AC_RST Y8 AC_SD_IN Y9 GROUND PWR N A Digital main motherboard ground plane N A Y10 AC GD OUT Y11 AC_SYNC Y12 AC_BIT_CLKk Y13 MODEM_SPKR AUDIO O Analog mono output signal from telephony Analog device to motherboard 1V RMS Signal Name Column Definition Not implemented on m
75. mum number of PCI bus masters available to an NLX riser card 4 3 3 2 These are the REQ GNT signal pairs routed to the NLX riser card REQ GNT 0 1 2 and 3 REQ GNT 0 1 and 2 REQ GNT 0 1 and 2 REQ GNT 0 and 1 29 BL440ZX Motherboard Technical Product Specification lt gt NOTE If the NLX riser has more PCI bus connectors than there are REQ GNT signal pairs routed to the riser not all of the PCI bus connectors on the riser will support bus mastering For example if the motherboard has only REQ GNT signal pairs 0 and I routed to the NLX riser connector and the riser has three PCI bus connectors the connector tied to REQ GNT signal pair 2 will not support bus mastering 30 Motherboard Description Table 15 PCI Segment NLX Card Edge Connector Pin Signal Name Type UO Termination Pin Signal Name Type UO Termination A1 12V PWR N A N A B1 PCSPKR_RT A2 REQ4 PCI l RIS B2 12V PWR N A N A A3 12V PWR N A N A B3 PCSPKR_LFT A4 GNT4 PCI O RIS B4 12V PWR N A N A A5 3 3VDC PWR N A N A B5 PCICLKO PCI O MB A6 PCIINT3 PCI l RIS B6 GND PWR N A N A A7 3 3VDC PWR N A N A B7 PCICLK1 PCI O MB A8 PCIINTO PCI l RIS B8 SER_IRQ MISC I O MB A9 PCIINT1 PCI l RIS B9 PCIINT2 PCI I RIS A10 PCICLK2 PCI O MB B10 3 3VDC PWR N A N A A11 3 3VDC PWR N A N A B11 PCICLK3 PCI O MB A12 PCI_RST PCI O MB B12 GND PWR N A N A A13 GNTO PCI O RIS B13 GNT3 PCI O RIS A14
76. nector located on the back panel of the motherboard In the Setup program there are four options for parallel port operation Output only standard mode e Bidirectional PS 2 compatible e Bidirectional Enhanced Parallel Port EPP A driver from the peripheral manufacturer is required for operation See Section 6 2 for EPP compliance e Bidirectional high speed Extended Capabilities Port ECP 1 5 3 Diskette Drive Controller The I O controller is software compatible with the 82077 diskette drive controller and supports a single diskette drive in either PC AT or PS 2 mode In the Setup program the diskette drive interface can be configured for the following diskette drive capacities and sizes e 360 KB 5 25 inch e 1 2 MB 5 25 inch e 720 KB 3 5 inch e 1 2 MB 3 5 inch driver required e 1 25 1 44 MB 3 5 inch e 2 88 MB 3 5 inch 1 5 4 PS 2 Keyboard and Mouse Interface PS 2 keyboard and mouse connectors are located on the back panel of the motherboard The 5 V lines to these connectors are protected with a PolySwitch circuit that like a self healing fuse reestablishes the connection after an overcurrent condition is removed lt gt NOTE The mouse and keyboard can be plugged into either PS 2 connector Power to the computer Should be turned off before a keyboard or mouse is connected or disconnected The keyboard controller contains code that provides the traditional keyboard and mouse control functions and
77. nition Not implemented on motherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard Termination Column Definitions MB Termination pullup pulldown debounce is on motherboard RIS Termination pullup pulldown is on riser card N A Not on motherboard or riser card Motherboard Description Table 18 Supplemental Section NLX Card Edge Connector Pin x1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 Y1 Y2 Y3 Y4 Signal Name CD_IN_LT AGND MIC_IN LINE_OUT_LT FP_SPKR_EN VOL_DN GND SMI Reserved Reserved Reserved AGND MODEM_MIC CD_IN_RT CD_IN_GND AVCC LINE_OUT_RT Type AUDIO PWR AUDIO AUDIO AUDIO PWR SYS RES RES RES PWR AUDIO AUDIO PWR PWR AUDIO Signal Name Column Definition Not implemented on motherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard N A Not applicable UO N A N A N A N A N A N A Description CD ROM Line in left Low pass filtered ground for audio circuitry on the riser Preamplified microphone input Preamp circuitry to reside on riser or in microphone Analog Line out left This signal indicates if headphones have been plugged into the front panel LINE OUT jack The signal is connected to one of the w
78. nly ISA Plug and Play cards that are required for booting IPL devices If Plug and Play operating system is not selected in Setup the BIOS autoconfigures all Plug and Play ISA cards Because ISA legacy devices are not autoconfigurable the resources for them must be reserved in BIOS Setup Overview of BIOS Features 3 3 3 PCI IDE Support If the user selects Auto in Setup see Section 4 4 4 the BIOS automatically sets up the two PCI IDE connectors with independent I O channel support The IDE interface supports hard drives up to PIO Mode 4 and recognizes any ATAPI devices including CD ROM drives tape drives and Ultra DMA drives see Section 6 2 for the supported version of ATAPI Add in ISA IDE controllers are not supported The BIOS determines the capabilities of each drive and configures them to optimize capacity and performance You can override the autoconfiguration option by specifying User configuration in the IDE Configuration Submenu of Setup lt gt NOTE Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device 3 4 System Management BIOS SMBIOS SMBIOS is an interface for managing computers in an enterprise environment The main component of SMBIOS is the management information format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates
79. otherboard I O Column Definitions Relative to Motherboard O Output from motherboard to riser card Input from riser card to motherboard N A Not applicable 38 Motherboard Description 1 14 Jumper Blocks There are two jumper blocks on the motherboard one for setting the BIOS Setup configuration mode the other for routing the microphone signal J8K2 ae g J7B1 G S QO OM08437 J8K2 Microphone signal routing J7B1 BIOS Setup configuration Figure 3 Locations of the Jumper Blocks 39 BL440ZX Motherboard Technical Product Specification 1 14 1 Microphone Routing Jumper Block This three pin jumper block J8K2 routes the Mic In signal to the onboard audio subsystem Figure 3 shows the location of the jumper block on the motherboard Table 19 Microphone Routing Jumper J8K2 Jumper Setting Source of Mic In Signal 1 2 Mic In connector on an NLX riser card 2 3 default Mic In connector on the motherboard back panel 1 14 2 BIOS Setup Configuration Jumper Block 40 The BIOS Setup configuration jumper J7B1 sets the configuration mode for the BIOS Setup program This allows all motherboard configuration to be done in BIOS Setup Figure 3 shows the location of the configuration jumper block on the motherboard CAUTION
80. otherboards please see http support intel com support year2000 motherboard htm A coin cell battery powers the real time clock and CMOS memory When the computer is not plugged into a wall socket the battery has an estimated life of three years When the computer is plugged in the 3 3 V standby current extends the life of the battery The clock is accurate to 13 minutes year at 25 C with 3 3 V applied 1 5 I O Interface Controller The motherboard uses the SMSC FDC37M807 I O controller which features e Support for one diskette drive e ISA Plug and Play compatible register set e One serial port e FIFO support on both serial port and diskette drive interfaces e One parallel port with ECP and EPP support e PS 2 style mouse and keyboard interfaces PCI PME interface to PIIX4E e Intelligent automatic power management of devices when certain conditions are met Support includes Shadowed write only registers for ACPI compliance Programmable wake up event interface The Setup program provides configuration options for the I O controller 1 5 1 Serial Port The motherboard has one serial port The 9 pin D sub connector for serial port A is located on the back panel The serial port has an NS16C550 compatible UART that supports data transfers at speeds up to 115 2 Kbits sec with BIOS support Motherboard Description 1 5 2 Parallel Port The connector for the multimode bidirectional parallel port is a 25 pin D Sub con
81. ptional ROM control is complete Next do optional ROM check and control Optional ROM control is complete Next give control to do any required processing after optional ROM returns control and enable external cache Do any initialization required after optional ROM Test is over Ready to set up timer data area and printer base address Return after setting timer and printer base address Ready to set the RS 232 base address Returned after RS 232 base address Ready to do any initialization before coprocessor test Required initialization before coprocessor test is complete Ready to initialize coprocessor next Coprocessor initialized Ready to do any initialization after Coprocessor Test Initialization after Coprocessor Test is complete Ready to check extended keyboard keyboard ID and NumLock Ready to display any soft errors Soft error display complete Ready to set keyboard typematic rate Keyboard typematic rate set Ready to program memory wait states Ready to enable parity NMI NMI and parity enabled Ready to do any initialization required before giving control to optional ROM at E000 Initialization before E000 ROM control complete E000 ROM to get control next Returned from E000 ROM control Ready to do any initialization required after E000 optional ROM control Initialization after E000 optional ROM control complete Ready to display the system configuration Put INT13 module runtime image to shadow RAM Gener
82. rrent values and exits Setup lt Esc gt Exits the menu lt F1 gt Displays online help 4 2 Maintenance Menu 66 This menu is used for setting the processor speed and clearing the Setup passwords Setup displays this menu only in configure mode See Section 1 14 2 for information about setting configure mode Table 40 Maintenance Menu Feature Options Description Processor Speed No options Displays the processor speed in megahertz With a host bus operating at 66 MHz the board supports processors at the following speeds 300A 333 and 366 MHz Clear All Passwords No options Clears the user and supervisor passwords BIOS Setup Program 4 3 Main Menu This menu reports processor and memory information This menu is used to set the system date and system time Table 41 Main Menu Feature Options Description BIOS Version No options Displays the version of the BIOS Processor Type No options Displays processor type Processor Speed No options Displays processor speed Cache RAM No options Displays the size of second level cache Total Memory No options Displays the total amount of RAM on the motherboard Bank 0 No options Displays the type of DIMM installed in each memory bank Bank 1 Language English US Selects the default language used by the BIOS default e German French e italian e Spanish Cache Bus ECC N A Not applicable Memory Non ECC Not applicable Configuration System Time Hour minute and
83. s Controller kakaa 21 LAN SUDSVSTEMI DE 21 1 8 1 Intel 82559 LAN Controller so asc oka di sai dead cine a Seege 21 1 8 2 RI ER wl ate ika etat adi ate AR radje 22 1 8 3 RJ 45 LAN Connector LEDS ss ode nsa ad koda gaje ss sheen al good na da dada nata a 22 Wake on LAN Technology esoguer ai i a S deg 22 Wake on Ring Resume on Ring Technologies 23 1 10 1 Wake on Ring Technology EE 23 1 10 2 Resume on Ring Technology osdgu egugedhttEeugdEEEh ee EES 23 Hardware Monitor Zubevetem ege Eege EE ee EEN oat 23 Ree Euro E 23 NIZA EIERE ee zau a de E a ee e 24 1 12 2 Fan Control Signal to the Riser Card 24 1 12 3 System Management Support 24 Motherboard Connectors 2s a din ai k i le dd ie eda 25 1 13 1 Back Panel Eeler 26 1 13 2 Processor Fan GONnneGiGE oj set ee EE io eege gt 29 1 13 3 NLX Card Edge e a EE 29 J mper BIO CK EE 39 1 14 1 Microphone Routing Jumper Block 40 1 14 2 BIOS Setup Configuration Jumper Block 40 E Ee Ree E te EE 41 UBI RON E Lee 41 1 4152 A RT Penn u o a i e 42 BL440ZX Motherboard Technical Product Specification vi 1 16 Electrical Considerations a ea ae re a ra O Olja rat 43 Ca EE Enn e LL E 43 1 16 2 Power Supply Considerations ek 44 s Ra Wa dun ees EE 45 1 18 Environmental Specifications eena 47 119 E UE 47 1 20 Regulatory Ee ale 48 Motherboard Resources Bal Memon Manora noge a a Okun adsl oak oak ia odre 49 22 DMA Channels lt eeneg EE Eege os et
84. s at least 720 mA of 5 VSB to support Soft Off and the following wake up events LAN and Ring modem If standby current is inadequate the motherboard may fail to wake or in the case of Soft Off fail to power down Motherboard Description 1 17 Thermal Considerations Table 23 lists maximum component case temperatures for motherboard components that could be sensitive to thermal changes Case temperatures could be affected by factors such as the operating temperature current load or operating frequency Maximum case temperatures are important when considering proper airflow to cool the motherboard Table 23 Thermal Considerations for Components Component Maximum Case Temperature Motherboard Location Intel Celeron processor 300A MHz 85 C J3B1 333 MHz 85 C 366 MHz 85 C Intel 82443ZX PAC 105 C U3E1 Intel 82371EB PIIX4E 85 C U7D1 A CAUTION An ambient temperature that exceeds the motherboard s maximum operating temperature might cause components to exceed their maximum case temperature For information about the motherboard s maximum operating temperature see the environmental specifications in Section 1 18 45 BL440ZX Motherboard Technical Product Specification Figure 6 shows motherboard components that may be sensitive to thermal changes
85. stalled in a compatible host system Table 25 Safety Regulations Regulation UL 1950 CSA950 3 edition Dated 07 28 95 EN 60950 2 Edition 1992 with Amendments 1 2 3 and 4 IEC 950 2 edition 1991 with Amendments 1 2 3 and 4 EMKO TSE 74 SEC 207 94 Table 26 EMC Regulations Title Bi National Standard for Safety of Information Technology Equipment including Electrical Business Equipment USA and Canada The Standard for Safety of Information Technology Equipment including Electrical Business Equipment European Community The Standard for Safety of Information Technology Equipment including Electrical Business Equipment International Summary of Nordic deviations to EN 60950 Norway Sweden Denmark and Finland Regulation FCC Class B CISPR 22 2 Edition 1993 Class B VCCI Class B ITE EN55022 1994 Class B EN50082 1 1992 ICES 003 1997 ICES 003 Issue 2 Title Title 47 of the Code of Federal Regulations Parts 2 and 15 Subpart B pertaining to unintentional radiators USA Limits and methods of measurement of Radio Interference Characteristics of Information Technology Equipment International Implementation Regulations for Voluntary Control of Radio Interference by Data Processing Equipment and Electronic Office Machines Japan Limits and methods of measurement of Radio Interference Characteristics of Information Technology Equipment Europe Gener
86. tecting a Magic Packett the controller asserts a wake up signal that powers up the computer A CAUTION Operation of this motherboard requires a power supply providing at least 720 mA of current on the 5 VSB line Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply 22 Motherboard Description 1 10 Wake on Ring Resume on Ring Technologies This section describes two technologies that enable telephony devices to access the computer when it is in a power managed state 1 10 1 Wake on Ring Technology The operation of Wake on Ring can be summarized as follows e Powers up the computer from the APM Soft Off mode Requires two calls to access the computer First call powers up the computer Second call enables access e Implements incoming call differently for external as opposed to internal modems For external modems motherboard hardware monitors the ring indicate RI input of the serial port For internal modems a cable must be routed from the modem to the Wake on Ring connector 1 10 2 Resume on Ring Technology The operation of Resume on Ring can be summarized as follows e Resumes operation from the APM sleep mode or the ACPI S1 state Requires only one call to access the computer 1 11 Hardware Monitor Subsystem The hardware monitor subsystem provides low cost instrumentation capabilities The features of the hardware monitor subsystem include
87. tem Initially two levels are defined for high and low fan speed operation Based on the cooling needs and capabilities of a given system platform the system OEM can redefine these output levels to achieve a better balance of acoustic and thermal performance Applications such as LDCM can access the SMBIOS to redefine the FAN_CTL output levels 1 12 3 System Management Support While the system is running an APM operating system the BIOS controls both fan circuits as shown in Table 3 With an ACPI operating system the voltage to both circuits depends on the system state as shown in Table 4 Table 3 Fan Speed Control under APM Operating System Processor Fan Voltage FAN_CTL Signal to Riser Card APM System States connector J4D1 pin 2 current limit 50 mA Full On Standby 12 V default OEM definable high speed default 12 V Suspend DV default OEM definable low speed default 8 V Table 4 Fan Speed Control under ACPI Operating System Processor Fan Voltage FAN_CTL Signal to Riser Card ACPI Sleep States connector J4D1 pin 2 current limit 50 mA SO 12 V 12 V S x S2 No support No support S3 No support No support S4 No support No support S5 oV OV Controlled by the operating system 24 Motherboard Description 1 13 Motherboard Connectors Figure 2 show the location of the motherboard connectors
88. tem integrators and other engineers and technicians who need this level of information It is specifically not intended for general audiences What This Document Contains Chapter Description 1 A description of the hardware used on this board 2 A map of the resources of the board 3 The features supported by the BIOS Setup program 4 The contents of the BIOS Setup program s menus and submenus 5 A description of the BIOS error messages beep codes and Power On Self Tests POST codes 6 A list of where to find information about specifications supported by the motherboard Typographical Conventions This section contains information about the conventions used in this specification Not all of these symbols and abbreviations appear in all specifications of this type Notes Cautions and Warnings lt gt NOTE Notes call attention to important information A CAUTION Cautions are included to help you avoid damaging hardware or losing data BL440ZX Motherboard Technical Product Specification A WARNING Warnings indicate conditions that if not observed can cause personal injury Other Common Notation H D NxnX KB Kbit MB Mbit GB xxh x x V Indicates a feature that is implemented at least in part on a riser card Used after a signal name to identify an active low signal such as USBPO When used in the description of a component N indicates component type xn are the relative coordinates of its loca
89. tion on the motherboard and X is the instance of the particular part at that general location For example J5J1 is a connector located at 5J It is the first connector in the 5J area Kilobyte 1024 bytes Kilobit 1024 bits Megabyte 1 048 576 bytes Megabit 1 048 576 bits Gigabyte 1 073 741 824 bytes An address or data value ending with a lowercase h indicates a hexadecimal value Volts Voltages are DC unless otherwise specified This symbol is used to indicate third party brands and names that are the property of their respective owners Contents 1 Motherboard Description 1 1 wech sch fo wesch sch N aiek sch 1 13 1 14 1 15 EIERE a ee 10 eeler o nn re 13 Malm Nur EE 13 Ee ea np mm Me e e o Pam ro ro e rev 15 1 4 1 Intel 82443ZX PGVAGP Goniroller sa a ze ia od da lani teu sp 15 1 4 2 Intel 82371EB PCI ISA IDE Xcelerator A 16 KO Interface Controller EEN 18 1 5 1 Sonal POM EE 18 1 5 2 Parallel POL e nei osa ije doga i AS e adio 19 1 5 3 Diskette Drive Controller ic cisctccceives via aaa teas teuarcyes AER cee pda ina 19 1 5 4 PS 2 Keyboard and Mouse Iniertace AAA 19 Aud SUD En EEN 20 1 6 1 Creative Sound Blaster AudioPCI 64V AC 97 v1 03 Digital Controller 20 1 6 2 Crystal CS4297 AC 97 v1 03 Analog Codec eee 20 1 6 3 Audio ONNECIOTS zA GR A LEI EE 20 1 6 4 Audio Drivers and Utilities e aii ae e edel ahh ed 21 ATI RAGE PRO TURBO 2X AGP Graphic
90. ts can wake up the computer from this ACPI state Power switch 1 S5 RTC alarm 1 S5 LAN EN Ring modem S1 USB S1 PS 2 keyboard S1 PS 2 mouse EN 3 5 2 3 Plug and Play In addition to power management ACPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration ACPI is used to enumerate and configure only those motherboard devices that do not have other hardware standards for enumeration and configuration PCI devices on the motherboard for example are not enumerated by ACPI 3 6 BIOS Upgrades 60 A new version of the BIOS can be upgraded from a diskette using the Intel Flash Memory Update utility that is available from Intel This utility supports the following BIOS maintenance functions Update the flash BIOS from a file on a diskette e Change the language section of the BIOS e Verify that the upgrade BIOS matches the target system to prevent accidentally installing an incompatible BIOS BIOS upgrades and the Intel Flash Memory Update utility are available from Intel through the Intel World Wide Web site See Section 6 1 for information about this site NOTE Please review the instructions distributed with the upgrade utility before attempting a BIOS upgrade Overview of BIOS Features 3 6 1 Language Support The Setup program and help messages can be supported in 32 languages Five languages are available in the BIOS Americ
91. tus reporting 802 3u Auto Negotiation for automatically establishing the best operating mode when connected to other 10Base T or 100Base TX devices whether half or full duplex capable Integrated power management features including Support for APM Support for Wake on LAN technology 1 8 2 LAN Subsystem Software The Intel 82559 Fast Ethernet WfM PCI LAN software and drivers are available from Intel s World Wide Web site see Section 6 1 1 8 3 RJ 45 LAN Connector LEDs Two LEDs are built into the RJ 45 LAN connector They indicate the following LAN conditions Table 2 RJ 45 LAN Connector LEDs LED Color LED State Indicates Green Off 10 Mbit sec speed is selected On 100 Mbit sec speed is selected Yellow Off LAN link is not established On steady state LAN link is established On brighter and pulsing The computer is communicating with another computer on the LAN 1 9 Wake on LAN Technology Wake on LAN technology enables remote wake up of the computer through a network This feature can be implemented in one of two ways using the onboard Intel 82559 LAN controller or if the riser card has a Wake on LAN technology connector using a PCI add in network interface card NIC with remote wake up capabilities If using a NIC the remote wake up connector on the NIC must be connected to the riser card Wake on LAN technology connector The onboard or NIC LAN controller monitors network traffic at the MII upon de
92. vide the POST codes that can be generated by the BIOS Some codes are repeated in the table because a given code applies to more than one operation Table 56 Uncompressed INIT Code Checkpoints Code Description of POST Operation DO NMI is disabled Onboard keyboard controller and real time clock enabled if present Initialization code checksum verification starting D1 Keyboard controller BAT test CPU ID saved and going to 4GB flat mode D3 Initialize chipset start memory refresh and determine memory size D4 Verify base memory D5 Initialization code to be copied to segment 0 and control to be transferred to segment 0 D6 Control is in segment 0 Used to check if in recovery mode and to verify main BIOS checksum If in recovery mode or if main BIOS checksum is wrong go to check point EO for recovery Otherwise go to check point D7 to give control to main BIOS D7 Find main BIOS module in ROM image D8 Uncompress the main BIOS module D9 Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000 shadow RAM Table 57 Boot Block Recovery Code Checkpoints Code Description of POST Operation EO Onboard diskette controller if any is initialized Compressed recovery code is uncompressed at F000 0000 in shadow RAM Give control to recovery code at F000 in shadow RAM Initialize interrupt vector tables system timer DMA controller and interrupt controller E8 Initialize extra Intel recovery module E9 Init
93. xplanation NVRAM was invalid but was unable to be updated The system keyboard lock is engaged The system must be unlocked to continue to boot Error in the keyboard connection Make sure keyboard is connected properly Keyboard Interface Test failed Timer Test failed Memory size has changed since the last boot If no memory was added or removed then memory may be bad System memory does not appear to be SPD memory System did not find a boot device A parity error occurred on an offboard card This error is followed by an address A parity error occurred in onboard memory This error is followed by an address A parity error occurred in onboard memory at an unknown address NVRAM CMOS and passwords have been cleared The system should be powered down and the jumper removed CMOS is ignored and NVRAM is cleared User must enter Setup Error Messages and Beep Codes 5 2 Port 80h POST Codes During the POST the BIOS generates diagnostic progress codes POST codes to I O port 80h If the POST fails execution stops and the last POST code generated is left at port 80h This code is useful for determining the point where an error occurred Displaying the POST codes requires an add in card often called a POST card The POST card can decode the port and display the contents on a medium such as a seven segment display These cards can be purchased from JDR Microdevices or other sources The following tables pro
94. y data FFFF9000 FFFF9FFF 4 KB Used by the BIOS for activities such as event logging FFFF8000 FFFF8FFF 4 KB OEM logo or scan flash area FFFC0000 FFFF7FFF 224 KB Main BIOS block 3 3 Resource Configuration 3 3 1 Plug and Play PCI Autoconfiguration The BIOS can automatically configure PCI devices and Plug and Play devices PCI devices may be onboard or add in cards Plug and Play devices are ISA devices built to meet the Plug and Play specification Autoconfiguration lets a user insert or remove PCI or Plug and Play cards without having to configure the system When a user turns on the system after adding a PCI or Plug and Play card the BIOS automatically configures interrupts the I O space and other system resources Any interrupts set to Available in Setup see Section 4 4 8 are considered to be available for use by the add in card PCI interrupts are distributed to available ISA interrupts that have not been assigned to an ISA card or to system resources The assignment of PCI interrupts to ISA IRQs is nondeterministic PCI devices can share an interrupt but an ISA device cannot share an interrupt allocated to a PCI device or to another ISA device Autoconfiguration information is stored in ESCD format For information about the versions of PCI and Plug and Play supported by this BIOS see Section 6 2 3 3 2 ISA Plug and Play 56 If the user selects Plug amp Play OS in Setup see Section 4 4 1 the BIOS autoconfigures o

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