MAXIM DS1225AB/AD 64k Nonvolatile SRAM Manual
Contents
1. 2 of 9 DS1225AB AD ABSOLUTE MAXIMUM RATINGS Voltage on Any Pin Relative to Ground Operating Temperature Commercial Industrial Storage Temperature Lead Temperature soldering 10s Note EDIP is wave or hand soldered only 0 3V to 6 0V 0 to 70 C 40 C to 85 C 40 C to 85 C 260 C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods of time may affect reliability RECOMMENDED DC OPERATING CONDITIONS Ta See Note 10 PARAMETER SYMBOL MIN TYP MAX UNITS NOTES DS1225AB Power Supply Voltage 4 75 5 0 5 25 V DS1225AD Power Supply Voltage Voc 4 50 5 0 5 5 V Logic 1 Vin 2 2 V Logic 0 0 0 0 8 V Ta See Note 10 Vcc 5V 5 for DS1225AB DC ELECTRICAL CHARACTERISTICS Vcc 5V 10 for DS1225AD PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Leakage Current Ir 1 0 1 0 uA I O Leakage Current mien 1 0 1 0 CE gt Vin lt Output Current 2 4V Iou 1 0 mA Output Current 0 4V 2 0 mA Standby Current CE 2 2V Iccsi 5 0 10 0 mA Standby Current CE Vcc 0 5V Iccs2 3 0 5 0 mA Operating Current Commercial Icco m Hs Operating Curr2. 150 and 200 parts and leaded 70 parts 9 of 9
3. Measurement Reference Levels Input 1 5V Output 1 5V Input Pulse Rise and Fall Times 5ns 7 of 9 DS1225AB AD ORDERING INFORMATION SUPPLY SPEED GRADE PART TEMP RANGE TOLERANCE PIN PACKAGE ns DS1225AB 70 0 to 70 C 5V 5 28 720 EDIP 70 DS1225AB 70IND 40 C to 85 C 5V t 596 28 720 EDIP 70 DS1225AD 70 0 to 70 C 5V 10 28 720 EDIP 70 DS1225AD 70IND 40 C to 85 C 5V 10 28 720 EDIP 70 Denotes a lead Pb free RoHS compliant package PACKAGE INFORMATION For the latest package outline information and land patterns go to www maxim ic com packages Note that a or in the package code indicates RoHS status only Package drawings may show a different suffix character but the drawing pertains to the package regardless of RoHS status PACKAGE TYPE PACKAGE CODE OUTLINE NO LAND PATTERN NO 28 EDIP MDT28 2 21 0245 8 of 9 DS1225AB AD REVISION HISTORY REVISION PAGES DATE DESCRIPTION CHANGED Added package information table removed the DIP module package 121907 9 drawing and dimension table Updated the storage information soldering temperature and lead temperature information in the Absolute Maximum Ratings section 11 10 removed the 85 150 and 200 MIN MAX information from the 1348 AC Electrical Characteristics table updated the Ordering Information table removed 85
4. 19 5625 Rev 11 10 DALLAS DS1225AB AD SEMICONDUCTOR SA AALY I 64k Nonvolatile SRAM www maxim ic CoM SC FEATURES PIN ASSIGNMENT 10 years minimum data retention in the absence of external power vec Data is automatically protected during power s loss A8 Directly replaces 8k x 8 volatile static RAM A9 or EEPROM Alt Unlimited write cycles is Low power CMOS CE JEDEC standard 28 pin DIP package DQ7 Read and write access times of 70 ns saci Lithium energy source is electrically oo disconnected to retain freshness until power Dos is applied for the first time Full 10 Vcc operating range DS1225AD Optional 5 Vcc operating range DS1225AB PIN DESCRIPTION Optional industrial temperature range of 28 Pin ENCAPSULATED PACKAGE 720 mil EXTENDED 40 to 85 designated IND Chip Enable WE Write Enable OE Output Enable Power 5V GND Ground NC No Connect DESCRIPTION The DS1225AB and DS1225AD are 65 536 bit fully static nonvolatile SRAMs organized as 8192 words by 8 bits Each NV SRAM has a self contained lithium energy source and control circuitry which constantly monitors Vcc for an out of tolerance condition When such a condition occurs the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption The NV SRAMs can be used in place of existing 8k x 8 SRAMs direct
5. ent Industrial Teco 9n IA Write Protection Voltage DS1225AB Vip 4 50 4 62 4 75 V Write Protection Voltage DS1225AD 4 25 4 37 4 5 V CAPACITANCE TA 25 C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance Cin 5 10 pE Input Output Capacitance Cro 5 10 pF 3 of 9 DS1225AB AD AC ELECTRICAL CHARACTERISTICS Ta See Note 10 Vcc 5V 5 for DS1225AB Vcc 5V 10 for DS1225AD DS1225AB 70 PARAMETER SYMBOL DS1225AD 70 UNITS NOTES MIN MAX Read Cycle Time tnc 70 ns Access Time tacc 70 ns OE to Output Valid tog 35 ns CE to Output Valid tco 70 ns OE or CE to Output Active 2 ns 5 Output High Z from Deselection top 25 ns 5 Output Hold from Address t 5 as Change Write Cycle Time twc 70 ns Write Pulse Width twp 55 ns 3 Address Setup Time taw 0 ns twr1 0 ns 12 Write Recovery Time 10 a 13 Output High Z from WE topw 25 ns 5 Output Active from WE tozw 2 ns 5 Data Setup Time tps 30 ns 4 tpui 0 ns 12 Data Hold Time DER 10 13 4 of 9 DS1225AB AD READ CYCLE ADDRESSES X Ve wt IH tco 7 E QA T FOO YL aa Dour qo Ver KI SEE NOTE 1 WRITE CYCLE 1 D KSSSSSSSSIISIN OTIS SSI NSIS SESS DATA IN STABLE SEE NOTES 2 3 4 6 7 8 AND 12 WRITE CYCLE 2 Vin d o Vit Vit erue
6. ime twr before another cycle can be initiated The OE control signal should be kept inactive high during write cycles to avoid bus contention However if the output drivers are enabled CE and OE active then WE will disable the outputs in topw from its falling edge DATA RETENTION MODE The DS1225AB provides full functional capability for Vcc greater than 4 75 volts and write protects by 4 5 volts The DS1225AD provides full functional capability for Vcc greater than 4 5 volts and write protects by 4 25 volts Data is maintained in the absence of Vcc without any additional support circuitry The nonvolatile static RAMs constantly monitor Vcc Should the supply voltage decay the NV SRAMs automatically write protect themselves all inputs become don t care and all outputs become high impedance As falls below approximately 3 0 volts the power switching circuit connects the lithium energy source to RAM to retain data During power up when Vcc rises above approximately 3 0 volts the power switching circuit connects external Vcc to RAM and disconnects the lithium energy source Normal RAM operation can resume after Vcc exceeds 4 75 volts for the DS1225AB and 4 5 volts for the DS1225AD FRESHNESS SEAL Each DS1225 is shipped from Maxim with the lithium energy source disconnected guaranteeing full energy capacity When Vcc is first applied at a level of greater than Vr the lithium energy source is enabled for battery backup operation
7. ly conforming to the popular bytewide 28 pin DIP standard The devices also match the pinout of the 2764 EPROM and the 2864 EEPROM allowing direct substitution while enhancing performance There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing 1 of 10 DS1225AB AD READ MODE The DS1225AB and DS1225AD execute a read cycle whenever WE Write Enable is inactive high and CE Chip Enable and OE Output Enable are active low The unique address specified by the 13 address inputs Ao Ai2 defines which of the 8192 bytes of data is to be accessed Valid data will be available to the eight data output drivers within tacc Access Time after the last address input signal is stable providing that CE and OE access times are also satisfied If CE and OE access times are not satisfied then data access must be measured from the later occurring signal and the limiting parameter is either tco for CE or tor for OE rather than address access WRITE MODE The DS1225AB and DS1225AD execute a write cycle whenever the WE and CE signals are active low after address inputs are stable The later occurring falling edge of CE or WE will determine the start of the write cycle The write cycle is terminated by the earlier rising edge of CE or WE All address inputs must be kept valid throughout the write cycle WE must return to the high state for a minimum recovery t
8. re ADDRESSES eruere WE VA le l I oy D SM VAL tp DATA IN OW STABLE ViL Vi SEE NOTES 2 3 4 6 7 8 AND 13 5 of 9 DS1225AB AD POWER DOWN POWER UP CONDITION Vp 3 0V te in WE BACKUP CURRENT SUPPLIED FROM LITHIUM BATTERY ton SEE NOTE 11 POWER DOWN POWER UP TIMING T4 See Note 10 PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Fail Detect to CE and WE Inactive 1 5 us 11 Vcc slew from Vrp to tr 300 us Vcc slew from to Vrp tR 300 us Vcc Valid to CE and WE Inactive tpu 2 ms Vcc Valid to End of Write Protection 125 ms TA 25 C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Expected Data Retention Time tDR 10 years 9 WARNING Under no circumstance are negative undershoots of any amplitude allowed when device is in battery backup mode 6 of 9 DS1225AB AD NOTES 1 WE is high for a read cycle 2 OE Vin or Vg If Vin during write cycle the output buffers remain in a high impedance state 3 twp is specified as the logical AND of CE and WE twp is measured from the latter of CE or WE going low to the earlier of CE or WE going high 4 tps are measured from the earlier of CE or WE going high 5 These parameters are sampled with a 5 pF load and are not 10096 tested 6 If the CE low transition occurs simultaneou
9. sly with or later than the WE low transition the output buffers remain in a high impedance state during this period 7 If the CE high transition occurs prior to or simultaneously with the WE high transition the output buffers remain in a high impedance state during this period 8 If WE islow orthe WE low transition occurs prior to or simultaneously with the CE low transition the output buffers remain in a high impedance state during this period 9 Each DS1225AB and each DS1225AD has a built in switch that disconnects the lithium source until Vcc is first applied by the user The expected tpr is defined as accumulative time in the absence of Vcc starting from the time power is first applied by the user This parameter is guaranteed by design and is not 10096 tested 10 AC and DC electrical characteristics are valid over the full operating temperature range For commercial products this range is 0 C to 70 C For industrial products IND this range is 40 C to 85 C 11 In a power down condition the voltage on any pin may not exceed the voltage on Vcc 12 twni are measured from WE going high 13 twn are measured from CE going high 14 DS1225 modules are recognized by Underwriters Laboratories UL under file E99151 DC TEST CONDITIONS AC TEST CONDITIONS Outputs Open Output Load 100 pF 1TTL Gate Cycle 200ns for Operating Current Input Pulse Levels 0 3 0V Voltages Are Referenced to Ground Timing
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MAXIM DS1225AB/AD 64k Nonvolatile SRAM Manual